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[test] Add missing tests for Arm frexpf128 and Mips ldexpf128 (#148793)
These platforms have tests for the rest of the float sizes but not `f128`. Add them here.
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llvm/test/CodeGen/ARM/llvm.frexp.ll

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Original file line numberDiff line numberDiff line change
@@ -544,6 +544,59 @@ define <2 x i32> @test_frexp_v2f64_v2i32_only_use_exp(<2 x double> %a) {
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ret <2 x i32> %result.1
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}
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define { fp128, i32 } @test_frexp_f128_i32(fp128 %a) nounwind {
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; CHECK-LABEL: test_frexp_f128_i32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r4, lr}
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; CHECK-NEXT: sub sp, #8
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; CHECK-NEXT: mov r12, r3
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; CHECK-NEXT: ldr r3, [sp, #16]
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; CHECK-NEXT: mov r4, r0
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; CHECK-NEXT: add r0, sp, #4
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; CHECK-NEXT: str r0, [sp]
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; CHECK-NEXT: mov r0, r1
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; CHECK-NEXT: mov r1, r2
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; CHECK-NEXT: mov r2, r12
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; CHECK-NEXT: bl frexpl
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; CHECK-NEXT: ldr.w r12, [sp, #4]
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; CHECK-NEXT: stm.w r4, {r0, r1, r2, r3, r12}
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; CHECK-NEXT: add sp, #8
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; CHECK-NEXT: pop {r4, pc}
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%result = call { fp128, i32 } @llvm.frexp.f128.i32(fp128 %a)
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ret { fp128, i32 } %result
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}
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define fp128 @test_frexp_f128_i32_only_use_fract(fp128 %a) nounwind {
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; CHECK-LABEL: test_frexp_f128_i32_only_use_fract:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: sub sp, #8
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; CHECK-NEXT: add.w r12, sp, #4
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; CHECK-NEXT: str.w r12, [sp]
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; CHECK-NEXT: bl frexpl
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; CHECK-NEXT: add sp, #8
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; CHECK-NEXT: pop {r7, pc}
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%result = call { fp128, i32 } @llvm.frexp.f128.i32(fp128 %a)
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%result.0 = extractvalue { fp128, i32 } %result, 0
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ret fp128 %result.0
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}
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define i32 @test_frexp_f128_i32_only_use_exp(fp128 %a) nounwind {
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; CHECK-LABEL: test_frexp_f128_i32_only_use_exp:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: sub sp, #8
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; CHECK-NEXT: add.w r12, sp, #4
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; CHECK-NEXT: str.w r12, [sp]
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; CHECK-NEXT: bl frexpl
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; CHECK-NEXT: ldr r0, [sp, #4]
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; CHECK-NEXT: add sp, #8
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; CHECK-NEXT: pop {r7, pc}
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%result = call { fp128, i32 } @llvm.frexp.f128.i32(fp128 %a)
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%result.0 = extractvalue { fp128, i32 } %result, 1
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ret i32 %result.0
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}
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declare { float, i32 } @llvm.frexp.f32.i32(float) #0
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declare { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float>) #0
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declare { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float>) #0

llvm/test/CodeGen/Mips/ldexp.ll

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Original file line numberDiff line numberDiff line change
@@ -125,6 +125,21 @@ define half @ldexp_f16(half %arg0, i32 %arg1) nounwind {
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ret half %ldexp
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}
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define fp128 @ldexp_f128(fp128 %arg0, i32 %arg1) nounwind {
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; SOFT-LABEL: ldexp_f128:
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; SOFT: # %bb.0:
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; SOFT-NEXT: addiu $sp, $sp, -32
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; SOFT-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
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; SOFT-NEXT: lw $1, 48($sp)
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; SOFT-NEXT: jal ldexpl
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; SOFT-NEXT: sw $1, 16($sp)
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; SOFT-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload
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; SOFT-NEXT: jr $ra
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; SOFT-NEXT: addiu $sp, $sp, 32
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%ldexp = call fp128 @llvm.ldexp.f128.i32(fp128 %arg0, i32 %arg1)
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ret fp128 %ldexp
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}
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declare double @llvm.ldexp.f64.i32(double, i32) #0
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declare float @llvm.ldexp.f32.i32(float, i32) #0
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declare <2 x float> @llvm.ldexp.v2f32.v2i32(<2 x float>, <2 x i32>) #0

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