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1 parent d715ecb commit 83992f5Copy full SHA for 83992f5
llvm/test/CodeGen/AArch64/aarch64-bitwisenot-fold.ll
@@ -96,3 +96,29 @@ define i64 @andnot_sub_with_neg_i64(i64 %a0, i64 %a1) {
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%and = and i64 %diff, %a0
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ret i64 %and
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}
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+
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+define i32 @and_not_select_eq(i32 %a, i32 %b, i32 %c) {
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+; CHECK-LABEL: and_not_select_eq:
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+; CHECK: // %bb.0:
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+; CHECK-NEXT: orr w8, w1, w0
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+; CHECK-NEXT: cmp w8, w0
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+; CHECK-NEXT: csel w0, w0, w2, eq
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+; CHECK-NEXT: ret
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+ %or = or i32 %b, %a
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+ %cmp = icmp eq i32 %or, %a
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+ %a.c = select i1 %cmp, i32 %a, i32 %c
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+ ret i32 %a.c
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+}
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+define i32 @and_not_select_ne(i32 %a, i32 %b, i32 %c) {
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+; CHECK-LABEL: and_not_select_ne:
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+; CHECK-NEXT: csel w0, w0, w2, ne
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+ %cmp = icmp ne i32 %or, %a
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