@@ -125,15 +125,15 @@ define i64 @same_exit_block_pre_inc_use1() {
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; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
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; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
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; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
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- ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24 ]], 4
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+ ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35 ]], 4
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; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
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; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
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; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
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- ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28 ]], 4
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+ ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26 ]], 4
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; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
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; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
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; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
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- ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32 ]], 4
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+ ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30 ]], 4
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; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
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; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
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; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -223,15 +223,15 @@ define ptr @same_exit_block_pre_inc_use1_ivptr() {
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; VF4IC4-NEXT: [[TMP29:%.*]] = add i64 12, [[TMP28]]
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; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP16]], i1 true)
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; VF4IC4-NEXT: [[TMP19:%.*]] = add i64 8, [[TMP30]]
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- ; VF4IC4-NEXT: [[TMP18:%.*]] = icmp ne i64 [[TMP19 ]], 4
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+ ; VF4IC4-NEXT: [[TMP18:%.*]] = icmp ne i64 [[TMP30 ]], 4
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; VF4IC4-NEXT: [[TMP20:%.*]] = select i1 [[TMP18]], i64 [[TMP19]], i64 [[TMP29]]
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; VF4IC4-NEXT: [[TMP21:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP15]], i1 true)
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; VF4IC4-NEXT: [[TMP23:%.*]] = add i64 4, [[TMP21]]
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- ; VF4IC4-NEXT: [[TMP22:%.*]] = icmp ne i64 [[TMP23 ]], 4
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+ ; VF4IC4-NEXT: [[TMP22:%.*]] = icmp ne i64 [[TMP21 ]], 4
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; VF4IC4-NEXT: [[TMP24:%.*]] = select i1 [[TMP22]], i64 [[TMP23]], i64 [[TMP20]]
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; VF4IC4-NEXT: [[TMP25:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP2]], i1 true)
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; VF4IC4-NEXT: [[TMP27:%.*]] = add i64 0, [[TMP25]]
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- ; VF4IC4-NEXT: [[TMP26:%.*]] = icmp ne i64 [[TMP27 ]], 4
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+ ; VF4IC4-NEXT: [[TMP26:%.*]] = icmp ne i64 [[TMP25 ]], 4
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; VF4IC4-NEXT: [[TMP6:%.*]] = select i1 [[TMP26]], i64 [[TMP27]], i64 [[TMP24]]
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; VF4IC4-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], [[TMP6]]
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; VF4IC4-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[P1]], i64 [[TMP7]]
@@ -324,15 +324,15 @@ define i64 @same_exit_block_post_inc_use() {
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; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
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; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
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; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
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- ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24 ]], 4
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+ ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35 ]], 4
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; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
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; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
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; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
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- ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28 ]], 4
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+ ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26 ]], 4
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; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
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; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
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; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
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- ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32 ]], 4
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+ ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30 ]], 4
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; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
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; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
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; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -432,15 +432,15 @@ define i64 @diff_exit_block_pre_inc_use1() {
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; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
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; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
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; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
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- ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24 ]], 4
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+ ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35 ]], 4
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; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
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; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
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; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
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- ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28 ]], 4
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+ ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26 ]], 4
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; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
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; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
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; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
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- ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32 ]], 4
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+ ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30 ]], 4
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; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
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; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
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; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -547,15 +547,15 @@ define i64 @diff_exit_block_post_inc_use1() {
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; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
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; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
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; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
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- ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24 ]], 4
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+ ; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35 ]], 4
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; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
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; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
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; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
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- ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28 ]], 4
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+ ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26 ]], 4
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; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
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; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
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; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
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- ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32 ]], 4
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+ ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30 ]], 4
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; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
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; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
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; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -678,15 +678,15 @@ define i64 @same_exit_block_pre_inc_use1_reverse() {
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; VF4IC4-NEXT: [[TMP42:%.*]] = add i64 12, [[TMP41]]
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; VF4IC4-NEXT: [[TMP43:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP20]], i1 true)
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; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 8, [[TMP43]]
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- ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32 ]], 4
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+ ; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP43 ]], 4
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; VF4IC4-NEXT: [[TMP33:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP42]]
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; VF4IC4-NEXT: [[TMP34:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP19]], i1 true)
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; VF4IC4-NEXT: [[TMP36:%.*]] = add i64 4, [[TMP34]]
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- ; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[TMP36 ]], 4
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+ ; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[TMP34 ]], 4
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; VF4IC4-NEXT: [[TMP37:%.*]] = select i1 [[TMP35]], i64 [[TMP36]], i64 [[TMP33]]
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; VF4IC4-NEXT: [[TMP38:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP6]], i1 true)
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; VF4IC4-NEXT: [[TMP40:%.*]] = add i64 0, [[TMP38]]
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- ; VF4IC4-NEXT: [[TMP39:%.*]] = icmp ne i64 [[TMP40 ]], 4
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+ ; VF4IC4-NEXT: [[TMP39:%.*]] = icmp ne i64 [[TMP38 ]], 4
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; VF4IC4-NEXT: [[TMP10:%.*]] = select i1 [[TMP39]], i64 [[TMP40]], i64 [[TMP37]]
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; VF4IC4-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], [[TMP10]]
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; VF4IC4-NEXT: [[TMP12:%.*]] = sub i64 1023, [[TMP11]]
@@ -785,15 +785,15 @@ define i8 @same_exit_block_use_loaded_value() {
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; VF4IC4-NEXT: [[TMP20:%.*]] = add i64 12, [[FIRST_ACTIVE_LANE1]]
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE8:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
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; VF4IC4-NEXT: [[TMP22:%.*]] = add i64 8, [[FIRST_ACTIVE_LANE8]]
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- ; VF4IC4-NEXT: [[TMP21:%.*]] = icmp ne i64 [[TMP22 ]], 4
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+ ; VF4IC4-NEXT: [[TMP21:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE8 ]], 4
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; VF4IC4-NEXT: [[TMP23:%.*]] = select i1 [[TMP21]], i64 [[TMP22]], i64 [[TMP20]]
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE9:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
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; VF4IC4-NEXT: [[TMP25:%.*]] = add i64 4, [[FIRST_ACTIVE_LANE9]]
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- ; VF4IC4-NEXT: [[TMP24:%.*]] = icmp ne i64 [[TMP25 ]], 4
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+ ; VF4IC4-NEXT: [[TMP24:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE9 ]], 4
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; VF4IC4-NEXT: [[TMP26:%.*]] = select i1 [[TMP24]], i64 [[TMP25]], i64 [[TMP23]]
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE10:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
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; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 0, [[FIRST_ACTIVE_LANE10]]
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- ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28 ]], 4
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+ ; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE10 ]], 4
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP26]]
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; VF4IC4-NEXT: [[EARLY_EXIT_VALUE:%.*]] = extractelement <4 x i8> [[WIDE_LOAD]], i64 [[FIRST_ACTIVE_LANE]]
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; VF4IC4-NEXT: br label [[LOOP_END]]
@@ -908,15 +908,15 @@ define i8 @same_exit_block_reverse_use_loaded_value() {
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; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 12, [[FIRST_ACTIVE_LANE1]]
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE15:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP20]], i1 true)
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; VF4IC4-NEXT: [[TMP30:%.*]] = add i64 8, [[FIRST_ACTIVE_LANE15]]
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- ; VF4IC4-NEXT: [[TMP29:%.*]] = icmp ne i64 [[TMP30 ]], 4
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+ ; VF4IC4-NEXT: [[TMP29:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE15 ]], 4
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; VF4IC4-NEXT: [[TMP31:%.*]] = select i1 [[TMP29]], i64 [[TMP30]], i64 [[TMP28]]
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE16:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP19]], i1 true)
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; VF4IC4-NEXT: [[TMP33:%.*]] = add i64 4, [[FIRST_ACTIVE_LANE16]]
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- ; VF4IC4-NEXT: [[TMP32:%.*]] = icmp ne i64 [[TMP33 ]], 4
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+ ; VF4IC4-NEXT: [[TMP32:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE16 ]], 4
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; VF4IC4-NEXT: [[TMP34:%.*]] = select i1 [[TMP32]], i64 [[TMP33]], i64 [[TMP31]]
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE17:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP6]], i1 true)
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; VF4IC4-NEXT: [[TMP36:%.*]] = add i64 0, [[FIRST_ACTIVE_LANE17]]
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- ; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[TMP36 ]], 4
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+ ; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE17 ]], 4
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; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE:%.*]] = select i1 [[TMP35]], i64 [[TMP36]], i64 [[TMP34]]
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; VF4IC4-NEXT: [[EARLY_EXIT_VALUE:%.*]] = extractelement <4 x i8> [[REVERSE]], i64 [[FIRST_ACTIVE_LANE]]
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; VF4IC4-NEXT: br label [[LOOP_END]]
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