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[X86] combineConcatVectorOps - add tests showing v4i64 shift-by-32 with unnecessary concatenation
On AVX1-only targets, we concat SHL/SRL AVX1 v4i64 by 32-bits as a shuffle. But this is only worth while if the shift source value is free to concatenate.
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‎llvm/test/CodeGen/X86/vector-shift-lshr-256.ll

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1971,6 +1971,73 @@ define <4 x i64> @shift32_v4i64(<4 x i64> %a) nounwind {
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ret <4 x i64> %shift
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}
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define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
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; AVX1-LABEL: shift32_v4i64_concat:
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; AVX1: # %bb.0:
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; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7]
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; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: shift32_v4i64_concat:
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; AVX2: # %bb.0:
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; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0
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; AVX2-NEXT: retq
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;
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; XOPAVX1-LABEL: shift32_v4i64_concat:
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; XOPAVX1: # %bb.0:
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; XOPAVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; XOPAVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7]
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; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
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; XOPAVX1-NEXT: retq
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;
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; XOPAVX2-LABEL: shift32_v4i64_concat:
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; XOPAVX2: # %bb.0:
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; XOPAVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; XOPAVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; XOPAVX2-NEXT: vpsrlq $32, %ymm0, %ymm0
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; XOPAVX2-NEXT: retq
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;
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; AVX512-LABEL: shift32_v4i64_concat:
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; AVX512: # %bb.0:
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; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; AVX512-NEXT: vpsrlq $32, %ymm0, %ymm0
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; AVX512-NEXT: retq
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;
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; AVX512VL-LABEL: shift32_v4i64_concat:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; AVX512VL-NEXT: vpsrlq $32, %ymm0, %ymm0
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; AVX512VL-NEXT: retq
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;
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; X86-AVX1-LABEL: shift32_v4i64_concat:
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; X86-AVX1: # %bb.0:
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; X86-AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; X86-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; X86-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm1[1,3],ymm0[5,7],ymm1[5,7]
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; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
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; X86-AVX1-NEXT: retl
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;
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; X86-AVX2-LABEL: shift32_v4i64_concat:
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; X86-AVX2: # %bb.0:
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; X86-AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; X86-AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; X86-AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0
2035+
; X86-AVX2-NEXT: retl
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%a = shufflevector <2 x i64> %lo, <2 x i64> %hi, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
2037+
%shift = lshr <4 x i64> %a, <i64 32, i64 32, i64 32, i64 32>
2038+
ret <4 x i64> %shift
2039+
}
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define <4 x i32> @sh_trunc_sh_vec(<4 x i64> %x) {
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; AVX1-LABEL: sh_trunc_sh_vec:
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; AVX1: # %bb.0:

‎llvm/test/CodeGen/X86/vector-shift-shl-256.ll

Lines changed: 67 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1823,3 +1823,70 @@ define <4 x i64> @shift32_v4i64(<4 x i64> %a) nounwind {
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%shift = shl <4 x i64> %a, <i64 32, i64 32, i64 32, i64 32>
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ret <4 x i64> %shift
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}
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define <4 x i64> @shift32_v4i64_concat(<2 x i64> %lo, <2 x i64> %hi) nounwind {
1828+
; AVX1-LABEL: shift32_v4i64_concat:
1829+
; AVX1: # %bb.0:
1830+
; AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1832+
; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
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; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: shift32_v4i64_concat:
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; AVX2: # %bb.0:
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; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
1841+
; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0
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; AVX2-NEXT: retq
1843+
;
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; XOPAVX1-LABEL: shift32_v4i64_concat:
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; XOPAVX1: # %bb.0:
1846+
; XOPAVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
1848+
; XOPAVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1849+
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
1850+
; XOPAVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
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; XOPAVX1-NEXT: retq
1852+
;
1853+
; XOPAVX2-LABEL: shift32_v4i64_concat:
1854+
; XOPAVX2: # %bb.0:
1855+
; XOPAVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
1856+
; XOPAVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
1857+
; XOPAVX2-NEXT: vpsllq $32, %ymm0, %ymm0
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; XOPAVX2-NEXT: retq
1859+
;
1860+
; AVX512-LABEL: shift32_v4i64_concat:
1861+
; AVX512: # %bb.0:
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; AVX512-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; AVX512-NEXT: vpsllq $32, %ymm0, %ymm0
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; AVX512-NEXT: retq
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;
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; AVX512VL-LABEL: shift32_v4i64_concat:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; AVX512VL-NEXT: vpsllq $32, %ymm0, %ymm0
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; AVX512VL-NEXT: retq
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;
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; X86-AVX1-LABEL: shift32_v4i64_concat:
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; X86-AVX1: # %bb.0:
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; X86-AVX1-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; X86-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; X86-AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
1880+
; X86-AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2,1,3,4,6,5,7]
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; X86-AVX1-NEXT: retl
1882+
;
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; X86-AVX2-LABEL: shift32_v4i64_concat:
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; X86-AVX2: # %bb.0:
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; X86-AVX2-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
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; X86-AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
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; X86-AVX2-NEXT: vpsllq $32, %ymm0, %ymm0
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; X86-AVX2-NEXT: retl
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%a = shufflevector <2 x i64> %lo, <2 x i64> %hi, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
1890+
%shift = shl <4 x i64> %a, <i64 32, i64 32, i64 32, i64 32>
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ret <4 x i64> %shift
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}

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