Skip to content

Commit 1bbd462

Browse files
committed
isBaseWithConstantOffset(Addr) -> Addr->isAnyAdd()
Op->isAnyAdd() -> Op.getOpcode() != ISD::SUB
1 parent ec5c4d3 commit 1bbd462

File tree

2 files changed

+3
-3
lines changed

2 files changed

+3
-3
lines changed

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2983,8 +2983,8 @@ bool TargetLowering::SimplifyDemandedBits(
29832983
Known = KnownBits::mul(KnownOp0, KnownOp1);
29842984
} else { // Op.getOpcode() is either ISD::ADD, ISD::PTRADD, or ISD::SUB.
29852985
Known = KnownBits::computeForAddSub(
2986-
Op->isAnyAdd(), Flags.hasNoSignedWrap(), Flags.hasNoUnsignedWrap(),
2987-
KnownOp0, KnownOp1);
2986+
Op.getOpcode() != ISD::SUB, Flags.hasNoSignedWrap(),
2987+
Flags.hasNoUnsignedWrap(), KnownOp0, KnownOp1);
29882988
}
29892989
break;
29902990
}

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2418,7 +2418,7 @@ bool AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(SDNode *N, SDValue Addr,
24182418

24192419
SDValue N0, N1;
24202420
// Extract the base and offset if possible.
2421-
if (CurDAG->isBaseWithConstantOffset(Addr) || Addr->isAnyAdd()) {
2421+
if (Addr->isAnyAdd() || CurDAG->isADDLike(Addr)) {
24222422
N0 = Addr.getOperand(0);
24232423
N1 = Addr.getOperand(1);
24242424
} else if (getBaseWithOffsetUsingSplitOR(*CurDAG, Addr, N0, N1)) {

0 commit comments

Comments
 (0)