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Lower neon_vmaxvq_u8,neon_vmaxvq_s8, neon_vmaxv_u8 and neon_vmaxvq_s8 (#1265)
[Neon definiton](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:@navigationhierarchiessimdisa=[Neon]&q=vmaxv_s8) [OG implementation](https://github.com/llvm/clangir/blob/04d7dcfb2582753f3eccbf01ec900d60297cbf4b/clang/lib/CodeGen/CGBuiltin.cpp#L13202) Implementation in this PR is different from OG as 1. avoided code duplication by extracting out the common pattern 2. avoided using i32 as return type of the intrinsic call, so eliminated the need for casting result of the intrinsic call. This way of OG's implementation is quite unnecessary IMHO, this is MAX, not ADD or MUL. After all, using the expected type as return type of intrinsic call produces [the same ASM code](https://godbolt.org/z/3nKG7fxPb).
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clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

Lines changed: 28 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2351,6 +2351,26 @@ emitCommonNeonCallPattern0(CIRGenFunction &cgf, llvm::StringRef intrincsName,
23512351
return builder.createBitcast(res, resultType);
23522352
}
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2354+
/// The function `emitCommonNeonVecAcrossCall` implements a common way
2355+
/// to implement neon intrinsic which has the following pattern:
2356+
/// 1. There is only one argument which is of vector type
2357+
/// 2. The result of the neon intrinsic is the element type of the input.
2358+
/// This type of intrinsic usually is for across operations of the input vector.
2359+
2360+
static mlir::Value emitCommonNeonVecAcrossCall(CIRGenFunction &cgf,
2361+
llvm::StringRef intrincsName,
2362+
mlir::Type eltTy,
2363+
unsigned vecLen,
2364+
const clang::CallExpr *e) {
2365+
CIRGenBuilderTy &builder = cgf.getBuilder();
2366+
mlir::Value op = cgf.emitScalarExpr(e->getArg(0));
2367+
cir::VectorType vTy =
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cir::VectorType::get(&cgf.getMLIRContext(), eltTy, vecLen);
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llvm::SmallVector<mlir::Value, 1> args{op};
2370+
return emitNeonCall(builder, {vTy}, args, intrincsName, eltTy,
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cgf.getLoc(e->getExprLoc()));
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}
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23542374
mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
23552375
unsigned builtinID, unsigned llvmIntrinsic, unsigned altLLVMIntrinsic,
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const char *nameHint, unsigned modifier, const CallExpr *e,
@@ -4269,25 +4289,29 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
42694289
llvm_unreachable("NEON::BI__builtin_neon_vaddvq_s16 NYI");
42704290
}
42714291
case NEON::BI__builtin_neon_vmaxv_u8: {
4272-
llvm_unreachable("NEON::BI__builtin_neon_vmaxv_u8 NYI");
4292+
return emitCommonNeonVecAcrossCall(*this, "aarch64.neon.umaxv", UInt8Ty, 8,
4293+
E);
42734294
}
42744295
case NEON::BI__builtin_neon_vmaxv_u16: {
42754296
llvm_unreachable("NEON::BI__builtin_neon_vmaxv_u16 NYI");
42764297
}
42774298
case NEON::BI__builtin_neon_vmaxvq_u8: {
4278-
llvm_unreachable("NEON::BI__builtin_neon_vmaxvq_u8 NYI");
4299+
return emitCommonNeonVecAcrossCall(*this, "aarch64.neon.umaxv", UInt8Ty, 16,
4300+
E);
42794301
}
42804302
case NEON::BI__builtin_neon_vmaxvq_u16: {
42814303
llvm_unreachable("NEON::BI__builtin_neon_vmaxvq_u16 NYI");
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}
42834305
case NEON::BI__builtin_neon_vmaxv_s8: {
4284-
llvm_unreachable("NEON::BI__builtin_neon_vmaxv_s8 NYI");
4306+
return emitCommonNeonVecAcrossCall(*this, "aarch64.neon.smaxv", SInt8Ty, 8,
4307+
E);
42854308
}
42864309
case NEON::BI__builtin_neon_vmaxv_s16: {
42874310
llvm_unreachable("NEON::BI__builtin_neon_vmaxv_s16 NYI");
42884311
}
42894312
case NEON::BI__builtin_neon_vmaxvq_s8: {
4290-
llvm_unreachable("NEON::BI__builtin_neon_vmaxvq_s8 NYI");
4313+
return emitCommonNeonVecAcrossCall(*this, "aarch64.neon.smaxv", SInt8Ty, 16,
4314+
E);
42914315
}
42924316
case NEON::BI__builtin_neon_vmaxvq_s16: {
42934317
llvm_unreachable("NEON::BI__builtin_neon_vmaxvq_s16 NYI");

clang/test/CIR/CodeGen/AArch64/neon-misc.c

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1751,3 +1751,51 @@ uint64_t test_vaddlvq_u32(uint32x4_t a) {
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// LLVM-NEXT: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> [[A]])
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// LLVM-NEXT: ret i64 [[VADDLVQ_U32_I]]
17531753
}
1754+
1755+
int8_t test_vmaxv_s8(int8x8_t a) {
1756+
return vmaxv_s8(a);
1757+
1758+
// CIR-LABEL: vmaxv_s8
1759+
// CIR: cir.llvm.intrinsic "aarch64.neon.smaxv" {{%.*}} : (!cir.vector<!s8i x 8>) -> !s8i
1760+
1761+
// LLVM-LABEL: @test_vmaxv_s8
1762+
// LLVM-SAME: (<8 x i8> [[a:%.*]])
1763+
// LLVM: [[res:%.*]] = call i8 @llvm.aarch64.neon.smaxv.i8.v8i8(<8 x i8> [[a]])
1764+
// LLVM: ret i8 [[res]]
1765+
}
1766+
1767+
int8_t test_vmaxv_u8(uint8x8_t a) {
1768+
return vmaxv_u8(a);
1769+
1770+
// CIR-LABEL: vmaxv_u8
1771+
// CIR: cir.llvm.intrinsic "aarch64.neon.umaxv" {{%.*}} : (!cir.vector<!u8i x 8>) -> !u8i
1772+
1773+
// LLVM-LABEL: @test_vmaxv_u8
1774+
// LLVM-SAME: (<8 x i8> [[a:%.*]])
1775+
// LLVM: [[res:%.*]] = call i8 @llvm.aarch64.neon.umaxv.i8.v8i8(<8 x i8> [[a]])
1776+
// LLVM: ret i8 [[res]]
1777+
}
1778+
1779+
int8_t test_vmaxvq_s8(int8x16_t a) {
1780+
return vmaxvq_s8(a);
1781+
1782+
// CIR-LABEL: vmaxvq_s8
1783+
// CIR: cir.llvm.intrinsic "aarch64.neon.smaxv" {{%.*}} : (!cir.vector<!s8i x 16>) -> !s8i
1784+
1785+
// LLVM-LABEL: @test_vmaxvq_s8
1786+
// LLVM-SAME: (<16 x i8> [[a:%.*]])
1787+
// LLVM: [[res:%.*]] = call i8 @llvm.aarch64.neon.smaxv.i8.v16i8(<16 x i8> [[a]])
1788+
// LLVM: ret i8 [[res]]
1789+
}
1790+
1791+
int8_t test_vmaxvq_u8(uint8x16_t a) {
1792+
return vmaxvq_u8(a);
1793+
1794+
// CIR-LABEL: vmaxvq_u8
1795+
// CIR: cir.llvm.intrinsic "aarch64.neon.umaxv" {{%.*}} : (!cir.vector<!u8i x 16>) -> !u8i
1796+
1797+
// LLVM-LABEL: @test_vmaxvq_u8
1798+
// LLVM-SAME: (<16 x i8> [[a:%.*]])
1799+
// LLVM: [[res:%.*]] = call i8 @llvm.aarch64.neon.umaxv.i8.v16i8(<16 x i8> [[a]])
1800+
// LLVM: ret i8 [[res]]
1801+
}

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