From e075079fc25d551ef0cd6f014b86abf0d9997068 Mon Sep 17 00:00:00 2001 From: Martin Erhart Date: Thu, 16 Jan 2025 20:47:49 +0000 Subject: [PATCH] [RTG] Add context resource attribute interface (#8034) --- include/circt-c/Dialect/RTGTest.h | 14 ++++++++ include/circt/Dialect/RTG/IR/CMakeLists.txt | 5 +++ .../circt/Dialect/RTG/IR/RTGAttrInterfaces.h | 22 ++++++++++++ include/circt/Dialect/RTG/IR/RTGInterfaces.td | 15 ++++++++ include/circt/Dialect/RTG/IR/RTGOps.h | 1 + .../circt/Dialect/RTGTest/IR/CMakeLists.txt | 4 +++ include/circt/Dialect/RTGTest/IR/RTGTest.td | 1 + .../Dialect/RTGTest/IR/RTGTestAttributes.h | 21 +++++++++++ .../Dialect/RTGTest/IR/RTGTestAttributes.td | 19 ++++++++++ .../Dialect/RTGTest/IR/RTGTestDialect.td | 2 ++ include/circt/Dialect/RTGTest/IR/RTGTestOps.h | 1 + .../circt/Dialect/RTGTest/IR/RTGTestOps.td | 5 ++- .../Bindings/Python/dialects/rtg.py | 9 ++--- lib/Bindings/Python/RTGTestModule.cpp | 10 ++++++ lib/CAPI/Dialect/RTGTest.cpp | 17 +++++++++ lib/Dialect/RTG/IR/CMakeLists.txt | 8 +++-- lib/Dialect/RTG/IR/RTGAttrInterfaces.cpp | 19 ++++++++++ lib/Dialect/RTGTest/IR/CMakeLists.txt | 2 ++ lib/Dialect/RTGTest/IR/RTGTestAttributes.cpp | 36 +++++++++++++++++++ lib/Dialect/RTGTest/IR/RTGTestDialect.cpp | 1 + lib/Dialect/RTGTest/IR/RTGTestOps.cpp | 4 ++- test/CAPI/rtgtest.c | 12 +++++++ test/Dialect/RTGTest/IR/basic.mlir | 4 +-- 23 files changed, 221 insertions(+), 11 deletions(-) create mode 100644 include/circt/Dialect/RTG/IR/RTGAttrInterfaces.h create mode 100644 include/circt/Dialect/RTGTest/IR/RTGTestAttributes.h create mode 100644 lib/Dialect/RTG/IR/RTGAttrInterfaces.cpp create mode 100644 lib/Dialect/RTGTest/IR/RTGTestAttributes.cpp diff --git a/include/circt-c/Dialect/RTGTest.h b/include/circt-c/Dialect/RTGTest.h index 0462795588a0..27761bee4a9d 100644 --- a/include/circt-c/Dialect/RTGTest.h +++ b/include/circt-c/Dialect/RTGTest.h @@ -31,6 +31,20 @@ MLIR_CAPI_EXPORTED bool rtgtestTypeIsACPU(MlirType type); /// Creates an RTGTest CPU type in the context. MLIR_CAPI_EXPORTED MlirType rtgtestCPUTypeGet(MlirContext ctxt); +//===----------------------------------------------------------------------===// +// Attribute API. +//===----------------------------------------------------------------------===// + +/// If the type is an RTGTest CPUAttr. +MLIR_CAPI_EXPORTED bool rtgtestAttrIsACPU(MlirAttribute attr); + +/// Creates an RTGTest CPU attribute in the context. +MLIR_CAPI_EXPORTED MlirAttribute rtgtestCPUAttrGet(MlirContext ctxt, + unsigned id); + +/// Returns the core ID represented by the CPU attribute. +MLIR_CAPI_EXPORTED unsigned rtgtestCPUAttrGetId(MlirAttribute attr); + #ifdef __cplusplus } #endif diff --git a/include/circt/Dialect/RTG/IR/CMakeLists.txt b/include/circt/Dialect/RTG/IR/CMakeLists.txt index 072a9d3c6dbb..b6d18335226c 100644 --- a/include/circt/Dialect/RTG/IR/CMakeLists.txt +++ b/include/circt/Dialect/RTG/IR/CMakeLists.txt @@ -18,6 +18,11 @@ mlir_tablegen(RTGTypeInterfaces.cpp.inc -gen-type-interface-defs) add_public_tablegen_target(CIRCTRTGTypeInterfacesIncGen) add_dependencies(circt-headers CIRCTRTGTypeInterfacesIncGen) +mlir_tablegen(RTGAttrInterfaces.h.inc -gen-attr-interface-decls) +mlir_tablegen(RTGAttrInterfaces.cpp.inc -gen-attr-interface-defs) +add_public_tablegen_target(CIRCTRTGAttrInterfacesIncGen) +add_dependencies(circt-headers CIRCTRTGAttrInterfacesIncGen) + set(LLVM_TARGET_DEFINITIONS RTGISAAssemblyInterfaces.td) mlir_tablegen(RTGISAAssemblyOpInterfaces.h.inc -gen-op-interface-decls) mlir_tablegen(RTGISAAssemblyOpInterfaces.cpp.inc -gen-op-interface-defs) diff --git a/include/circt/Dialect/RTG/IR/RTGAttrInterfaces.h b/include/circt/Dialect/RTG/IR/RTGAttrInterfaces.h new file mode 100644 index 000000000000..fb643d36d2f0 --- /dev/null +++ b/include/circt/Dialect/RTG/IR/RTGAttrInterfaces.h @@ -0,0 +1,22 @@ +//===- RTGAttrInterfaces.h - Declare RTG attr interfaces --------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file declares attr interfaces for the RTG Dialect. +// +//===----------------------------------------------------------------------===// + +#ifndef CIRCT_DIALECT_RTG_IR_RTGATTRINTERFACES_H +#define CIRCT_DIALECT_RTG_IR_RTGATTRINTERFACES_H + +#include "circt/Support/LLVM.h" +#include "mlir/IR/Attributes.h" +#include "mlir/IR/BuiltinAttributeInterfaces.h" + +#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h.inc" + +#endif // CIRCT_DIALECT_RTG_IR_RTGATTRINTERFACES_H diff --git a/include/circt/Dialect/RTG/IR/RTGInterfaces.td b/include/circt/Dialect/RTG/IR/RTGInterfaces.td index a40ebe41e9a2..d0535425e9ae 100644 --- a/include/circt/Dialect/RTG/IR/RTGInterfaces.td +++ b/include/circt/Dialect/RTG/IR/RTGInterfaces.td @@ -11,6 +11,7 @@ include "mlir/IR/Interfaces.td" include "mlir/IR/OpBase.td" +include "mlir/IR/BuiltinAttributeInterfaces.td" def ContextResourceOpInterface : OpInterface<"ContextResourceOpInterface"> { let description = [{ @@ -50,4 +51,18 @@ def ContextResourceTypeInterface : TypeInterface< let cppNamespace = "::circt::rtg"; } +def ContextResourceAttrInterface : AttrInterface< + "ContextResourceAttrInterface", [TypedAttrInterface]> { + let description = [{ + This interface should be implemented by attributes that represent context + resources. + Any attribute implementing this interface must be of a type implementing + the `ContextResourceTypeInterface`. + + TODO: properly verify this; unfortunately, we don't have a 'verify' field + here like the 'OpInterface' has. + }]; + let cppNamespace = "::circt::rtg"; +} + #endif // CIRCT_DIALECT_RTG_IR_RTGINTERFACES_TD diff --git a/include/circt/Dialect/RTG/IR/RTGOps.h b/include/circt/Dialect/RTG/IR/RTGOps.h index 8955a71dfa53..c6e502a3579e 100644 --- a/include/circt/Dialect/RTG/IR/RTGOps.h +++ b/include/circt/Dialect/RTG/IR/RTGOps.h @@ -13,6 +13,7 @@ #ifndef CIRCT_DIALECT_RTG_IR_RTGOPS_H #define CIRCT_DIALECT_RTG_IR_RTGOPS_H +#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h" #include "circt/Dialect/RTG/IR/RTGDialect.h" #include "circt/Dialect/RTG/IR/RTGTypeInterfaces.h" #include "circt/Dialect/RTG/IR/RTGTypes.h" diff --git a/include/circt/Dialect/RTGTest/IR/CMakeLists.txt b/include/circt/Dialect/RTGTest/IR/CMakeLists.txt index b626a42f79c1..05226c9aca09 100644 --- a/include/circt/Dialect/RTGTest/IR/CMakeLists.txt +++ b/include/circt/Dialect/RTGTest/IR/CMakeLists.txt @@ -8,3 +8,7 @@ set(LLVM_TARGET_DEFINITIONS RTGTestAttributes.td) mlir_tablegen(RTGTestEnums.h.inc -gen-enum-decls) mlir_tablegen(RTGTestEnums.cpp.inc -gen-enum-defs) add_public_tablegen_target(CIRCTRTGTestEnumsIncGen) + +mlir_tablegen(RTGTestAttributes.h.inc -gen-attrdef-decls) +mlir_tablegen(RTGTestAttributes.cpp.inc -gen-attrdef-defs) +add_public_tablegen_target(CIRCTRTGTestAttributeIncGen) diff --git a/include/circt/Dialect/RTGTest/IR/RTGTest.td b/include/circt/Dialect/RTGTest/IR/RTGTest.td index a08dd4284234..f57332968ad2 100644 --- a/include/circt/Dialect/RTGTest/IR/RTGTest.td +++ b/include/circt/Dialect/RTGTest/IR/RTGTest.td @@ -22,6 +22,7 @@ include "circt/Dialect/RTG/IR/RTGInterfaces.td" include "circt/Dialect/RTGTest/IR/RTGTestDialect.td" include "circt/Dialect/RTGTest/IR/RTGTestAttributes.td" include "circt/Dialect/RTGTest/IR/RTGTestTypes.td" +include "circt/Dialect/RTGTest/IR/RTGTestAttributes.td" include "circt/Dialect/RTGTest/IR/RTGTestOps.td" #endif // CIRCT_DIALECT_RTGTEST_IR_RTGTEST_TD diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.h b/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.h new file mode 100644 index 000000000000..08d734841285 --- /dev/null +++ b/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.h @@ -0,0 +1,21 @@ +//===- RTGTestAttributes.h - RTG Test dialect attributes --------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_H +#define CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_H + +#include "circt/Dialect/RTGTest/IR/RTGTestTypes.h" +#include "mlir/IR/Attributes.h" +#include "mlir/IR/BuiltinAttributes.h" + +#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h" + +#define GET_ATTRDEF_CLASSES +#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.h.inc" + +#endif // CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_H diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.td b/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.td index 7802ded8ad10..1ce4fdd358cb 100644 --- a/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.td +++ b/include/circt/Dialect/RTGTest/IR/RTGTestAttributes.td @@ -13,6 +13,8 @@ #ifndef CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_TD #define CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_TD +include "circt/Dialect/RTGTest/IR/RTGTestDialect.td" +include "circt/Dialect/RTG/IR/RTGInterfaces.td" include "mlir/IR/AttrTypeBase.td" include "mlir/IR/EnumAttr.td" @@ -57,4 +59,21 @@ def RegisterAttr : I32EnumAttr< let cppNamespace = "::circt::rtgtest"; } +class RTGTestAttrDef traits = []> + : AttrDef; + +def CPUAttr : RTGTestAttrDef<"CPU", [ContextResourceAttrInterface]> { + let summary = "this attribute represents a CPU referred to by the core ID"; + + let parameters = (ins "size_t":$id); + + let mnemonic = "cpu"; + let assemblyFormat = "`<` $id `>`"; + + let extraClassDeclaration = [{ + // TypedAttrInterface + Type getType() const; + }]; +} + #endif // CIRCT_DIALECT_RTGTEST_IR_RTGTESTATTRIBUTES_TD diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestDialect.td b/include/circt/Dialect/RTGTest/IR/RTGTestDialect.td index 1c9eaef9a1bc..fe9a00d2fccb 100644 --- a/include/circt/Dialect/RTGTest/IR/RTGTestDialect.td +++ b/include/circt/Dialect/RTGTest/IR/RTGTestDialect.td @@ -26,9 +26,11 @@ def RTGTestDialect : Dialect { }]; let useDefaultTypePrinterParser = 1; + let useDefaultAttributePrinterParser = 1; let cppNamespace = "::circt::rtgtest"; let extraClassDeclaration = [{ + void registerAttributes(); void registerTypes(); }]; } diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestOps.h b/include/circt/Dialect/RTGTest/IR/RTGTestOps.h index c9d82b857fd9..35cf936017c3 100644 --- a/include/circt/Dialect/RTGTest/IR/RTGTestOps.h +++ b/include/circt/Dialect/RTGTest/IR/RTGTestOps.h @@ -16,6 +16,7 @@ #include "circt/Dialect/RTG/IR/RTGISAAssemblyOpInterfaces.h" #include "circt/Dialect/RTG/IR/RTGOpInterfaces.h" #include "circt/Dialect/RTG/IR/RTGOps.h" +#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.h" #include "circt/Dialect/RTGTest/IR/RTGTestDialect.h" #include "circt/Dialect/RTGTest/IR/RTGTestTypes.h" #include "circt/Support/LLVM.h" diff --git a/include/circt/Dialect/RTGTest/IR/RTGTestOps.td b/include/circt/Dialect/RTGTest/IR/RTGTestOps.td index 037f8456e6ec..1f34c6ec45d7 100644 --- a/include/circt/Dialect/RTGTest/IR/RTGTestOps.td +++ b/include/circt/Dialect/RTGTest/IR/RTGTestOps.td @@ -22,7 +22,9 @@ class RTGTestOp traits = []> : def CPUDeclOp : RTGTestOp<"cpu_decl", [ Pure, + ConstantLike, ContextResourceDefining, + FirstAttrDerivedResultType, ]> { let summary = "declare a CPU"; let description = [{ @@ -30,10 +32,11 @@ def CPUDeclOp : RTGTestOp<"cpu_decl", [ taking advantage of it. }]; - let arguments = (ins IndexAttr:$id); + let arguments = (ins CPUAttr:$id); let results = (outs CPUType:$cpu); let assemblyFormat = "$id attr-dict"; + let hasFolder = 1; } def ConstantTestOp : RTGTestOp<"constant_test", [ diff --git a/integration_test/Bindings/Python/dialects/rtg.py b/integration_test/Bindings/Python/dialects/rtg.py index 58c055e44321..c56d5f9c7127 100644 --- a/integration_test/Bindings/Python/dialects/rtg.py +++ b/integration_test/Bindings/Python/dialects/rtg.py @@ -19,16 +19,17 @@ target = rtg.TargetOp('target_name', TypeAttr.get(dictTy)) targetBlock = Block.create_at_start(target.bodyRegion, []) with InsertionPoint(targetBlock): - cpu0 = rtgtest.CPUDeclOp(0) - cpu1 = rtgtest.CPUDeclOp(1) + cpuAttr = rtgtest.CPUAttr.get(0) + cpu0 = rtgtest.CPUDeclOp(cpuAttr) + cpu1 = rtgtest.CPUDeclOp(rtgtest.CPUAttr.get(cpuAttr.id + 1)) rtg.YieldOp([cpu0, cpu1]) test = rtg.TestOp('test_name', TypeAttr.get(dictTy)) Block.create_at_start(test.bodyRegion, [cpuTy, cpuTy]) # CHECK: rtg.target @target_name : !rtg.dict { - # CHECK: [[V0:%.+]] = rtgtest.cpu_decl 0 - # CHECK: [[V1:%.+]] = rtgtest.cpu_decl 1 + # CHECK: [[V0:%.+]] = rtgtest.cpu_decl <0> + # CHECK: [[V1:%.+]] = rtgtest.cpu_decl <1> # CHECK: rtg.yield [[V0]], [[V1]] : !rtgtest.cpu, !rtgtest.cpu # CHECK: } # CHECK: rtg.test @test_name : !rtg.dict { diff --git a/lib/Bindings/Python/RTGTestModule.cpp b/lib/Bindings/Python/RTGTestModule.cpp index b2c2e496ac75..9e69d6ac3491 100644 --- a/lib/Bindings/Python/RTGTestModule.cpp +++ b/lib/Bindings/Python/RTGTestModule.cpp @@ -31,4 +31,14 @@ void circt::python::populateDialectRTGTestSubmodule(py::module &m) { return cls(rtgtestCPUTypeGet(ctxt)); }, py::arg("self"), py::arg("ctxt") = nullptr); + + mlir_attribute_subclass(m, "CPUAttr", rtgtestAttrIsACPU) + .def_classmethod( + "get", + [](py::object cls, unsigned id, MlirContext ctxt) { + return cls(rtgtestCPUAttrGet(ctxt, id)); + }, + py::arg("self"), py::arg("id"), py::arg("ctxt") = nullptr) + .def_property_readonly( + "id", [](MlirAttribute self) { return rtgtestCPUAttrGetId(self); }); } diff --git a/lib/CAPI/Dialect/RTGTest.cpp b/lib/CAPI/Dialect/RTGTest.cpp index a4564b94e08b..a46996942efc 100644 --- a/lib/CAPI/Dialect/RTGTest.cpp +++ b/lib/CAPI/Dialect/RTGTest.cpp @@ -7,6 +7,7 @@ //===----------------------------------------------------------------------===// #include "circt-c/Dialect/RTGTest.h" +#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.h" #include "circt/Dialect/RTGTest/IR/RTGTestDialect.h" #include "circt/Dialect/RTGTest/IR/RTGTestTypes.h" @@ -30,3 +31,19 @@ bool rtgtestTypeIsACPU(MlirType type) { return isa(unwrap(type)); } MlirType rtgtestCPUTypeGet(MlirContext ctxt) { return wrap(CPUType::get(unwrap(ctxt))); } + +//===----------------------------------------------------------------------===// +// Attribute API. +//===----------------------------------------------------------------------===// + +bool rtgtestAttrIsACPU(MlirAttribute attr) { + return isa(unwrap(attr)); +} + +MlirAttribute rtgtestCPUAttrGet(MlirContext ctxt, unsigned id) { + return wrap(CPUAttr::get(unwrap(ctxt), id)); +} + +unsigned rtgtestCPUAttrGetId(MlirAttribute attr) { + return cast(unwrap(attr)).getId(); +} diff --git a/lib/Dialect/RTG/IR/CMakeLists.txt b/lib/Dialect/RTG/IR/CMakeLists.txt index 2466e6fa79f1..63241efb5f51 100644 --- a/lib/Dialect/RTG/IR/CMakeLists.txt +++ b/lib/Dialect/RTG/IR/CMakeLists.txt @@ -1,20 +1,22 @@ add_circt_dialect_library(CIRCTRTGDialect + RTGAttrInterfaces.cpp RTGDialect.cpp RTGISAAssemblyOpInterfaces.cpp RTGOpInterfaces.cpp RTGOps.cpp - RTGTypes.cpp RTGTypeInterfaces.cpp + RTGTypes.cpp ADDITIONAL_HEADER_DIRS ${CIRCT_MAIN_INCLUDE_DIR}/circt/Dialect/RTG/IR DEPENDS - MLIRRTGIncGen + CIRCTRTGAttrInterfacesIncGen CIRCTRTGEnumsIncGen - CIRCTRTGOpInterfacesIncGen CIRCTRTGISAAssemblyOpInterfacesIncGen + CIRCTRTGOpInterfacesIncGen CIRCTRTGTypeInterfacesIncGen + MLIRRTGIncGen LINK_LIBS PUBLIC MLIRIR diff --git a/lib/Dialect/RTG/IR/RTGAttrInterfaces.cpp b/lib/Dialect/RTG/IR/RTGAttrInterfaces.cpp new file mode 100644 index 000000000000..d95ab5bfa914 --- /dev/null +++ b/lib/Dialect/RTG/IR/RTGAttrInterfaces.cpp @@ -0,0 +1,19 @@ +//===- RTGAttrInterfaces.cpp - Implement the RTG attr interfaces ----------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the RTG attr interfaces. +// +//===----------------------------------------------------------------------===// + +#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.h" + +//===----------------------------------------------------------------------===// +// TableGen generated logic. +//===----------------------------------------------------------------------===// + +#include "circt/Dialect/RTG/IR/RTGAttrInterfaces.cpp.inc" diff --git a/lib/Dialect/RTGTest/IR/CMakeLists.txt b/lib/Dialect/RTGTest/IR/CMakeLists.txt index 47579510bc35..427bfd8b26ee 100644 --- a/lib/Dialect/RTGTest/IR/CMakeLists.txt +++ b/lib/Dialect/RTGTest/IR/CMakeLists.txt @@ -1,4 +1,5 @@ add_circt_dialect_library(CIRCTRTGTestDialect + RTGTestAttributes.cpp RTGTestDialect.cpp RTGTestOps.cpp RTGTestTypes.cpp @@ -9,6 +10,7 @@ add_circt_dialect_library(CIRCTRTGTestDialect DEPENDS MLIRRTGTestIncGen CIRCTRTGTestEnumsIncGen + CIRCTRTGTestAttributeIncGen LINK_LIBS PUBLIC MLIRIR diff --git a/lib/Dialect/RTGTest/IR/RTGTestAttributes.cpp b/lib/Dialect/RTGTest/IR/RTGTestAttributes.cpp new file mode 100644 index 000000000000..9779f3b867bb --- /dev/null +++ b/lib/Dialect/RTGTest/IR/RTGTestAttributes.cpp @@ -0,0 +1,36 @@ +//===- RTGTestAttributes.cpp ----------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.h" +#include "circt/Dialect/RTGTest/IR/RTGTestDialect.h" +#include "mlir/IR/Builders.h" +#include "mlir/IR/DialectImplementation.h" +#include "llvm/ADT/TypeSwitch.h" + +using namespace circt; +using namespace rtgtest; + +//===----------------------------------------------------------------------===// +// CPUAttr +//===----------------------------------------------------------------------===// + +Type CPUAttr::getType() const { return rtgtest::CPUType::get(getContext()); } + +//===----------------------------------------------------------------------===// +// TableGen generated logic. +//===----------------------------------------------------------------------===// + +void RTGTestDialect::registerAttributes() { + addAttributes< +#define GET_ATTRDEF_LIST +#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.cpp.inc" + >(); +} + +#define GET_ATTRDEF_CLASSES +#include "circt/Dialect/RTGTest/IR/RTGTestAttributes.cpp.inc" diff --git a/lib/Dialect/RTGTest/IR/RTGTestDialect.cpp b/lib/Dialect/RTGTest/IR/RTGTestDialect.cpp index af3db5aae9dd..f93f1511a990 100644 --- a/lib/Dialect/RTGTest/IR/RTGTestDialect.cpp +++ b/lib/Dialect/RTGTest/IR/RTGTestDialect.cpp @@ -26,6 +26,7 @@ using namespace rtgtest; void RTGTestDialect::initialize() { registerTypes(); + registerAttributes(); // Register operations. addOperations< #define GET_OP_LIST diff --git a/lib/Dialect/RTGTest/IR/RTGTestOps.cpp b/lib/Dialect/RTGTest/IR/RTGTestOps.cpp index d544c4c2f357..809cb920bcde 100644 --- a/lib/Dialect/RTGTest/IR/RTGTestOps.cpp +++ b/lib/Dialect/RTGTest/IR/RTGTestOps.cpp @@ -21,7 +21,9 @@ using namespace rtgtest; // CPUDeclOp //===----------------------------------------------------------------------===// -size_t CPUDeclOp::getIdentifier(size_t idx) { return getId().getZExtValue(); } +size_t CPUDeclOp::getIdentifier(size_t idx) { return getId().getId(); } + +mlir::OpFoldResult CPUDeclOp::fold(FoldAdaptor adaptor) { return getId(); } //===----------------------------------------------------------------------===// // ConstantTestOp diff --git a/test/CAPI/rtgtest.c b/test/CAPI/rtgtest.c index e14f27667a62..fdd76426aeb2 100644 --- a/test/CAPI/rtgtest.c +++ b/test/CAPI/rtgtest.c @@ -21,11 +21,23 @@ static void testCPUType(MlirContext ctx) { mlirTypeDump(cpuTy); } +static void testCPUAttr(MlirContext ctx) { + MlirAttribute cpuAttr = rtgtestCPUAttrGet(ctx, 3); + + // CHECK: is_cpu + fprintf(stderr, rtgtestAttrIsACPU(cpuAttr) ? "is_cpu\n" : "isnot_cpu\n"); + // CHECK: 3 + fprintf(stderr, "%u\n", rtgtestCPUAttrGetId(cpuAttr)); + // CHECK: #rtgtest.cpu<3> + mlirAttributeDump(cpuAttr); +} + int main(int argc, char **argv) { MlirContext ctx = mlirContextCreate(); mlirDialectHandleLoadDialect(mlirGetDialectHandle__rtgtest__(), ctx); testCPUType(ctx); + testCPUAttr(ctx); mlirContextDestroy(ctx); diff --git a/test/Dialect/RTGTest/IR/basic.mlir b/test/Dialect/RTGTest/IR/basic.mlir index 57fc7daf16c9..9923bda48e04 100644 --- a/test/Dialect/RTGTest/IR/basic.mlir +++ b/test/Dialect/RTGTest/IR/basic.mlir @@ -3,8 +3,8 @@ // CHECK-LABEL: @cpus // CHECK-SAME: !rtgtest.cpu rtg.target @cpus : !rtg.dict { - // CHECK: rtgtest.cpu_decl 0 - %0 = rtgtest.cpu_decl 0 + // CHECK: rtgtest.cpu_decl <0> + %0 = rtgtest.cpu_decl <0> rtg.yield %0 : !rtgtest.cpu }