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12 | 12 |
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13 | 13 | /dts-v1/;
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14 | 14 | #include "dt-bindings/clock/microchip,mpfs-clock.h"
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| 15 | +#include <dt-bindings/media/microchip-common.h> |
15 | 16 |
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16 | 17 | / {
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17 | 18 | #address-cells = <2>;
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203 | 204 | #clock-cells = <0>;
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204 | 205 | };
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205 | 206 |
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| 207 | + axiclk: axi-aclk0 { |
| 208 | + compatible = "fixed-clock"; |
| 209 | + #clock-cells = <0>; |
| 210 | + clock-frequency = <125000000>; |
| 211 | + }; |
| 212 | + |
| 213 | + videoclk: video-aclk0 { |
| 214 | + compatible = "fixed-clock"; |
| 215 | + #clock-cells = <0>; |
| 216 | + clock-frequency = <125000000>; |
| 217 | + }; |
| 218 | + |
206 | 219 | syscontroller: syscontroller {
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207 | 220 | compatible = "microchip,pic64gx-sys-controller";
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208 | 221 | mboxes = <&mbox 0>;
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619 | 632 | clocks = <&refclk>;
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620 | 633 | #clock-cells = <1>;
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621 | 634 | };
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| 635 | + |
| 636 | + bus1: bus@40000000 { |
| 637 | + compatible = "simple-bus"; |
| 638 | + #address-cells = <2>; |
| 639 | + #size-cells = <2>; |
| 640 | + ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>, /* FIC3-FAB */ |
| 641 | + <0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>, /* FIC0, LO */ |
| 642 | + <0x0 0xe0000000 0x0 0xe0000000 0x0 0x20000000>, /* FIC1, LO */ |
| 643 | + <0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */ |
| 644 | + <0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */ |
| 645 | + |
| 646 | + dma-ranges = <0x14 0x0 0x0 0x80000000 0x0 0x40000000>; |
| 647 | + |
| 648 | + /* Camera YUV422 pipeline */ |
| 649 | + mchp_vdma_cam: video-pipeline@60000000 { |
| 650 | + compatible = "microchip,pic64gx-video-dma", |
| 651 | + "microchip,video-dma-rtl-v0"; |
| 652 | + reg = <0x0 0x60000000 0x0 0x1000>; |
| 653 | + interrupt-parent = <&plic>; |
| 654 | + interrupts = <118>; |
| 655 | + dma-noncoherent; |
| 656 | + clock-names = "axi", "video"; |
| 657 | + clocks = <&axiclk>, <&videoclk>; |
| 658 | + status = "disabled"; |
| 659 | + |
| 660 | + ports { |
| 661 | + #address-cells = <1>; |
| 662 | + #size-cells = <0>; |
| 663 | + |
| 664 | + port@0 { |
| 665 | + /* Sink port */ |
| 666 | + reg = <0>; |
| 667 | + mchp_vdma_ep_cam: endpoint { |
| 668 | + remote-endpoint = <&rgbtoyuv422_out>; |
| 669 | + }; |
| 670 | + }; |
| 671 | + |
| 672 | + }; |
| 673 | + }; |
| 674 | + |
| 675 | + rgbtoyuv422: generic-video-pipeline-connector@60007000 { |
| 676 | + compatible = "microchip,pic64gx-generic-video-pipeline-connector", |
| 677 | + "microchip,generic-video-pipeline-connector"; |
| 678 | + reg = <0x0 0x60007000 0x0 0x1000>; |
| 679 | + status = "disabled"; |
| 680 | + |
| 681 | + ports { |
| 682 | + #address-cells = <1>; |
| 683 | + #size-cells = <0>; |
| 684 | + |
| 685 | + port@0 { |
| 686 | + reg = <0>; |
| 687 | + microchip,video-format = <MVCF_RGB>; |
| 688 | + microchip,video-width = <8>; |
| 689 | + rgbtoyuv422_in: endpoint { |
| 690 | + remote-endpoint = <&rgb_scaler_out>; |
| 691 | + }; |
| 692 | + }; |
| 693 | + port@1 { |
| 694 | + reg = <1>; |
| 695 | + microchip,video-format = <MVCF_YUV_422>; |
| 696 | + microchip,video-width = <8>; |
| 697 | + rgbtoyuv422_out: endpoint { |
| 698 | + remote-endpoint = <&mchp_vdma_ep_cam>; |
| 699 | + }; |
| 700 | + }; |
| 701 | + }; |
| 702 | + }; |
| 703 | + |
| 704 | + rgb_scaler: rgb-scaler@60005000 { |
| 705 | + compatible = "microchip,pic64gx-rgb-scaler", |
| 706 | + "microchip,rgb-scaler-rtl-v1"; |
| 707 | + reg = <0x0 0x60005000 0x0 0x1000>; |
| 708 | + status = "disabled"; |
| 709 | + |
| 710 | + ports { |
| 711 | + #address-cells = <1>; |
| 712 | + #size-cells = <0>; |
| 713 | + |
| 714 | + port@0 { |
| 715 | + reg = <0>; |
| 716 | + rgb_scaler_in: endpoint { |
| 717 | + remote-endpoint = <&image_enhancement_out>; |
| 718 | + }; |
| 719 | + }; |
| 720 | + port@1 { |
| 721 | + reg = <1>; |
| 722 | + rgb_scaler_out: endpoint { |
| 723 | + remote-endpoint = <&rgbtoyuv422_in>; |
| 724 | + }; |
| 725 | + }; |
| 726 | + }; |
| 727 | + }; |
| 728 | + |
| 729 | + image_enhancement: image-enhancement@60004000 { |
| 730 | + compatible = "microchip,pic64gx-image-enhancement", |
| 731 | + "microchip,image-enhancement-rtl-v1"; |
| 732 | + reg = <0x0 0x60004000 0x0 0x1000>; |
| 733 | + status = "disabled"; |
| 734 | + |
| 735 | + ports { |
| 736 | + #address-cells = <1>; |
| 737 | + #size-cells = <0>; |
| 738 | + |
| 739 | + port@0 { |
| 740 | + reg = <0>; |
| 741 | + image_enhancement_in: endpoint { |
| 742 | + remote-endpoint = <&white_balance_out>; |
| 743 | + }; |
| 744 | + }; |
| 745 | + port@1 { |
| 746 | + reg = <1>; |
| 747 | + image_enhancement_out: endpoint { |
| 748 | + remote-endpoint = <&rgb_scaler_in>; |
| 749 | + }; |
| 750 | + }; |
| 751 | + }; |
| 752 | + }; |
| 753 | + |
| 754 | + white_balance: white-balance@60006000 { |
| 755 | + compatible = "microchip,pic64gx-white-balance", |
| 756 | + "microchip,white-balance-rtl-v1.1"; |
| 757 | + reg = <0x0 0x6000b000 0x0 0x1000>; |
| 758 | + status = "disabled"; |
| 759 | + |
| 760 | + ports { |
| 761 | + #address-cells = <1>; |
| 762 | + #size-cells = <0>; |
| 763 | + |
| 764 | + port@0 { |
| 765 | + reg = <0>; |
| 766 | + white_balance_in: endpoint { |
| 767 | + remote-endpoint = <&mono_to_rgb_out>; |
| 768 | + }; |
| 769 | + }; |
| 770 | + port@1 { |
| 771 | + reg = <1>; |
| 772 | + white_balance_out: endpoint { |
| 773 | + remote-endpoint = <&image_enhancement_in>; |
| 774 | + }; |
| 775 | + }; |
| 776 | + }; |
| 777 | + }; |
| 778 | + |
| 779 | + mono_to_rgb: demosaic@60008000 { |
| 780 | + compatible = "microchip,pic64gx-bayer-interpolation", |
| 781 | + "microchip,bayer-interpolation-rtl-v4.8"; |
| 782 | + reg = <0x0 0x60008000 0x0 0x1000>; |
| 783 | + status = "disabled"; |
| 784 | + |
| 785 | + ports { |
| 786 | + #address-cells = <1>; |
| 787 | + #size-cells = <0>; |
| 788 | + |
| 789 | + port@0 { |
| 790 | + reg = <0>; |
| 791 | + mono_to_rgb_in: endpoint { |
| 792 | + remote-endpoint = <&csi2_out>; |
| 793 | + }; |
| 794 | + }; |
| 795 | + port@1 { |
| 796 | + reg = <1>; |
| 797 | + mono_to_rgb_out: endpoint { |
| 798 | + remote-endpoint = <&white_balance_in>; |
| 799 | + }; |
| 800 | + }; |
| 801 | + }; |
| 802 | + }; |
| 803 | + |
| 804 | + mcsi2rx: csi2rx@6001000 { |
| 805 | + compatible = "microchip,pic64gx-mipi-csi2-rx", |
| 806 | + "microchip,mipi-csi2-rx-rtl-v0"; |
| 807 | + reg = <0x00 0x60001000 0x00 0x1000>; |
| 808 | + interrupt-parent = <&plic>; |
| 809 | + interrupts = <120>; |
| 810 | + microchip,csi-pxl-format = <0x2b>; |
| 811 | + microchip,csi-fixed-out-raw8; |
| 812 | + clock-names = "axi", "video"; |
| 813 | + clocks = <&axiclk>, <&videoclk>; |
| 814 | + status = "disabled"; |
| 815 | + |
| 816 | + ports { |
| 817 | + #address-cells = <1>; |
| 818 | + #size-cells = <0>; |
| 819 | + |
| 820 | + port@1 { |
| 821 | + reg = <1>; |
| 822 | + csi2_out: endpoint { |
| 823 | + remote-endpoint = <&mono_to_rgb_in>; |
| 824 | + }; |
| 825 | + }; |
| 826 | + }; |
| 827 | + }; |
| 828 | + }; |
| 829 | + |
622 | 830 | };
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623 | 831 | };
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