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| 1 | +;=========================== begin_copyright_notice ============================ |
| 2 | +; |
| 3 | +; Copyright (C) 2024 Intel Corporation |
| 4 | +; |
| 5 | +; SPDX-License-Identifier: MIT |
| 6 | +; |
| 7 | +;============================ end_copyright_notice ============================= |
| 8 | +; |
| 9 | +; RUN: igc_opt %s -S -o - -igc-joint-matrix-resolution --platformpvc 2>&1 | FileCheck %s |
| 10 | +; ------------------------------------------------ |
| 11 | +; JointMatrixFuncsResolutionPass |
| 12 | +; ------------------------------------------------ |
| 13 | + |
| 14 | +%spirv.JointMatrixINTEL._int_16_16_3_3_2 = type opaque |
| 15 | +%spirv.JointMatrixINTEL._char_16_16_0_3_0 = type opaque |
| 16 | +%spirv.JointMatrixINTEL._char_16_16_0_3_1 = type opaque |
| 17 | + |
| 18 | +; CHECK-LABEL: @mad_builtin( |
| 19 | +; CHECK-NEXT: [[TMP1:%.*]] = alloca <16 x i32> |
| 20 | +; CHECK-NEXT: [[TMP2:%.*]] = alloca <8 x i16> |
| 21 | +; CHECK-NEXT: [[TMP3:%.*]] = alloca <4 x i32> |
| 22 | +; CHECK-NEXT: [[TMP4:%.*]] = alloca <16 x i32> |
| 23 | +; CHECK-NEXT: [[TMP5:%.*]] = alloca <16 x i32> |
| 24 | +; CHECK-NEXT: store <8 x i16>{{.*}} <8 x i16>* [[TMP2]] |
| 25 | +; CHECK-NEXT: store <4 x i32>{{.*}} <4 x i32>* [[TMP3]] |
| 26 | +; CHECK-NEXT: store <16 x i32> zeroinitializer, <16 x i32>* [[TMP4]] |
| 27 | +; CHECK-NEXT: [[TMP6:%.*]] = bitcast <8 x i16>* [[TMP2]] to i8* |
| 28 | +; CHECK-NEXT: [[TMP7:%.*]] = bitcast <4 x i32>* [[TMP3]] to i8* |
| 29 | +; CHECK-NEXT: [[TMP8:%.*]] = bitcast <16 x i32>* [[TMP4]] to i8* |
| 30 | +; CHECK-NEXT: [[TMP9:%.*]] = bitcast <16 x i32>* [[TMP5]] to i8* |
| 31 | +; CHECK-NEXT: call void @__builtin_spriv_OpJointMatrixMadINTEL_16x16x16_s8_s8_i32(i8* [[TMP6]], i8* [[TMP7]], i8* [[TMP8]], i8* [[TMP9]]) |
| 32 | +; CHECK-NEXT: [[TMP10:%.*]] = load <16 x i32>, <16 x i32>* [[TMP5]] |
| 33 | +; CHECK-NEXT: store <16 x i32> [[TMP10]], <16 x i32>* [[TMP1]] |
| 34 | +; CHECK-NEXT: [[TMP11:%.*]] = bitcast <16 x i32>* [[TMP1]] to i8* |
| 35 | +; CHECK-NEXT: call void @__builtin_spriv_OpJointMatrixStoreINTEL_Accumulator_RowMajor_SG16_16x16_i32_16_global_pi64_v8i8(i32 addrspace(1)* [[DST:%.*]], i8* [[TMP11]], i64 [[STRIDE:%.*]]) |
| 36 | +; CHECK-NEXT: ret void |
| 37 | +; CHECK-NOT: error: |
| 38 | + |
| 39 | +define spir_kernel void @mad_builtin(i8 addrspace(1)* %src, i64 %stride, i32 addrspace(1)* %dst) { |
| 40 | + %1 = call spir_func %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)* @_Z26__spirv_CompositeConstructi(i32 0) |
| 41 | + %2 = call spir_func %spirv.JointMatrixINTEL._char_16_16_0_3_0 addrspace(1)* @_Z79__spirv_CompositeConstructi(i8 1) |
| 42 | + %3 = call spir_func %spirv.JointMatrixINTEL._char_16_16_0_3_1 addrspace(1)* @_Z80__spirv_CompositeConstructi(i8 -1) |
| 43 | + %4 = call spir_func %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)* @_Z27__spirv_JointMatrixMadINTELPU3AS141__spirv_JointMatrixINTEL__char_16_16_0_3_0PU3AS142__spirv_JointMatrixINTEL__char_16_16_0_3_1PU3AS140__spirv_JointMatrixINTEL__int_16_16_3_3_2i(%spirv.JointMatrixINTEL._char_16_16_0_3_0 addrspace(1)* %2, %spirv.JointMatrixINTEL._char_16_16_0_3_1 addrspace(1)* %3, %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)* %1, i32 3) |
| 44 | + call spir_func void @_Z29__spirv_JointMatrixStoreINTELPU3AS1iPU3AS140__spirv_JointMatrixINTEL__int_16_16_3_3_2liii(i32 addrspace(1)* %dst, %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)* %4, i64 %stride, i32 0, i32 3, i32 0) |
| 45 | + ret void |
| 46 | +} |
| 47 | + |
| 48 | +declare spir_func %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)* @_Z26__spirv_CompositeConstructi(i32) |
| 49 | +declare spir_func %spirv.JointMatrixINTEL._char_16_16_0_3_0 addrspace(1)* @_Z79__spirv_CompositeConstructi(i8) |
| 50 | +declare spir_func %spirv.JointMatrixINTEL._char_16_16_0_3_1 addrspace(1)* @_Z80__spirv_CompositeConstructi(i8) |
| 51 | +declare spir_func %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)* @_Z27__spirv_JointMatrixMadINTELPU3AS141__spirv_JointMatrixINTEL__char_16_16_0_3_0PU3AS142__spirv_JointMatrixINTEL__char_16_16_0_3_1PU3AS140__spirv_JointMatrixINTEL__int_16_16_3_3_2i(%spirv.JointMatrixINTEL._char_16_16_0_3_0 addrspace(1)*, %spirv.JointMatrixINTEL._char_16_16_0_3_1 addrspace(1)*, %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)*, i32) |
| 52 | +declare spir_func void @_Z29__spirv_JointMatrixStoreINTELPU3AS1iPU3AS140__spirv_JointMatrixINTEL__int_16_16_3_3_2liii(i32 addrspace(1)*, %spirv.JointMatrixINTEL._int_16_16_3_3_2 addrspace(1)*, i64, i32, i32, i32) |
| 53 | + |
| 54 | +!igc.functions = !{!0} |
| 55 | +!0 = !{void (i8 addrspace(1)*, i64, i32 addrspace(1)*)* @mad_builtin, !1} |
| 56 | +!1 = !{!2, !3} |
| 57 | +!2 = !{!"function_type", i32 0} |
| 58 | +!3 = !{!"sub_group_size", i32 16} |
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