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[experimental][regression] Add ROCM Regression test. (iree-org#14861)
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.github/workflows/pkgci.yml

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@@ -35,7 +35,12 @@ jobs:
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uses: ./.github/workflows/pkgci_regression_test_cpu.yml
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needs: [build_packages]
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regression_test_amdgpu:
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name: Regression Test AMDGPU
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uses: ./.github/workflows/pkgci_regression_test_amdgpu.yml
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regression_test_amdgpu_vulkan:
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name: Regression Test AMDGPU-Vulkan
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uses: ./.github/workflows/pkgci_regression_test_amdgpu_vulkan.yml
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needs: [build_packages]
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regression_test_amdgpu_rocm:
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name: Regression Test AMDGPU-ROCm
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uses: ./.github/workflows/pkgci_regression_test_amdgpu_rocm.yml
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needs: [build_packages]
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@@ -0,0 +1,52 @@
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# Copyright 2023 The IREE Authors
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#
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# Licensed under the Apache License v2.0 with LLVM Exceptions.
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# See https://llvm.org/LICENSE.txt for license information.
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# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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name: PkgCI Regression Test (AMDGPU)
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on:
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workflow_call:
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inputs:
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artifact_run_id:
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type: string
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default: ""
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workflow_dispatch:
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inputs:
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artifact_run_id:
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type: string
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default: ""
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jobs:
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linux_x86_64:
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name: Linux (x86_64)
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runs-on: nodai-amdgpu-w7900-x86-64
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env:
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PACKAGE_DOWNLOAD_DIR: ${{ github.workspace }}/.packages
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IREERS_ARTIFACT_DIR: ${{ github.workspace }}/artifacts
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VENV_DIR: ${{ github.workspace }}/venv
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steps:
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- name: Checking out repository
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uses: actions/checkout@8f4b7f84864484a7bf31766abe9204da3cbe65b3 # v3.5.0
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with:
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submodules: false
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- uses: actions/setup-python@61a6322f88396a6271a6ee3565807d608ecaddd1 # v4.7.0
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with:
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# Must match the subset of versions built in pkgci_build_packages.
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python-version: '3.11'
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- uses: actions/download-artifact@9bc31d5ccc31df68ecc42ccf4149144866c47d8a # v3.0.2
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with:
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name: linux_x86_64_release_packages
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path: ${{ env.PACKAGE_DOWNLOAD_DIR }}
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- name: Setup venv
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run: |
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./build_tools/pkgci/setup_venv.py $VENV_DIR \
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--artifact-path=${PACKAGE_DOWNLOAD_DIR} \
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--fetch-gh-workflow=${{ inputs.artifact_run_id }}
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- name: Run Tests
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run: |
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source $VENV_DIR/bin/activate
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export LD_LIBRARY_PATH=$LD_LIBRARY_PATH:/opt/rocm/lib:/opt/rocm/hip/lib
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pytest \
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-s -m "plat_rdna3_rocm and presubmit" \
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experimental/regression_suite

.gitignore

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@@ -68,6 +68,7 @@ docs/website/site/
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# Temporary files
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iree/builtins/**/bin/*.ll
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artifacts/
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# Archive files
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*.tar

build_tools/pkgci/build_linux_packages.sh

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@@ -188,10 +188,12 @@ function build_wheel() {
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function build_iree_runtime() {
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# We install the needed build deps below for the tools.
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IREE_RUNTIME_BUILD_TRACY=ON IREE_RUNTIME_BUILD_TRACY_TOOLS=ON \
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IREE_EXTERNAL_HAL_DRIVERS="rocm" \
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build_wheel runtime/
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}
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function build_iree_compiler() {
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IREE_TARGET_BACKEND_ROCM=ON IREE_ENABLE_LLD=ON \
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build_wheel compiler/
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}
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compiler/setup.py

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@@ -260,6 +260,8 @@ def prepare_installation():
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"-DCMAKE_BUILD_TYPE={}".format(cfg),
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# TODO(scotttodd): include IREE_TARGET_BACKEND_WEBGPU here (and in env)
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get_env_cmake_option("IREE_ENABLE_CPUINFO", "ON"),
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get_env_cmake_option("IREE_TARGET_BACKEND_ROCM", "ON"),
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get_env_cmake_option("IREE_ENABLE_LLD", "OFF"),
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]
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cmake_args.extend(get_cmake_version_info_args())
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compiler/src/iree/compiler/Dialect/HAL/Target/ROCM/ROCMTargetUtils.cpp

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@@ -128,7 +128,7 @@ void linkROCDLIfNecessary(llvm::Module *module, std::string targetChip,
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//===========Link LLVM Module to ROCDL End===================/
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//=====================Create HSACO Begin=============//
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// Link object file using ld.lld lnker to generate code object
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// Link object file using lld lnker to generate code object
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// Inspiration from this section comes from LLVM-PROJECT-MLIR by
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// ROCmSoftwarePlatform
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// https://github.com/ROCmSoftwarePlatform/llvm-project-mlir/blob/miopen-dialect/mlir/lib/ExecutionEngine/ROCm/BackendUtils.cpp

experimental/regression_suite/pyproject.toml

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@@ -7,6 +7,7 @@ markers = [
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"plat_host_cpu: mark tests as running on the host CPU",
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"plat_rdna3_vulkan: mark tests as running on AMD RDNA3 Vulkan device",
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"plat_nvidia_a100: mark tests as running on NVIDIA A100 device",
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"plat_rdna3_rocm: mark tests as running on AMD RDNA3 ROCm device",
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"presubmit: mark test as running on presubmit",
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"postsubmit: mark test as running on postsubmit",
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"unstable_linalg: mark test as depending on unstable, serialized linalg IR",

experimental/regression_suite/tests/pregenerated/test_llama2.py

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@@ -94,6 +94,20 @@ def llama2_7b_f16qi4_stripped_sm80_cuda_vmfb(llama2_7b_f16qi4_stripped_source):
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)
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@pytest.fixture
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def llama2_7b_f16qi4_stripped_rdna3_rocm_vmfb(llama2_7b_f16qi4_stripped_source):
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return iree_compile(
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llama2_7b_f16qi4_stripped_source,
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"rdna3_rocm",
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flags=COMMON_FLAGS
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+ [
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"--iree-hal-target-backends=rocm",
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"--iree-rocm-target-chip=gfx1100",
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"--iree-rocm-link-bc=true",
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],
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)
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@pytest.fixture
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def llama2_7b_f16qi4_sm80_cuda_vmfb(llama2_7b_f16qi4_source):
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return iree_compile(
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)
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@pytest.mark.presubmit
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@pytest.mark.unstable_linalg
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@pytest.mark.plat_rdna3_rocm
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def test_step_rdna3_rocm_stripped(llama2_7b_f16qi4_stripped_rdna3_rocm_vmfb):
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iree_benchmark_module(
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llama2_7b_f16qi4_stripped_rdna3_rocm_vmfb,
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device="rocm",
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function="first_vicuna_forward",
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args=[
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"--input=1x1xi64",
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],
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)
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iree_benchmark_module(
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llama2_7b_f16qi4_stripped_rdna3_rocm_vmfb,
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device="rocm",
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function="second_vicuna_forward",
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args=[
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"--input=1x1xi64",
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]
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+ (["--input=1x32x1x128xf16"] * 64),
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)
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###############################################################################
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# Correctness
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###############################################################################

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