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cmd/compile: be more conservative about arm64 insns that can take zero register
It's really only needed for stores and store-like instructions (atomic exchange, compare-and-swap, ...). Fixes #73180 Change-Id: I8ecd833a301355adf0fa4bff43250091640c6226 Reviewed-on: https://go-review.googlesource.com/c/go/+/663155 Reviewed-by: Cherry Mui <[email protected]> LUCI-TryBot-Result: Go LUCI <[email protected]> Reviewed-by: Keith Randall <[email protected]>
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src/cmd/compile/internal/ssa/_gen/ARM64Ops.go

Lines changed: 19 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -138,17 +138,17 @@ func init() {
138138
// Common individual register masks
139139
var (
140140
gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30")
141-
gpg = gp | buildReg("g") | buildReg("ZERO")
142-
gpsp = gp | buildReg("SP") | buildReg("ZERO")
143-
gpspg = gpg | buildReg("SP") | buildReg("ZERO")
144-
gpspsbg = gpspg | buildReg("SB") | buildReg("ZERO")
141+
gpg = gp | buildReg("g")
142+
gpsp = gp | buildReg("SP")
143+
gpspg = gpg | buildReg("SP")
144+
gpspsbg = gpspg | buildReg("SB")
145145
fp = buildReg("F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31")
146146
callerSave = gp | fp | buildReg("g") // runtime.setg (and anything calling it) may clobber g
147147
r0 = buildReg("R0")
148148
r1 = buildReg("R1")
149149
r2 = buildReg("R2")
150150
r3 = buildReg("R3")
151-
rz = buildReg("ZERO") // TODO: when 71651 is fixed, we might be able to remove uses of this
151+
rz = buildReg("ZERO")
152152
)
153153
// Common regInfo
154154
var (
@@ -165,14 +165,14 @@ func init() {
165165
gp2flags = regInfo{inputs: []regMask{gpg, gpg}}
166166
gp2flags1 = regInfo{inputs: []regMask{gp, gp}, outputs: []regMask{gp}}
167167
gp2flags1flags = regInfo{inputs: []regMask{gp, gp, 0}, outputs: []regMask{gp, 0}}
168-
gp2load = regInfo{inputs: []regMask{gpspsbg &^ rz, gpg}, outputs: []regMask{gp}}
168+
gp2load = regInfo{inputs: []regMask{gpspsbg, gpg}, outputs: []regMask{gp}}
169169
gp31 = regInfo{inputs: []regMask{gpg, gpg, gpg}, outputs: []regMask{gp}}
170-
gpload = regInfo{inputs: []regMask{gpspsbg &^ rz}, outputs: []regMask{gp}}
171-
gpload2 = regInfo{inputs: []regMask{gpspsbg &^ rz}, outputs: []regMask{gpg, gpg}}
172-
gpstore = regInfo{inputs: []regMask{gpspsbg &^ rz, gpg}}
173-
gpstore2 = regInfo{inputs: []regMask{gpspsbg &^ rz, gpg, gpg}}
174-
gpxchg = regInfo{inputs: []regMask{gpspsbg &^ rz, gpg}, outputs: []regMask{gp}}
175-
gpcas = regInfo{inputs: []regMask{gpspsbg &^ rz, gpg, gpg}, outputs: []regMask{gp}}
170+
gpload = regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}}
171+
gpload2 = regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gpg, gpg}}
172+
gpstore = regInfo{inputs: []regMask{gpspsbg, gpg | rz}}
173+
gpstore2 = regInfo{inputs: []regMask{gpspsbg, gpg | rz, gpg | rz}}
174+
gpxchg = regInfo{inputs: []regMask{gpspsbg, gpg | rz}, outputs: []regMask{gp}}
175+
gpcas = regInfo{inputs: []regMask{gpspsbg, gpg | rz, gpg | rz}, outputs: []regMask{gp}}
176176
fp01 = regInfo{inputs: nil, outputs: []regMask{fp}}
177177
fp11 = regInfo{inputs: []regMask{fp}, outputs: []regMask{fp}}
178178
fpgp = regInfo{inputs: []regMask{fp}, outputs: []regMask{gp}}
@@ -181,12 +181,12 @@ func init() {
181181
fp31 = regInfo{inputs: []regMask{fp, fp, fp}, outputs: []regMask{fp}}
182182
fp2flags = regInfo{inputs: []regMask{fp, fp}}
183183
fp1flags = regInfo{inputs: []regMask{fp}}
184-
fpload = regInfo{inputs: []regMask{gpspsbg &^ rz}, outputs: []regMask{fp}}
185-
fpload2 = regInfo{inputs: []regMask{gpspsbg &^ rz}, outputs: []regMask{fp, fp}}
186-
fp2load = regInfo{inputs: []regMask{gpspsbg &^ rz, gpg}, outputs: []regMask{fp}}
187-
fpstore = regInfo{inputs: []regMask{gpspsbg &^ rz, fp}}
188-
fpstoreidx = regInfo{inputs: []regMask{gpspsbg &^ rz, gpg, fp}}
189-
fpstore2 = regInfo{inputs: []regMask{gpspsbg &^ rz, fp, fp}}
184+
fpload = regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{fp}}
185+
fpload2 = regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{fp, fp}}
186+
fp2load = regInfo{inputs: []regMask{gpspsbg, gpg}, outputs: []regMask{fp}}
187+
fpstore = regInfo{inputs: []regMask{gpspsbg, fp}}
188+
fpstoreidx = regInfo{inputs: []regMask{gpspsbg, gpg, fp}}
189+
fpstore2 = regInfo{inputs: []regMask{gpspsbg, fp, fp}}
190190
readflags = regInfo{inputs: nil, outputs: []regMask{gp}}
191191
prefreg = regInfo{inputs: []regMask{gpspsbg}}
192192
)
@@ -516,7 +516,7 @@ func init() {
516516
{name: "CALLinter", argLength: -1, reg: regInfo{inputs: []regMask{gp}, clobbers: callerSave}, aux: "CallOff", clobberFlags: true, call: true}, // call fn by pointer. arg0=codeptr, last arg=mem, auxint=argsize, returns mem
517517

518518
// pseudo-ops
519-
{name: "LoweredNilCheck", argLength: 2, reg: regInfo{inputs: []regMask{gpg &^ rz}}, nilCheck: true, faultOnNilArg0: true}, // panic if arg0 is nil. arg1=mem.
519+
{name: "LoweredNilCheck", argLength: 2, reg: regInfo{inputs: []regMask{gpg}}, nilCheck: true, faultOnNilArg0: true}, // panic if arg0 is nil. arg1=mem.
520520

521521
{name: "Equal", argLength: 1, reg: readflags}, // bool, true flags encode x==y false otherwise.
522522
{name: "NotEqual", argLength: 1, reg: readflags}, // bool, true flags encode x!=y false otherwise.

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