ice40-0.7.core

CAPI=2:

name : yosys:techlibs:ice40:0.7

filesets:
  ice40_cells:
    files:
      - cells_sim.v : {file_type : verilogSource}

targets:
  default:
    filesets : [ice40_cells]

provider:
  name     : url
  filetype : simple
  url      : https://raw.githubusercontent.com/YosysHQ/yosys/c3be94e967c904d4b7a0591fdaa2d86bc926ec41/techlibs/ice40/cells_sim.v