Operand out of range generated during linker step

[andyetched]

I have a compilation that fails to link with the following error:

./gcc_invalid_asm.bin.ltrans0.ltrans.s: Assembler messages:
./gcc_invalid_asm.bin.ltrans0.ltrans.s:157: Error: operand out of range (256 is not between -256 and 255)
make[1]: *** [/tmp/ccFzIQq5.mk:2: gcc_invalid_asm.bin.ltrans0.ltrans.o] Error 1

It appears to be the following code:

 155 .LVL14:
 156         .loc 4 63 6 view .LVU37
 157         brhs.d  r4,r3,.L6
 158         lsrl    r6,r6,32
 159         .loc 4 66 12 view .LVU38
 160         add     r4,r4,2147483647

The file this is pointing at is:

57         .file 4 "external/_main~arc64_none~arc64_gcc_toolchain_linux_x86_64/arc64-snps-elf/include/c++/14.2.0/bits/random.tcc"

It appears as if the invalid asm generated is a brhs.d with an immediate that is outside of the s9 bounds.

Toolchain used: https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/tag/arc-2024.12-release

I've attached the inputs and outputs as well an example Makefile in gcc_invalid_asm.tar.gz

[luismgsilva]

The issue occurs because the branch target (.L6) is too far from the current program counter (PC) - the distance exceeds what a 4-byte branch instruction can encode (greater than 255 bytes). Despite this, GCC selects the 4-byte form [0], which leads to an assembler error due to an out-of-range offset.

GCC uses get_attr_length [1] to estimate instruction size and, indirectly, the jump distance. However, this estimate is made early in the compilation pipeline and is not always accurate. Optimizations like LTO, --ffunction-sections, or --gc-sections can significantly change code layout, causing the actual distance to become much larger than expected.

A simple workaround is to always use the long form [2] in define_insn, which is safe for all distances. However, this may introduce extra latency and affect performance or existing behavior.

Ideally, the offset from the PC to .L6 should be computed accurately so that GCC can choose the appropriate instruction form safely.

[0] https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/blob/95648b9704b9417ced63ee6dc10068d55759e295/gcc/config/arc64/arc64.md?plain=1#L1807
[1] https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/blob/95648b9704b9417ced63ee6dc10068d55759e295/gcc/config/arc64/arc64.md?plain=1#L1813
[2] https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/blob/95648b9704b9417ced63ee6dc10068d55759e295/gcc/config/arc64/arc64.md?plain=1#L1809