Skip to content

How to run ARC Linux kernel and debug (with MetaWare Debugger)

Jump to bottom
Evgeniy Paltsev edited this page Aug 12, 2020 · 18 revisions

nSIM based Simulation

nSIM can simulate ARC770 and HS38x cores (and in reality almost any/all ARC processor and variants). ARC Linux runs well on NSIM. Infact the only difference in running Linux in simulation vs. hardware is limited number of peripherals supported in simulation. It is quite possible to run a same kernel binary built for HS38x cores in both nSIM and hardware platforms, provided the relevant drivers are included and right Device Tree is passed to kernel at the time of booting. ARC Linux however has "defconfigs" which automatically selects the right drivers as well as "embeds" the right device tree into kernel as well (as boot-loader is typically not available in simulation)

Command lines

Standalone nSIM (also free nSIM)

ARC HS38 defaut configuration (matches kernel "haps_hs_defconfig" v5.5-rc1 onwards, see note below for older kernels)
nsimdrv -prop=nsim_isa_family=av2hs -prop=nsim_isa_core=3 -prop=chipid=0xffff -prop=nsim_isa_atomic_option=1 -prop=nsim_isa_ll64_option=1 -prop=nsim_mmu=4 -prop=mmu_pagesize=8192 -prop=mmu_super_pagesize=2097152 -prop=mmu_stlb_entries=16 -prop=mmu_ntlb_ways=4 -prop=mmu_ntlb_sets=128 -prop=icache=32768,64,4,0 -prop=dcache=16384,64,2,0 -prop=nsim_isa_shift_option=2 -prop=nsim_isa_swap_option=1 -prop=nsim_isa_bitscan_option=1 -prop=nsim_isa_sat=1 -prop=nsim_isa_div_rem_option=1 -prop=nsim_isa_mpy_option=9 -prop=nsim_isa_enable_timer_0=1 -prop=nsim_isa_enable_timer_1=1 -prop=nsim_isa_number_of_interrupts=32 -prop=nsim_isa_number_of_external_interrupts=32 -prop=isa_counters=1 -prop=nsim_isa_pct_counters=8 -prop=nsim_isa_pct_size=48 -prop=nsim_isa_pct_interrupt=1 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 -prop=nsim_isa_aps_feature=1 -prop=nsim_isa_num_actionpoints=4 -prop=nsim_isa_rtc_option=1 vmlinux
ARC770 default configuration (matches kernel "nsim_700_defconfig")
nsimdrv -prop=nsim_isa_family=a700 -prop=nsim_isa_atomic_option=1 -prop=nsim_mmu=3 -prop=icache=32768,64,2,0 -prop=dcache=32768,64,4,0 -prop=nsim_isa_dpfp=none -prop=nsim_isa_shift_option=2 -prop=nsim_isa_swap_option=1 -prop=nsim_isa_bitscan_option=1 -prop=nsim_isa_sat=1 -prop=nsim_isa_mpy32=1 -prop=nsim_isa_enable_timer_0=1 -prop=nsim_isa_enable_timer_1=1 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 -prop=isa_counters=1 -prop=nsim_isa_pct_counters=8 -prop=nsim_isa_pct_size=48 vmlinux

nSIM via MDB

ARC HS38 default configuration
mdb -nsim -av2hs -prop=cpunum=0 -mmuv4 -Xrtc -Xatomic -Xtimer0 -Xtimer1 -Xmpyd -Xqmpyh -Xdiv_rem -toggle=deadbeef=1 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 -prop=mmu_pagesize=8192 -prop=mmu_super_pagesize=2097152 -prop=mmu_stlb_entries=16 -prop=mmu_ntlb_ways=4 -prop=mmu_ntlb_sets=128 -icache=16384,64,2,o -dcache=16384,64,4,o -prop=nsim_isa_aps_feature=1 -prop=nsim_isa_num_actionpoints=4 -prop=nsim_isa_ll64_option=1 -prop=nsim_isa_rtc_option=1 -prop=nsim_isa_core=3 -noprofile -run -cl vmlinux
ARC HS38 multi-core configuration (not supported with Free nSIM)
export NSIM_MULTICORE=1
mdb -pset=1 -psetname=core0 -prop=ident=0x00000050 -cmpd=soc -nsim -av2hs -core1 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=0,use_connect=1 -Xrtc -Xtimer0 -Xtimer1 -Xlib -Xll64 -Xatomic -Xunaligned -Xqmpyh -mmuv4 -prop=mmu_pagesize=8192 -prop=mmu_super_pagesize=32768 -prop=mmu_stlb_entries=16 -prop=mmu_ntlb_ways=4 -prop=mmu_ntlb_sets=128 -icache=16384,64,2,o -dcache=16384,64,4,o -on=nsim_print-sys-arch -prop=nsim_isa_num_actionpoints=4 -prop=nsim_isa_aps_feature=1 -on=nsim_mcip -on=nsim_mcip_idu -on=nsim_mcip_grtc -prop=nsim_mcip_version=2 -prop=isa_counters=1 -prop=nsim_isa_pct_counters=8 -prop=nsim_isa_pct_size=48 -prop=nsim_isa_pct_interrupt=1 -noprofile vmlinux
mdb -pset=2 -psetname=core1 -prop=ident=0x00000150 -cmpd=soc -nsim -av2hs -core1 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=0,use_connect=1 -Xrtc -Xtimer0 -Xtimer1 -Xlib -Xll64 -Xatomic -Xunaligned -Xqmpyh -mmuv4 -prop=mmu_pagesize=8192 -prop=mmu_super_pagesize=32768 -prop=mmu_stlb_entries=16 -prop=mmu_ntlb_ways=4 -prop=mmu_ntlb_sets=128 -icache=16384,64,2,o -dcache=16384,64,4,o -on=nsim_print-sys-arch -prop=nsim_isa_num_actionpoints=4 -prop=nsim_isa_aps_feature=1 -on=nsim_mcip -on=nsim_mcip_idu -on=nsim_mcip_grtc -prop=nsim_mcip_version=2 -prop=isa_counters=1 -prop=nsim_isa_pct_counters=8 -prop=nsim_isa_pct_size=48 -prop=nsim_isa_pct_interrupt=1 -noprofile vmlinux
mdb -multifiles=core0,core1 -cmpd=soc -run -cl

Note that all the ARConnect (MCIP) nsim_mcip_* properties have been deprecated. All the renamed nsim_connect_* properties, supported in nSIM K-2015.06 are no longer supported. New nsim_connect_* properties have been introduced to allow configuring of ARConnect 1.1 or 2.x. So if you have nsim version higher than K-2015.06 you should use following command lines:

export NSIM_MULTICORE=1
mdb -pset=1 -psetname=core0 -prop=ident=0x00000050 -cmpd=soc -nsim -av2hs -core1 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=0,use_connect=1 -Xrtc -Xtimer0 -Xtimer1 -Xlib -Xll64 -Xatomic -Xunaligned -Xqmpyh -mmuv4 -prop=mmu_pagesize=8192 -prop=mmu_super_pagesize=32768 -prop=mmu_stlb_entries=16 -prop=mmu_ntlb_ways=4 -prop=mmu_ntlb_sets=128 -icache=16384,64,2,o -dcache=16384,64,4,o -on=nsim_print-sys-arch -prop=nsim_isa_num_actionpoints=4 -prop=nsim_isa_aps_feature=1 -prop=nsim_connect=2 -prop=nsim_connect_idu=1 -prop=nsim_connect_gfrc=1 -prop=nsim_connect_ici=1 -prop=isa_counters=1 -prop=nsim_isa_pct_counters=8 -prop=nsim_isa_pct_size=48 -prop=nsim_isa_pct_interrupt=1 -prop=nsim_isa_core=3 -noprofile vmlinux
mdb -pset=2 -psetname=core1 -prop=ident=0x00000150 -cmpd=soc -nsim -av2hs -core1 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=0,use_connect=1 -Xrtc -Xtimer0 -Xtimer1 -Xlib -Xll64 -Xatomic -Xunaligned -Xqmpyh -mmuv4 -prop=mmu_pagesize=8192 -prop=mmu_super_pagesize=32768 -prop=mmu_stlb_entries=16 -prop=mmu_ntlb_ways=4 -prop=mmu_ntlb_sets=128 -icache=16384,64,2,o -dcache=16384,64,4,o -on=nsim_print-sys-arch -prop=nsim_isa_num_actionpoints=4 -prop=nsim_isa_aps_feature=1 -prop=nsim_connect=2 -prop=nsim_connect_idu=1 -prop=nsim_connect_gfrc=1 -prop=nsim_connect_ici=1 -prop=isa_counters=1 -prop=nsim_isa_pct_counters=8 -prop=nsim_isa_pct_size=48 -prop=nsim_isa_pct_interrupt=1 -prop=nsim_isa_core=3 -noprofile vmlinux
mdb -multifiles=core0,core1 -cmpd=soc -run -cl
ARC770 defaut configuration
mdb -a7 -nsim -Xlib -prop=nsim_mmu=3 -Xtimer0 -Xtimer1 -icache=16384,64,2,o -dcache=32768,64,4,o -prop=cpunum=0 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24 -prop=nsim_sc_mem_range_end=0xc0fbffff -prop=nsim_isa_atomic_option=1 -prop=nsim_isa_num_actionpoints=8 -prop=nsim_isa_aps_feature=1 -noprofile -OK -run -cl vmlinux

NOTE: UART settings for older Linux kernels (v5.4 and prior)

nSIM 2019.06 onwards supports DW UART (in addition to the legacy ARC UART). This paved the way to running Linux image built for HAPS FPGA on nSIM. So starting with kernel version v5.5-rc1, "nsim_hs_smp_defconfig" and "nsim_hs_defconfig" defconfigs were merged with corresponding haps defconfigs and everything was switched to DW UART.

So for kernels v5.4 and prior (with ARC UART based defconfigs and DT) and/or older nSIM, the legacy ARC UART needs to be instantiated

  • For ARC770 use -prop=nsim_mem-dev=uart0,base=0xc0fc1000,irq=5

  • For HS38 single-core use -prop=nsim_mem-dev=uart0,base=0xc0fc1000,irq=24

  • ARC HS38 multi-core configuration with IDU intc, use -prop=nsim_mem-dev=uart0,base=0xc0fc1000,irq=0,use_connect=1

instead of current -prop=nsim_mem-dev=****,**,** property.

Real hardware (ASIC/FPGA) via JTAG

Linux kernel being just an ordinary .elf (if built as vmlinux) could be debugged as a simple bare-metal application on real hardware target via JTAG.

Command lines

Single-core (either single-core HW or the first core of multi-core HW)
### Ashling Opella-XD
mdb -DLL=opxdarc.so -prop=jtag_frequency=12MHz -prop=jtag_optimise=1 -nooptions -OK -memxfersize=0x8000 vmlinux

### Digilent
mdb -digilent vmlinux
Dual-core SMP (first 2 cores of multi-core HW)
### Ashling Opella-XD
mdb -pset=1 -psetname=core0 -DLL=opxdarc.so -prop=jtag_frequency=12MHz -prop=jtag_optimise=1 -memxfersize=0x8000 vmlinux
mdb -pset=2 -psetname=core1 -DLL=opxdarc.so -prop=jtag_frequency=12MHz -prop=jtag_optimise=1 -prop=download=2 vmlinux
mdb -multifiles=core0,core1 -OK

### Digilent
mdb -pset=1 -psetname=core0 -digilent vmlinux
mdb -pset=2 -psetname=core1 -digilent -prop=download=2 vmlinux
mdb -multifiles=core0,core1 -OK
Quad-core SMP (first 4 cores of multi-core HW)
### Ashling Opella-XD
mdb -pset=1 -psetname=core0 -DLL=opxdarc.so -prop=jtag_frequency=12MHz -prop=jtag_optimise=1 -memxfersize=0x8000 vmlinux
mdb -pset=2 -psetname=core1 -DLL=opxdarc.so -prop=jtag_frequency=12MHz -prop=jtag_optimise=1 -prop=download=2 vmlinux
mdb -pset=3 -psetname=core2 -DLL=opxdarc.so -prop=jtag_frequency=12MHz -prop=jtag_optimise=1 -prop=download=2 vmlinux
mdb -pset=4 -psetname=core3 -DLL=opxdarc.so -prop=jtag_frequency=12MHz -prop=jtag_optimise=1 -prop=download=2 vmlinux
mdb -multifiles=core0,core1,core2,core3 -OK

### Digilent
mdb -pset=1 -psetname=core0 -digilent vmlinux
mdb -pset=2 -psetname=core1 -digilent -prop=download=2 vmlinux
mdb -pset=3 -psetname=core2 -digilent -prop=download=2 vmlinux
mdb -pset=4 -psetname=core3 -digilent -prop=download=2 vmlinux
mdb -multifiles=core0,core1,core2,core3 -OK

Notes

  • JTAG frequency should be at least 2 times lower than ARC core frequency. For 50MHz FPGA -jtag_frequency=12MHz is proven to work, while higher values may trigger problems like inconsistent memory values on elf load etc.

  • -memxfersize=0x8000 instructs debugger to send 32k blocks to Opella-XD.
    This significantly increases speed of elf download to target via JTAG.

  • -prop=jtag_optimise=1 turns off checking of the JTAG status registers by Opella-XD between successive JTAG read and write operations.
    This significantly increases speed of elf download to target via JTAG.

  • -prop=download=2 is required to let MDB know that this core will re-use elf loaded for other core

  • To escape specification of full path to opxdarc.so create a symlink to the .so in MW_HOME/MetaWare/arc/bin like this:

cd __path_to_opellaxdforarc_installation__
ln -s $PWD/opxdarc.so $MW_HOME/MetaWare/arc/bin/opxdarc.so
Clone this wiki locally