ARCv3: Add support L2$ flush/invalidate operations

dma_cache_wback_inv(), dma_cache_inv() and dma_cache_wback()
functions now invalidate/flush L1$ and L2$.

Added 'cacheflush' syscall to get acces for L1$ and L2$
flush/invalidate operations from userspace.

Author: xxkent

arch/arc/include/asm/cluster.h

@@ -118,6 +118,7 @@ struct bcr_cln_scm_1_cfg {
 #define ARC_CLN_CACHE_STATUS			209
 #define ARC_CLN_CACHE_STATUS_BUSY		BIT(23)
 #define ARC_CLN_CACHE_STATUS_DONE		BIT(24)
+#define ARC_CLN_CACHE_STATUS_MASK		BIT(26)
 #define ARC_CLN_CACHE_STATUS_EN			BIT(27)
 #define ARC_CLN_CACHE_ERR			210
 #define ARC_CLN_CACHE_ERR_ADDR0			211

arch/arc/include/uapi/asm/cachectl.h

@@ -16,6 +16,10 @@
 #define CF_I_INV	0x0002
 #define CF_D_FLUSH	0x0010
 #define CF_D_FLUSH_INV	0x0020
+#define CF_D_INV        0x0040
+#define CF_D_L1   0x10000   /* Operation with L1$ */
+#define CF_D_L2   0x20000   /* Operation with L2$ */
+#define CF_D_PHY  0x40000   /* cache_flush syscall operates with phy addresses */
 
 #define CF_DEFAULT	(CF_I_INV | CF_D_FLUSH)