Disable reliance on support of 1GB pages

InstanceStart call causes Firecracker to crash with KVM_EXIT_SHUTDOWN.

The problem is the lack of CPU flag: pdpe1gb, i.e. 1GB (huge)pages support by
the CPU. solo5 had a similar issue and solved it by switching to 2MB pages for
the guest page tables.
mato/solo5@68ade81

crosvm have fixed this issue by doing the same thing.
https://chromium.googlesource.com/chromiumos/platform/crosvm/+/4567a281a5c28e49479f916a057ee7b1f221925b%5E%21/#F0

Original: @mlctrez patch based on background from @psomas (details in #685)

Signed-off-by: Chris Christensen <[email protected]>

Author: christianchristensen

x86_64/src/layout.rs

@@ -15,6 +15,7 @@ pub const BOOT_STACK_POINTER: usize = 0x8ff0;
 // Initial pagetables.
 pub const PML4_START: usize = 0x9000;
 pub const PDPTE_START: usize = 0xa000;
+pub const PDE_START: usize = 0xb000;
 // Kernel command line.
 pub const CMDLINE_START: usize = 0x20000;
 pub const CMDLINE_MAX_SIZE: usize = 0x10000;

x86_64/src/regs.rs

@@ -36,6 +36,8 @@ pub enum Error {
     WriteIDT,
     /// Writing PDPTE to RAM failed.
     WritePDPTEAddress,
+    /// Writing PDE to RAM failed.
+    WritePDEAddress,
     /// Writing PML4 to RAM failed.
     WritePML4Address,
 }
@@ -193,11 +195,24 @@ fn setup_page_tables(mem: &GuestMemory, sregs: &mut kvm_sregs) -> Result<()> {
     // Puts PML4 right after zero page but aligned to 4k.
     let boot_pml4_addr = GuestAddress(layout::PML4_START);
     let boot_pdpte_addr = GuestAddress(layout::PDPTE_START);
+    let boot_pde_addr = GuestAddress(layout::PDE_START);
 
+    // Entry covering VA [0..512GB)
     mem.write_obj_at_addr(boot_pdpte_addr.offset() as u64 | 0x03, boot_pml4_addr)
         .map_err(|_| Error::WritePML4Address)?;
-    mem.write_obj_at_addr(0x83u64, boot_pdpte_addr)
+
+    // Entry covering VA [0..1GB)
+    mem.write_obj_at_addr(boot_pde_addr.offset() as u64 | 0x03, boot_pdpte_addr)
         .map_err(|_| Error::WritePDPTEAddress)?;
+    // 512 2MB entries together covering VA [0..1GB). Note we are assuming
+    // CPU supports 2MB pages (/proc/cpuinfo has 'pse'). All modern CPUs do.
+    for i in 0..512 {
+        mem.write_obj_at_addr(
+            (i << 21) + 0x83u64,
+            boot_pde_addr.unchecked_add((i * 8) as usize),
+        ).map_err(|_| Error::WritePDEAddress)?;
+    }
+
     sregs.cr3 = boot_pml4_addr.offset() as u64;
     sregs.cr4 |= X86_CR4_PAE;
     sregs.cr0 |= X86_CR0_PG;
@@ -310,7 +325,13 @@ mod tests {
         setup_page_tables(&gm, &mut sregs).unwrap();
 
         assert_eq!(0xa003, read_u64(&gm, layout::PML4_START));
-        assert_eq!(0x83, read_u64(&gm, layout::PDPTE_START));
+        assert_eq!(0xb003, read_u64(&gm, layout::PDPTE_START));
+        for i in 0..512 {
+            assert_eq!(
+                (i << 21) + 0x83u64,
+                read_u64(&gm, layout::PDE_START + (i * 8) as usize)
+            );
+        }
 
         assert_eq!(layout::PML4_START as u64, sregs.cr3);
         assert_eq!(X86_CR4_PAE, sregs.cr4);