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src/cpuid/src/template/intel
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lines changed Original file line number Diff line number Diff line change @@ -52,3 +52,47 @@ pub(crate) fn msrs_to_save_by_cpuid(cpuid: &CpuId) -> HashSet<u32> {
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) ;
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msrs
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}
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+
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+ #[ cfg( test) ]
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+ pub mod tests {
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+ use super :: * ;
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+
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+ #[ test]
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+ #[ cfg( any( target_arch = "x86" , target_arch = "x86_64" ) ) ]
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+ fn test_msrs_to_save_by_cpuid_empty ( ) {
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+ // No CPUID entries are provided.
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+ let entrs = [ ] ;
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+ let cpuid = CpuId :: from_entries ( & entrs) . unwrap ( ) ;
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+
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+ let msrs = msrs_to_save_by_cpuid ( & cpuid) ;
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+
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+ // No MSRs are expected to match the CPUID features.
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+ assert ! ( msrs. is_empty( ) ) ;
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+ }
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+
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+ #[ test]
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+ #[ cfg( any( target_arch = "x86" , target_arch = "x86_64" ) ) ]
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+ fn test_msrs_to_save_by_cpuid_one ( ) {
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+ use kvm_bindings:: kvm_cpuid_entry2;
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+
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+ use crate :: cpu_leaf:: leaf_0x7;
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+
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+ // One CPUID entry with MPX feature flag is provided
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+ // that causes MSR_IA32_BNDCFGS to be pulled in.
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+ let entrs = [ kvm_cpuid_entry2 {
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+ function : 0x7 ,
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+ index : 0x0 ,
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+ ebx : 1 << leaf_0x7:: index0:: ebx:: MPX_BITINDEX ,
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+ ..Default :: default ( )
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+ } ] ;
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+ let cpuid = CpuId :: from_entries ( & entrs) . unwrap ( ) ;
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+
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+ let msrs = msrs_to_save_by_cpuid ( & cpuid) ;
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+
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+ // One MSR is expected to be pulled in by the CPUID feature provided.
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+ assert_eq ! ( msrs. len( ) , 1 ) ;
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+
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+ // The expected MSR is MSR_IA32_BNDCFGS.
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+ assert ! ( msrs. contains( & MSR_IA32_BNDCFGS ) ) ;
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+ }
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+ }
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