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Try patching I2C for issues
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+125
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diff --git a/components/esp_driver_i2c/i2c_master.c b/components/esp_driver_i2c/i2c_master.c
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index 8859998eb4..c2571f3d0d 100644
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--- a/components/esp_driver_i2c/i2c_master.c
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+++ b/components/esp_driver_i2c/i2c_master.c
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@@ -197,22 +197,7 @@ static bool s_i2c_write_command(i2c_master_bus_handle_t i2c_master, i2c_operatio
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i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
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portEXIT_CRITICAL_SAFE(&handle->spinlock);
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i2c_master->w_r_size = data_fill;
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-#if SOC_I2C_STOP_INDEPENDENT
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- i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
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- i2c_master->cmd_idx = 0;
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- if (i2c_master->i2c_trans.ops[i2c_master->trans_idx].total_bytes == i2c_master->i2c_trans.ops[i2c_master->trans_idx].bytes_used) {
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- i2c_master->i2c_trans.cmd_count--;
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- i2c_master->trans_idx++;
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- }
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- portENTER_CRITICAL_SAFE(&handle->spinlock);
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- if (i2c_master->async_trans == false) {
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- i2c_hal_master_trans_start(hal);
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- } else {
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- i2c_master->async_break = true;
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- }
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- portEXIT_CRITICAL_SAFE(&handle->spinlock);
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-#else
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// If data cannot be sent in one time, send data out. Otherwise, continue configuring command.
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if ((remaining_bytes - data_fill) != 0) {
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portENTER_CRITICAL_SAFE(&handle->spinlock);
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@@ -252,7 +237,6 @@ static bool s_i2c_write_command(i2c_master_bus_handle_t i2c_master, i2c_operatio
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}
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}
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}
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-#endif
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*fifo_fill = data_fill;
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return i2c_master->async_break;
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@@ -287,7 +271,6 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
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hw_cmd.byte_num = *fifo_fill;
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i2c_master->contains_read = true;
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-#if !SOC_I2C_STOP_INDEPENDENT
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if (remaining_bytes < I2C_FIFO_LEN(i2c_master->base->port_num) - 1) {
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if (i2c_operation->hw_cmd.ack_val == I2C_ACK_VAL) {
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if (remaining_bytes != 0) {
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@@ -328,29 +311,6 @@ static bool s_i2c_read_command(i2c_master_bus_handle_t i2c_master, i2c_operation
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}
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portEXIT_CRITICAL_SAFE(&handle->spinlock);
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}
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-#else
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- portENTER_CRITICAL_SAFE(&handle->spinlock);
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- // If the read command work with ack_val, but no bytes to read, we skip
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- // this command, and run next command directly.
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- if (hw_cmd.ack_val == I2C_ACK_VAL) {
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- if (i2c_operation->total_bytes == 0) {
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- i2c_master->trans_idx++;
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- hw_cmd = i2c_master->i2c_trans.ops[i2c_master->trans_idx].hw_cmd;
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- i2c_master->i2c_trans.cmd_count--;
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- }
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- }
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- i2c_ll_master_write_cmd_reg(hal->dev, hw_cmd, i2c_master->cmd_idx);
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- i2c_ll_master_write_cmd_reg(hal->dev, hw_end_cmd, i2c_master->cmd_idx + 1);
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- portEXIT_CRITICAL_SAFE(&handle->spinlock);
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- atomic_store(&i2c_master->status, I2C_STATUS_READ);
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- portENTER_CRITICAL_SAFE(&handle->spinlock);
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- if (i2c_master->async_trans == false) {
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- i2c_hal_master_trans_start(hal);
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- } else {
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- i2c_master->async_break = true;
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- }
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- portEXIT_CRITICAL_SAFE(&handle->spinlock);
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-#endif
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return i2c_master->async_break;
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}
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@@ -679,9 +639,7 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
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i2c_operation->bytes_used = 0;
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}
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portEXIT_CRITICAL_ISR(&i2c_master->base->spinlock);
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- }
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-#if !SOC_I2C_STOP_INDEPENDENT
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- else {
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+ } else {
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i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->read_buf_pos];
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portENTER_CRITICAL_ISR(&i2c_master->base->spinlock);
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i2c_ll_read_rxfifo(hal->dev, i2c_operation->data + i2c_operation->bytes_used, i2c_master->read_len_static);
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@@ -693,7 +651,6 @@ I2C_MASTER_ISR_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_ma
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i2c_master->contains_read = false;
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portEXIT_CRITICAL_ISR(&i2c_master->base->spinlock);
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}
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-#endif
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}
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static void i2c_master_isr_handler_default(void *arg)
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diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in
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index 0ba999f747..22c2c0a407 100644
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--- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in
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+++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in
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@@ -391,10 +391,6 @@ config SOC_I2C_SUPPORT_10BIT_ADDR
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bool
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default y
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-config SOC_I2C_STOP_INDEPENDENT
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- bool
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- default y
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-
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config SOC_I2S_NUM
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int
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default 2
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diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h
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index 1937908170..f7f4c16949 100644
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--- a/components/soc/esp32/include/soc/soc_caps.h
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+++ b/components/soc/esp32/include/soc/soc_caps.h
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@@ -208,9 +208,6 @@
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#define SOC_I2C_SUPPORT_APB (1)
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#define SOC_I2C_SUPPORT_10BIT_ADDR (1)
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-// On ESP32, the stop bit should be independent, we can't put trans data and stop command together
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-#define SOC_I2C_STOP_INDEPENDENT (1)
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-
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/*-------------------------- I2S CAPS ----------------------------------------*/
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// ESP32 has 2 I2S
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#define SOC_I2S_NUM (2U)
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--
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2.39.5 (Apple Git-154)
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tools/install-esp-idf.sh

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@@ -41,6 +41,7 @@ if [ ! -x $idf_was_installed ] || [ ! -x $commit_predefined ]; then
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cd $IDF_PATH
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patch -p1 -N -i $AR_PATCHES/esp32s2_i2c_ll_master_init.diff
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patch -p1 -N -i $AR_PATCHES/lwip_max_tcp_pcb.diff
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patch -p1 -N -i $AR_PATCHES/0001-fix-i2c-optimization-performance-on-esp32.diff
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cd -
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fi
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