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Merge LA.UM.7.3.9.08.00.00.385.245 via branch qcom-msm-4.9 into android-msm-bluecross-4.9
Merge Qualcomm's LA.UM.7.3.9.08.00.00.385.245 Conflicts: Makefile arch/arm64/Makefile arch/arm64/boot/dts/qcom/pfk_ecryptfs.h arch/arm64/include/asm/signal32.h arch/arm64/kernel/vdso/gettimeofday.S block/bio.c block/blk-core.c block/blk-merge.c drivers/crypto/msm/ice.c drivers/input/touchscreen/Makefile drivers/media/platform/msm/camera/cam_isp/cam_isp_context.c drivers/media/platform/msm/camera/cam_isp/cam_isp_context.h drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c drivers/power/supply/power_supply_sysfs.c drivers/power/supply/qcom/Makefile drivers/scsi/ufs/ufs-qcom-ice.c drivers/scsi/ufs/ufshcd.c drivers/video/console/dummycon.c fs/crypto/Kconfig fs/crypto/Makefile fs/crypto/fscrypt_private.h fs/crypto/keyinfo.c fs/direct-io.c fs/ext4/inode.c fs/ext4/page-io.c fs/f2fs/data.c fs/f2fs/f2fs.h fs/f2fs/file.c fs/f2fs/node.c fs/f2fs/super.c include/linux/blkdev.h include/linux/f2fs_fs.h include/linux/fscrypt.h include/linux/fscrypt_notsupp.h include/linux/fscrypt_supp.h include/linux/pfk.h include/linux/power_supply.h include/linux/security.h include/linux/tcp.h include/uapi/linux/fs.h kernel/sched/cpufreq_schedutil.c kernel/sched/fair.c net/ipv4/tcp.c scripts/Kbuild.include security/Kconfig security/pfe/Kconfig security/pfe/Makefile security/pfe/pfk.c security/pfe/pfk_internal.h security/pfe/pfk_kc.c security/pfe/pfk_kc.h security/security.c security/selinux/include/objsec.h Change-Id: I7601101b4be54a5f662908bc51d1f60793346885
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.gitignore

+1
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@
3333
*.lzo
3434
*.patch
3535
*.gcno
36+
*.ll
3637
modules.builtin
3738
Module.symvers
3839
*.dwo

Documentation/00-INDEX

+2
Original file line numberDiff line numberDiff line change
@@ -436,6 +436,8 @@ sysrq.txt
436436
- info on the magic SysRq key.
437437
target/
438438
- directory with info on generating TCM v4 fabric .ko modules
439+
tee.txt
440+
- info on the TEE subsystem and drivers
439441
this_cpu_ops.txt
440442
- List rationale behind and the way to use this_cpu operations.
441443
thermal/
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
OP-TEE Device Tree Bindings
2+
3+
OP-TEE is a piece of software using hardware features to provide a Trusted
4+
Execution Environment. The security can be provided with ARM TrustZone, but
5+
also by virtualization or a separate chip.
6+
7+
We're using "linaro" as the first part of the compatible property for
8+
the reference implementation maintained by Linaro.
9+
10+
* OP-TEE based on ARM TrustZone required properties:
11+
12+
- compatible : should contain "linaro,optee-tz"
13+
14+
- method : The method of calling the OP-TEE Trusted OS. Permitted
15+
values are:
16+
17+
"smc" : SMC #0, with the register assignments specified
18+
in drivers/tee/optee/optee_smc.h
19+
20+
"hvc" : HVC #0, with the register assignments specified
21+
in drivers/tee/optee/optee_smc.h
22+
23+
24+
25+
Example:
26+
firmware {
27+
optee {
28+
compatible = "linaro,optee-tz";
29+
method = "smc";
30+
};
31+
};

Documentation/devicetree/bindings/arm/msm/msm.txt

+9-6
Original file line numberDiff line numberDiff line change
@@ -128,8 +128,8 @@ SoCs:
128128
- MDM9640
129129
compatible = "qcom,mdm9640"
130130

131-
- MDMCALIFORNIUM
132-
compatible = "qcom,mdmcalifornium"
131+
- MDM9650
132+
compatible = "qcom,mdm9650"
133133

134134
- SDXPOORWILLS
135135
compatible = "qcom,sdxpoorwills"
@@ -190,6 +190,9 @@ Generic board variants:
190190
- IPC device:
191191
compatible = "qcom,ipc"
192192

193+
- TTP device:
194+
compatible = "qcom,ttp"
195+
193196
Boards (SoC type + board variant):
194197

195198
compatible = "qcom,apq8016"
@@ -220,6 +223,7 @@ compatible = "qcom,apq8017-mtp"
220223
compatible = "qcom,apq8053-cdp"
221224
compatible = "qcom,apq8053-mtp"
222225
compatible = "qcom,apq8053-ipc"
226+
compatible = "qcom,apq8053-lite-dragonboard"
223227
compatible = "qcom,mdm9630-cdp"
224228
compatible = "qcom,mdm9630-mtp"
225229
compatible = "qcom,mdm9630-sim"
@@ -355,12 +359,11 @@ compatible = "qcom,msmvpipa-sim"
355359
compatible = "qcom,mdm9607-rumi"
356360
compatible = "qcom,mdm9607-cdp"
357361
compatible = "qcom,mdm9607-mtp"
358-
compatible = "qcom,mdmcalifornium-rumi"
359-
compatible = "qcom,mdmcalifornium-sim"
360-
compatible = "qcom,mdmcalifornium-cdp"
361-
compatible = "qcom,mdmcalifornium-mtp"
362+
compatible = "qcom,mdm9650-mtp"
363+
compatible = "qcom,mdm9650-ttp"
362364
compatible = "qcom,apq8009-cdp"
363365
compatible = "qcom,apq8009-mtp"
364366
compatible = "qcom,sdxpoorwills-rumi"
365367
compatible = "qcom,sdxpoorwills-mtp"
366368
compatible = "qcom,sdxpoorwills-cdp"
369+
compatible = "qcom,mdm9607-ttp"

Documentation/devicetree/bindings/arm/msm/msm_ion.txt

+31
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@@ -22,6 +22,7 @@ Required properties for Ion heaps
2222
- "SYSTEM"
2323
- "SYSTEM_CONTIG"
2424
- "CARVEOUT"
25+
- "SECURE_CARVEOUT"
2526
- "CHUNK"
2627
- "CP"
2728
- "DMA"
@@ -41,6 +42,7 @@ Optional properties for Ion heaps
4142
Will set to a reasonable default value (e.g. the maximum heap size)
4243
if this option is not set.
4344

45+
4446
Example:
4547
qcom,ion {
4648
compatible = "qcom,msm-ion";
@@ -70,3 +72,32 @@ Example:
7072
qcom,ion-heap-type = "CARVEOUT";
7173
};
7274
};
75+
76+
"SECURE_CARVEOUT"
77+
78+
This heap type is expected to contain multiple child nodes. Each child node
79+
shall contain the following required properties:
80+
81+
- memory-regions:
82+
Refer to Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
83+
84+
- token:
85+
A u32 containing the set of secure domains which will be able to access the
86+
memory-region.
87+
88+
Example:
89+
qcom,ion {
90+
compatible = "qcom,msm-ion";
91+
#address-cells = <1>;
92+
#size-cells = <0>;
93+
94+
qcom,ion-heap@14 {
95+
reg = <14>;
96+
qcom,ion-heap-type = "SECURE_CARVEOUT";
97+
98+
node1 {
99+
memory-regions = <&cp_region>;
100+
token = <ION_FLAG_CP_TOUCH>;
101+
};
102+
};
103+
};

Documentation/devicetree/bindings/arm/msm/msm_watchdog.txt

+1
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ Optional properties:
3333
- qcom,ipi-ping : (boolean) send keep alive ping to other cpus if present
3434
- qcom,wakeup-enable : (boolean) enable non secure watchdog to freeze / unfreeze
3535
automatically across suspend / resume path.
36+
- qcom,scandump-size : size of scan dump memory region.
3637

3738
Example:
3839

Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
Qti radio iris device
2+
3+
-FM RX playback with no RDS
4+
5+
FM samples is filtered by external RF chips at baseband, then send to Riva-FM core through serial link.
6+
FM signal is demodulated then audio L/R samples are stored inside memory.
7+
FM Rx received samples data is connected to external audio codec.
8+
9+
-Audio playback to FM TX
10+
11+
Used to play audio source to FM TX.
12+
FM TX module will read the audio samples from memory then modulated samples will be send through serial interface to external RF chip.
13+
14+
-RX playback with RDS
15+
16+
FM Rx receive audio data along with RDS.
17+
18+
-FM TX with RDS
19+
20+
Used to send RDS messages to external FM receiver.
21+
22+
Required Properties:
23+
- compatible: "qcom,iris_fm"
24+
25+
Example:
26+
qcom,iris-fm {
27+
compatible = "qcom,iris_fm";
28+
};
29+

Documentation/devicetree/bindings/cnss/cnss-wlan.txt

+2
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,8 @@ Optional properties:
3636
always on regulator in VDDmin.
3737
- vdd-wlan-core-supply: phandle to the 1.3V CORE regulator for QCA6174
3838
- vdd-wlan-sp2t-supply: phandle to the 2.7V SP2T regulator for QCA6174
39+
- qcom,smmu-s1-enable: Boolean property to decide whether to enable SMMU
40+
S1 stage or not
3941
- qcom,wlan-smmu-iova-address: I/O virtual address range as <start length>
4042
format to be used for allocations associated
4143
between WLAN/PCIe and SMMU

Documentation/devicetree/bindings/display/bridge/lt9611.txt

+4-1
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ Required properties:
88
- lt,reset-gpio Main reset gpio mapping
99

1010

11-
Optional properties:
11+
Optional properties:
1212
- lt,hdmi-ps-gpio: gpio mapping for HDMI PS
1313
- lt,hdmi-en-gpio: gpio mapping for HDMI EN
1414

@@ -29,6 +29,7 @@ Required properties:
2929
-- lt,supply-post-off-sleep: time to sleep (ms) after turning off
3030

3131
- lt,non-pluggable: Boolean to indicate if display is non pluggable.
32+
- lt,preferred-mode: Preferred display mode.
3233
- lt,customize-modes: Customized modes when it's non-pluggable display.
3334
e.g. lt,customize-mode-id@0
3435
-- lt,mode-h-active: Horizontal active pixels for this mode.
@@ -66,6 +67,8 @@ Example:
6667
lt,reset-gpio = <&tlmm 134 0x0>;
6768
lt,hdmi-ps-gpio = <&tlmm 136 0x0>;
6869
lt,hdmi-en-gpio = <&tlmm 137 0x0>;
70+
lt,non-pluggable;
71+
lt,preferred-mode = "1920x1080";
6972

7073
vcc-supply = <&pm660l_l6>;
7174
vdd-supply = <&pm660_l11>;

Documentation/devicetree/bindings/display/msm/sde.txt

+2
Original file line numberDiff line numberDiff line change
@@ -81,6 +81,8 @@ Optional properties:
8181
GPIO11, and 2 for GPIO12.
8282
- clock-rate: List of clock rates in Hz.
8383
- clock-max-rate: List of maximum clock rate in Hz that this device supports.
84+
- connectors: Specifies the connector components.
85+
- bridges: Specifies the bridge components.
8486
- qcom,platform-supply-entries: A node that lists the elements of the supply. There
8587
can be more than one instance of this binding,
8688
in which case the entry would be appended with

Documentation/devicetree/bindings/dma/snps-dma.txt

+1-1
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,6 @@ Example:
6363
interrupts = <0 35 0x4>;
6464
status = "disabled";
6565
dmas = <&dmahost 12 0 1>,
66-
<&dmahost 13 0 1 0>;
66+
<&dmahost 13 1 0>;
6767
dma-names = "rx", "rx";
6868
};

Documentation/devicetree/bindings/gpu/adreno.txt

+5-2
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ Required properties:
2929
Current values of clock-names are:
3030
"src_clk", "core_clk", "iface_clk", "mem_clk", "mem_iface_clk",
3131
"alt_mem_iface_clk", "rbbmtimer_clk", "alwayson_clk",
32-
"iref_clk"
32+
"iref_clk", "l3_vote"
3333
"core_clk" and "iface_clk" are required and others are optional
3434

3535
- qcom,base-leakage-coefficient: Dynamic leakage coefficient.
@@ -78,7 +78,10 @@ IOMMU Data:
7878
GPU Power levels:
7979
- qcom,gpu-pwrlevel-bins: Container for sets of GPU power levels (see
8080
adreno-pwrlevels.txt)
81-
81+
L3 Power levels:
82+
- qcom,l3-pwrlevels: Container for sets of L3 power levels, the
83+
L3 frequency is adjusted according to the
84+
performance hint received from userspace.
8285
DCVS Core info
8386
- qcom,dcvs-core-info Container for the DCVS core info (see
8487
dcvs-core-info.txt)

Documentation/devicetree/bindings/input/qpnp-power-on.txt

+3
Original file line numberDiff line numberDiff line change
@@ -112,6 +112,9 @@ Optional properties:
112112
trigger during system shutdown case.
113113
- qcom,ps-hold-hard-reset-disable Boolean property to disable PS_HOLD
114114
POFF trigger during system hard reset case.
115+
- qcom,use-legacy-hard-reset-offset Boolean property to support legacy
116+
hard-reset offset of the PON_RB_SPARE register for
117+
some (PON gen2) platforms.
115118

116119
All the below properties are in the sub-node section (properties of the child
117120
node).
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
FocalTech touch controller
2+
3+
Required properties:
4+
5+
- compatible : Should be "focaltech,5x06"
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
FocalTech touch controller
2+
3+
The focaltech controller is connected to host processor
4+
via i2c. The controller generates interrupts when the
5+
user touches the panel. The host controller is expected
6+
to read the touch coordinates over i2c and pass the coordinates
7+
to the rest of the system.
8+
9+
Required properties:
10+
11+
- compatible : should be "focaltech,fts".
12+
- reg : i2c slave address of the device.
13+
- interrupt-parent : parent of interrupt.
14+
- interrupts : touch sample interrupt to indicate presense or release
15+
of fingers on the panel.
16+
- vdd-supply : Power supply needed to power up the device.
17+
- vcc-i2c-supply : Power source required to power up i2c bus.
18+
- focaltech,irq-gpio : irq gpio which is to provide interrupts to host,
19+
same as "interrupts" node. It will also
20+
contain active low or active high information.
21+
- focaltech,reset-gpio : reset gpio to control the reset of chip.
22+
- focaltech,display-coords : display coordinates in pixels. It is a four
23+
tuple consisting of min x, min y, max x and
24+
max y values
25+
26+
Optional properties:
27+
- focaltech,max-touch-number : maximnum number of touch points supported.
28+
- focaltech,have-key : specify whether virtual keys are present.
29+
- focaltech,key-number : number of keys, maximum 3.
30+
- focaltech,keys : array of key code.
31+
- focaltech,key-y-coord : y coordinate for the keys.
32+
- focaltech,key-x-coords : array of x coordinates for the keys.
33+
- focaltech,wakeup-gestures-en : enable wakeup gestures.
34+
35+
Example:
36+
i2c@f9923000{
37+
focaltech@38{
38+
compatible = "focaltech,fts";
39+
reg = <0x38>;
40+
interrupt-parent = <&msmgpio>;
41+
interrupts = <98 0x2008>;
42+
vdd-supply = <&pm8110_l19>;
43+
vcc_i2c-supply = <&pm8110_l14>;
44+
focaltech,reset-gpio = <&msmgpio 16 0x00>;
45+
focaltech,irq-gpio = <&msmgpio 98 0x2008>;
46+
focaltech,display-coords = <0 0 480 800>;
47+
focaltech,max-touch-number = <2>;
48+
focaltech,have-key;
49+
focaltech,key-number = <3>;
50+
focaltech,keys = <139 142 140>;
51+
focaltech,key-y-coord = <700>;
52+
focaltech,key-x-coords = <80 240 400>;
53+
};
54+
};
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
Himax touch controller
2+
3+
Required properties:
4+
5+
- compatible : Should be "himax,hxcommon"
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
Qualcomm Technologies Inc Blackghost(BG) PIL driver:
2+
3+
Blackghost(BG) PIL driver provide interface to load and boot Blackghost(BG)
4+
SOC. Blackghost(BG) SOC is an external SOC which communicate to MSM via
5+
SPI. The PIL driver loads firmware into memory and invoke secure app via
6+
qseecom to transfer and handshake the boot process. Once Blackghost(BG) SOC
7+
is booted it raises ready interrupt which is handled by BG PIL driver, and
8+
this event is informed to other MSM drivers, other remote subsystem via
9+
notifier framework. The PIL driver also handles interrupt for the BG SOC
10+
crash upon arrival of which it reset and initiates ramdump collection for BG
11+
SOC.
12+
13+
Required properties:
14+
- compatible: Must be "qcom,PIL-blackghost"
15+
- qcom,firmware-name: Base name of the firmware image.
16+
- qcom,bg2ap-status-gpio: GPIO used by the blackghost to indicate status to the apps.
17+
- qcom,bg2ap-errfatal-gpio: GPIO used by the blackghost to indicate software error to the apps.
18+
- qcom,ap2bg-status-gpio: GPIO used by the apps to indicate its status to blackghost.
19+
- qcom,ap2bg-errfatal-gpio: GPIO used by the apps to indicate blackghost about apps reset.
20+
21+
Example:
22+
23+
qcom,blackghost {
24+
compatible = "qcom,pil-blackghost";
25+
qcom,firmware-name = "bgelf";
26+
27+
/* GPIO inputs from blackghost */
28+
qcom,bg2ap-status-gpio = <&msm_gpio 97 0>;
29+
qcom,bg2ap-errfatal-gpio = <&msm_gpio 95 0>;
30+
/* GPIO output to blackghost */
31+
qcom,ap2bg-status-gpio = <&msm_gpio 17 0>;
32+
qcom,ap2bg-errfatal-gpio = <&msm_gpio 23 0>;
33+
};

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