@@ -11691,8 +11691,6 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
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{
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if (id->idIsDspReloc())
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{
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- INT32 addlDelta = 0;
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-
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// The address is of the form "[disp]"
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// On x86 - disp is relative to zero
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// On Amd64 - disp is relative to RIP
@@ -11705,20 +11703,17 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
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dst += emitOutputWord(dst, code | 0x0500);
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}
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+ INT32 addlDelta = 0;
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+ #ifdef TARGET_AMD64
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if (addc)
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{
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- // It is of the form "ins [disp], imm" or "ins reg, [disp], imm"
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- // For emitting relocation, we also need to take into account of the
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- // additional bytes of code emitted for immed val.
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-
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+ // It is of the form "ins [disp], imm" or "ins reg, [disp], imm". Emitting relocation for a
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+ // RIP-relative address means we also need to take into account the additional bytes of code
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+ // generated for the immediate value, since RIP will point at the next instruction.
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ssize_t cval = addc->cnsVal;
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- #ifdef TARGET_AMD64
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// all these opcodes only take a sign-extended 4-byte immediate
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noway_assert(opsz < 8 || ((int)cval == cval && !addc->cnsReloc));
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- #else // TARGET_X86
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- noway_assert(opsz <= 4);
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- #endif // TARGET_X86
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switch (opsz)
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{
@@ -11739,6 +11734,7 @@ BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
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unreached();
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}
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}
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+ #endif // TARGET_AMD64
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#ifdef TARGET_AMD64
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// We emit zero on Amd64, to avoid the assert in emitOutputLong()
@@ -12990,20 +12986,16 @@ BYTE* emitter::emitOutputCV(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
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{
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INT32 addlDelta = 0;
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+ #ifdef TARGET_AMD64
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if (addc)
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{
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- // It is of the form "ins [disp], imm" or "ins reg, [disp], imm"
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- // For emitting relocation, we also need to take into account of the
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- // additional bytes of code emitted for immed val.
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-
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+ // It is of the form "ins [disp], imm" or "ins reg, [disp], imm". Emitting relocation for a
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+ // RIP-relative address means we also need to take into account the additional bytes of code
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+ // generated for the immediate value, since RIP will point at the next instruction.
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ssize_t cval = addc->cnsVal;
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- #ifdef TARGET_AMD64
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// all these opcodes only take a sign-extended 4-byte immediate
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noway_assert(opsz < 8 || ((int)cval == cval && !addc->cnsReloc));
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- #else // TARGET_X86
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- noway_assert(opsz <= 4);
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- #endif // TARGET_X86
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switch (opsz)
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{
@@ -13024,6 +13016,7 @@ BYTE* emitter::emitOutputCV(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
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unreached();
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}
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}
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+ #endif // TARGET_AMD64
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#ifdef TARGET_AMD64
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// All static field and data section constant accesses should be marked as relocatable
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