JIT: Don't use addressing modes for volatile loads for gc types (#70794)

EgorBo · web-flow · commit 95f3bccd30ad · 2023-07-29T21:04:01.000+02:00
diff --git a/src/coreclr/jit/gcinfo.cpp b/src/coreclr/jit/gcinfo.cpp
@@ -316,9 +316,10 @@ GCInfo::WriteBarrierForm GCInfo::gcWriteBarrierFormFromTargetAddress(GenTree* tg
                 GenTree*  addOp2     = tgtAddr->AsOp()->gtGetOp2();
                 var_types addOp1Type = addOp1->TypeGet();
                 var_types addOp2Type = addOp2->TypeGet();
+
                 if (addOp1Type == TYP_BYREF || addOp1Type == TYP_REF)
                 {
-                    assert(addOp2Type != TYP_BYREF && addOp2Type != TYP_REF);
+                    assert(((addOp2Type != TYP_BYREF) || (addOp2->OperIs(GT_CNS_INT))) && (addOp2Type != TYP_REF));
                     tgtAddr        = addOp1;
                     simplifiedExpr = true;
                 }
diff --git a/src/coreclr/jit/lower.cpp b/src/coreclr/jit/lower.cpp
@@ -6033,7 +6033,7 @@ bool Lowering::TryCreateAddrMode(GenTree* addr, bool isContainable, GenTree* par
     }
 
 #ifdef TARGET_ARM64
-    if (parent->OperIsIndir() && parent->AsIndir()->IsVolatile() && !varTypeIsGC(addr))
+    if (parent->OperIsIndir() && parent->AsIndir()->IsVolatile())
     {
         // For Arm64 we avoid using LEA for volatile INDs
         // because we won't be able to use ldar/star

Original file line number	Diff line number	Diff line change
`@@ -316,9 +316,10 @@ GCInfo::WriteBarrierForm GCInfo::gcWriteBarrierFormFromTargetAddress(GenTree* tg`
`316`	`316`	`GenTree* addOp2 = tgtAddr->AsOp()->gtGetOp2();`
`317`	`317`	`var_types addOp1Type = addOp1->TypeGet();`
`318`	`318`	`var_types addOp2Type = addOp2->TypeGet();`
	`319`	`+`
`319`	`320`	`if (addOp1Type == TYP_BYREF \|\| addOp1Type == TYP_REF)`
`320`	`321`	`{`
`321`		`- assert(addOp2Type != TYP_BYREF && addOp2Type != TYP_REF);`
	`322`	`+ assert(((addOp2Type != TYP_BYREF) \|\| (addOp2->OperIs(GT_CNS_INT))) && (addOp2Type != TYP_REF));`
`322`	`323`	`tgtAddr = addOp1;`
`323`	`324`	`simplifiedExpr = true;`
`324`	`325`	`}`
Original file line number	Diff line number	Diff line change
`@@ -6033,7 +6033,7 @@ bool Lowering::TryCreateAddrMode(GenTree* addr, bool isContainable, GenTree* par`
`6033`	`6033`	`}`
`6034`	`6034`
`6035`	`6035`	`#ifdef TARGET_ARM64`
`6036`		`- if (parent->OperIsIndir() && parent->AsIndir()->IsVolatile() && !varTypeIsGC(addr))`
	`6036`	`+ if (parent->OperIsIndir() && parent->AsIndir()->IsVolatile())`
`6037`	`6037`	`{`
`6038`	`6038`	`// For Arm64 we avoid using LEA for volatile INDs`
`6039`	`6039`	`// because we won't be able to use ldar/star`