@@ -9284,24 +9284,24 @@ void CodeGen::genAmd64EmitterUnitTestsAvx10v2()
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return;
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}
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- //packed conversion instructions
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- theEmitter->emitIns_R_R(INS_vcvttps2dqs, EA_4BYTE, REG_XMM0, REG_XMM1); // xmm
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- theEmitter->emitIns_R_R(INS_vcvttps2dqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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- theEmitter->emitIns_R_R(INS_vcvttps2dqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+ // packed conversion instructions
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+ theEmitter->emitIns_R_R(INS_vcvttps2dqs, EA_4BYTE, REG_XMM0, REG_XMM1); // xmm
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+ theEmitter->emitIns_R_R(INS_vcvttps2dqs, EA_32BYTE, REG_XMM0, REG_XMM1); // ymm
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+ theEmitter->emitIns_R_R(INS_vcvttps2dqs, EA_64BYTE, REG_XMM0, REG_XMM1); // zmm
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- theEmitter->emitIns_R_R(INS_vcvttps2udqs, EA_4BYTE, REG_XMM0, REG_XMM1);// xmm
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- theEmitter->emitIns_R_R(INS_vcvttps2udqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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- theEmitter->emitIns_R_R(INS_vcvttps2udqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+ theEmitter->emitIns_R_R(INS_vcvttps2udqs, EA_4BYTE, REG_XMM0, REG_XMM1); // xmm
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+ theEmitter->emitIns_R_R(INS_vcvttps2udqs, EA_32BYTE, REG_XMM0, REG_XMM1); // ymm
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+ theEmitter->emitIns_R_R(INS_vcvttps2udqs, EA_64BYTE, REG_XMM0, REG_XMM1); // zmm
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- theEmitter->emitIns_R_R(INS_vcvttpd2qqs, EA_8BYTE, REG_XMM0, REG_XMM1);// xmm
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- theEmitter->emitIns_R_R(INS_vcvttpd2qqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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- theEmitter->emitIns_R_R(INS_vcvttpd2qqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+ theEmitter->emitIns_R_R(INS_vcvttpd2qqs, EA_8BYTE, REG_XMM0, REG_XMM1); // xmm
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+ theEmitter->emitIns_R_R(INS_vcvttpd2qqs, EA_32BYTE, REG_XMM0, REG_XMM1); // ymm
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+ theEmitter->emitIns_R_R(INS_vcvttpd2qqs, EA_64BYTE, REG_XMM0, REG_XMM1); // zmm
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- theEmitter->emitIns_R_R(INS_vcvttpd2uqqs, EA_8BYTE, REG_XMM0, REG_XMM1);// xmm
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- theEmitter->emitIns_R_R(INS_vcvttpd2uqqs, EA_32BYTE, REG_XMM0, REG_XMM1);// ymm
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- theEmitter->emitIns_R_R(INS_vcvttpd2uqqs, EA_64BYTE, REG_XMM0, REG_XMM1);// zmm
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+ theEmitter->emitIns_R_R(INS_vcvttpd2uqqs, EA_8BYTE, REG_XMM0, REG_XMM1); // xmm
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+ theEmitter->emitIns_R_R(INS_vcvttpd2uqqs, EA_32BYTE, REG_XMM0, REG_XMM1); // ymm
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+ theEmitter->emitIns_R_R(INS_vcvttpd2uqqs, EA_64BYTE, REG_XMM0, REG_XMM1); // zmm
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- //scalar conversion instructions
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+ // scalar conversion instructions
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theEmitter->emitIns_R_R(INS_vcvttsd2sis32, EA_8BYTE, REG_XMM0, REG_XMM1);
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theEmitter->emitIns_R_R(INS_vcvttsd2sis64, EA_8BYTE, REG_XMM0, REG_XMM1);
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theEmitter->emitIns_R_R(INS_vcvttsd2usis32, EA_8BYTE, REG_XMM0, REG_XMM1);
@@ -9311,16 +9311,15 @@ void CodeGen::genAmd64EmitterUnitTestsAvx10v2()
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theEmitter->emitIns_R_R(INS_vcvttss2usis32, EA_4BYTE, REG_XMM0, REG_XMM1);
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theEmitter->emitIns_R_R(INS_vcvttss2usis64, EA_4BYTE, REG_XMM0, REG_XMM1);
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+ // minmax instruction
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+ theEmitter->emitIns_R_R_R_I(INS_vminmaxss, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0);
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+ theEmitter->emitIns_R_R_R_I(INS_vminmaxsd, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0);
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+ theEmitter->emitIns_R_R_R_I(INS_vminmaxps, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0);
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+ theEmitter->emitIns_R_R_R_I(INS_vminmaxpd, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0);
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+ theEmitter->emitIns_R_R_R_I(INS_vminmaxps, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0);
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+ theEmitter->emitIns_R_R_R_I(INS_vminmaxpd, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0);
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- //minmax instruction
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- theEmitter->emitIns_R_R_R_I(INS_vminmaxss, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0);
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- theEmitter->emitIns_R_R_R_I(INS_vminmaxsd, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0);
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- theEmitter->emitIns_R_R_R_I(INS_vminmaxps, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0);
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- theEmitter->emitIns_R_R_R_I(INS_vminmaxpd, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0);
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- theEmitter->emitIns_R_R_R_I(INS_vminmaxps, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0);
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- theEmitter->emitIns_R_R_R_I(INS_vminmaxpd, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2,0);
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-
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- //VCVT[,T]PS2I[,U]BS
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+ // VCVT[,T]PS2I[,U]BS
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theEmitter->emitIns_R_R(INS_vcvtps2ibs, EA_16BYTE, REG_XMM0, REG_XMM1);
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theEmitter->emitIns_R_R(INS_vcvtps2ibs, EA_32BYTE, REG_XMM0, REG_XMM1);
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theEmitter->emitIns_R_R(INS_vcvtps2ibs, EA_32BYTE, REG_XMM0, REG_XMM1, INS_OPTS_EVEX_er_ru);
@@ -9340,7 +9339,7 @@ void CodeGen::genAmd64EmitterUnitTestsAvx10v2()
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theEmitter->emitIns_R_R(INS_vcvttps2iubs, EA_32BYTE, REG_XMM0, REG_XMM1, INS_OPTS_EVEX_er_ru);
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theEmitter->emitIns_R_R(INS_vcvttps2iubs, EA_64BYTE, REG_XMM0, REG_XMM1);
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- //VPDPW[SU,US,UU]D[,S]
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+ // VPDPW[SU,US,UU]D[,S]
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theEmitter->emitIns_R_R_R(INS_vpdpwsud, EA_16BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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theEmitter->emitIns_R_R_R(INS_vpdpwsud, EA_32BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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theEmitter->emitIns_R_R_R(INS_vpdpwsud, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
@@ -9385,7 +9384,7 @@ void CodeGen::genAmd64EmitterUnitTestsAvx10v2()
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theEmitter->emitIns_R_R_R(INS_vpdpbuuds, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2);
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// VMPSADBW
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- theEmitter->emitIns_R_R_R_I(INS_vmpsadbw, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0);// zmm
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+ theEmitter->emitIns_R_R_R_I(INS_vmpsadbw, EA_64BYTE, REG_XMM0, REG_XMM1, REG_XMM2, 0); // zmm
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// VCOMXSD
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theEmitter->emitIns_R_R(INS_vcomxsd, EA_16BYTE, REG_XMM0, REG_XMM1);
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