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Update target_feature syntax (rust-lang#283)
This commit updates to the latest nightly's syntax where `#[target_feature = "+foo"]` is now deprecated in favor of `#[target_feature(enable = "foo")]`. Additionally `#[target_feature]` can only be applied to `unsafe` functions for now. Along the way this removes a few exampels that were just left around and also disables the `fxsr` modules as that target feature will need to land in upstream rust-lang/rust first as it's currently unknown to the compiler.
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lines changed

38 files changed

+1112
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lines changed

‎coresimd/src/aarch64/neon.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,31 +9,31 @@ use v128::f64x2;
99

1010
/// Vector add.
1111
#[inline(always)]
12-
#[target_feature = "+neon"]
12+
#[target_feature(enable = "neon")]
1313
#[cfg_attr(test, assert_instr(fadd))]
1414
pub unsafe fn vadd_f64(a: f64, b: f64) -> f64 {
1515
a + b
1616
}
1717

1818
/// Vector add.
1919
#[inline(always)]
20-
#[target_feature = "+neon"]
20+
#[target_feature(enable = "neon")]
2121
#[cfg_attr(test, assert_instr(fadd))]
2222
pub unsafe fn vaddq_f64(a: f64x2, b: f64x2) -> f64x2 {
2323
simd_add(a, b)
2424
}
2525

2626
/// Vector add.
2727
#[inline(always)]
28-
#[target_feature = "+neon"]
28+
#[target_feature(enable = "neon")]
2929
#[cfg_attr(test, assert_instr(add))]
3030
pub unsafe fn vaddd_s64(a: i64, b: i64) -> i64 {
3131
a + b
3232
}
3333

3434
/// Vector add.
3535
#[inline(always)]
36-
#[target_feature = "+neon"]
36+
#[target_feature(enable = "neon")]
3737
#[cfg_attr(test, assert_instr(add))]
3838
pub unsafe fn vaddd_u64(a: u64, b: u64) -> u64 {
3939
a + b

‎coresimd/src/arm/neon.rs

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -10,135 +10,135 @@ use v128::{f32x4, i16x8, i32x4, i64x2, i8x16, u16x8, u32x4, u64x2, u8x16};
1010

1111
/// Vector add.
1212
#[inline(always)]
13-
#[target_feature = "+neon"]
13+
#[target_feature(enable = "neon")]
1414
#[cfg_attr(test, assert_instr(add))]
1515
pub unsafe fn vadd_s8(a: i8x8, b: i8x8) -> i8x8 {
1616
simd_add(a, b)
1717
}
1818

1919
/// Vector add.
2020
#[inline(always)]
21-
#[target_feature = "+neon"]
21+
#[target_feature(enable = "neon")]
2222
#[cfg_attr(test, assert_instr(add))]
2323
pub unsafe fn vaddq_s8(a: i8x16, b: i8x16) -> i8x16 {
2424
simd_add(a, b)
2525
}
2626

2727
/// Vector add.
2828
#[inline(always)]
29-
#[target_feature = "+neon"]
29+
#[target_feature(enable = "neon")]
3030
#[cfg_attr(test, assert_instr(add))]
3131
pub unsafe fn vadd_s16(a: i16x4, b: i16x4) -> i16x4 {
3232
simd_add(a, b)
3333
}
3434

3535
/// Vector add.
3636
#[inline(always)]
37-
#[target_feature = "+neon"]
37+
#[target_feature(enable = "neon")]
3838
#[cfg_attr(test, assert_instr(add))]
3939
pub unsafe fn vaddq_s16(a: i16x8, b: i16x8) -> i16x8 {
4040
simd_add(a, b)
4141
}
4242

4343
/// Vector add.
4444
#[inline(always)]
45-
#[target_feature = "+neon"]
45+
#[target_feature(enable = "neon")]
4646
#[cfg_attr(test, assert_instr(add))]
4747
pub unsafe fn vadd_s32(a: i32x2, b: i32x2) -> i32x2 {
4848
simd_add(a, b)
4949
}
5050

5151
/// Vector add.
5252
#[inline(always)]
53-
#[target_feature = "+neon"]
53+
#[target_feature(enable = "neon")]
5454
#[cfg_attr(test, assert_instr(add))]
5555
pub unsafe fn vaddq_s32(a: i32x4, b: i32x4) -> i32x4 {
5656
simd_add(a, b)
5757
}
5858

5959
/// Vector add.
6060
#[inline(always)]
61-
#[target_feature = "+neon"]
61+
#[target_feature(enable = "neon")]
6262
#[cfg_attr(test, assert_instr(add))]
6363
pub unsafe fn vaddq_s64(a: i64x2, b: i64x2) -> i64x2 {
6464
simd_add(a, b)
6565
}
6666

6767
/// Vector add.
6868
#[inline(always)]
69-
#[target_feature = "+neon"]
69+
#[target_feature(enable = "neon")]
7070
#[cfg_attr(test, assert_instr(add))]
7171
pub unsafe fn vadd_u8(a: u8x8, b: u8x8) -> u8x8 {
7272
simd_add(a, b)
7373
}
7474

7575
/// Vector add.
7676
#[inline(always)]
77-
#[target_feature = "+neon"]
77+
#[target_feature(enable = "neon")]
7878
#[cfg_attr(test, assert_instr(add))]
7979
pub unsafe fn vaddq_u8(a: u8x16, b: u8x16) -> u8x16 {
8080
simd_add(a, b)
8181
}
8282

8383
/// Vector add.
8484
#[inline(always)]
85-
#[target_feature = "+neon"]
85+
#[target_feature(enable = "neon")]
8686
#[cfg_attr(test, assert_instr(add))]
8787
pub unsafe fn vadd_u16(a: u16x4, b: u16x4) -> u16x4 {
8888
simd_add(a, b)
8989
}
9090

9191
/// Vector add.
9292
#[inline(always)]
93-
#[target_feature = "+neon"]
93+
#[target_feature(enable = "neon")]
9494
#[cfg_attr(test, assert_instr(add))]
9595
pub unsafe fn vaddq_u16(a: u16x8, b: u16x8) -> u16x8 {
9696
simd_add(a, b)
9797
}
9898

9999
/// Vector add.
100100
#[inline(always)]
101-
#[target_feature = "+neon"]
101+
#[target_feature(enable = "neon")]
102102
#[cfg_attr(test, assert_instr(add))]
103103
pub unsafe fn vadd_u32(a: u32x2, b: u32x2) -> u32x2 {
104104
simd_add(a, b)
105105
}
106106

107107
/// Vector add.
108108
#[inline(always)]
109-
#[target_feature = "+neon"]
109+
#[target_feature(enable = "neon")]
110110
#[cfg_attr(test, assert_instr(add))]
111111
pub unsafe fn vaddq_u32(a: u32x4, b: u32x4) -> u32x4 {
112112
simd_add(a, b)
113113
}
114114

115115
/// Vector add.
116116
#[inline(always)]
117-
#[target_feature = "+neon"]
117+
#[target_feature(enable = "neon")]
118118
#[cfg_attr(test, assert_instr(add))]
119119
pub unsafe fn vaddq_u64(a: u64x2, b: u64x2) -> u64x2 {
120120
simd_add(a, b)
121121
}
122122

123123
/// Vector add.
124124
#[inline(always)]
125-
#[target_feature = "+neon"]
125+
#[target_feature(enable = "neon")]
126126
#[cfg_attr(test, assert_instr(fadd))]
127127
pub unsafe fn vadd_f32(a: f32x2, b: f32x2) -> f32x2 {
128128
simd_add(a, b)
129129
}
130130

131131
/// Vector add.
132132
#[inline(always)]
133-
#[target_feature = "+neon"]
133+
#[target_feature(enable = "neon")]
134134
#[cfg_attr(test, assert_instr(fadd))]
135135
pub unsafe fn vaddq_f32(a: f32x4, b: f32x4) -> f32x4 {
136136
simd_add(a, b)
137137
}
138138

139139
/// Vector long add.
140140
#[inline(always)]
141-
#[target_feature = "+neon"]
141+
#[target_feature(enable = "neon")]
142142
#[cfg_attr(test, assert_instr(saddl))]
143143
pub unsafe fn vaddl_s8(a: i8x8, b: i8x8) -> i16x8 {
144144
let a = a.as_i16x8();
@@ -148,7 +148,7 @@ pub unsafe fn vaddl_s8(a: i8x8, b: i8x8) -> i16x8 {
148148

149149
/// Vector long add.
150150
#[inline(always)]
151-
#[target_feature = "+neon"]
151+
#[target_feature(enable = "neon")]
152152
#[cfg_attr(test, assert_instr(saddl))]
153153
pub unsafe fn vaddl_s16(a: i16x4, b: i16x4) -> i32x4 {
154154
let a = a.as_i32x4();
@@ -158,7 +158,7 @@ pub unsafe fn vaddl_s16(a: i16x4, b: i16x4) -> i32x4 {
158158

159159
/// Vector long add.
160160
#[inline(always)]
161-
#[target_feature = "+neon"]
161+
#[target_feature(enable = "neon")]
162162
#[cfg_attr(test, assert_instr(saddl))]
163163
pub unsafe fn vaddl_s32(a: i32x2, b: i32x2) -> i64x2 {
164164
let a = a.as_i64x2();
@@ -168,7 +168,7 @@ pub unsafe fn vaddl_s32(a: i32x2, b: i32x2) -> i64x2 {
168168

169169
/// Vector long add.
170170
#[inline(always)]
171-
#[target_feature = "+neon"]
171+
#[target_feature(enable = "neon")]
172172
#[cfg_attr(test, assert_instr(uaddl))]
173173
pub unsafe fn vaddl_u8(a: u8x8, b: u8x8) -> u16x8 {
174174
let a = a.as_u16x8();
@@ -178,7 +178,7 @@ pub unsafe fn vaddl_u8(a: u8x8, b: u8x8) -> u16x8 {
178178

179179
/// Vector long add.
180180
#[inline(always)]
181-
#[target_feature = "+neon"]
181+
#[target_feature(enable = "neon")]
182182
#[cfg_attr(test, assert_instr(uaddl))]
183183
pub unsafe fn vaddl_u16(a: u16x4, b: u16x4) -> u32x4 {
184184
let a = a.as_u32x4();
@@ -188,7 +188,7 @@ pub unsafe fn vaddl_u16(a: u16x4, b: u16x4) -> u32x4 {
188188

189189
/// Vector long add.
190190
#[inline(always)]
191-
#[target_feature = "+neon"]
191+
#[target_feature(enable = "neon")]
192192
#[cfg_attr(test, assert_instr(uaddl))]
193193
pub unsafe fn vaddl_u32(a: u32x2, b: u32x2) -> u64x2 {
194194
let a = a.as_u64x2();
@@ -206,7 +206,7 @@ extern "C" {
206206

207207
/// Reciprocal square-root estimate.
208208
#[inline(always)]
209-
#[target_feature = "+neon"]
209+
#[target_feature(enable = "neon")]
210210
#[cfg_attr(test, assert_instr(frsqrte))]
211211
pub unsafe fn vrsqrte_f32(a: f32x2) -> f32x2 {
212212
frsqrte_v2f32(a)

‎coresimd/src/arm/v7.rs

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,8 @@ pub unsafe fn _clz_u32(x: u32) -> u32 {
3636
/// Reverse the bit order.
3737
#[inline(always)]
3838
#[cfg_attr(test, assert_instr(rbit))]
39-
#[cfg_attr(target_arch = "arm", target_feature = "+v7")]
39+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
40+
#[cfg(dont_compile_me)] // FIXME need to add `v7` upstream in rustc
4041
pub unsafe fn _rbit_u32(x: u32) -> u32 {
4142
rbit_u32(x as i32) as u32
4243
}
@@ -73,6 +74,7 @@ mod tests {
7374
}
7475

7576
#[test]
77+
#[cfg(dont_compile_me)] // FIXME need to add `v7` upstream in rustc
7678
fn _rbit_u32() {
7779
unsafe {
7880
assert_eq!(

‎coresimd/src/x86/i386/fxsr.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ extern "C" {
2222
/// [fxsave]: http://www.felixcloutier.com/x86/FXSAVE.html
2323
/// [fxrstor]: http://www.felixcloutier.com/x86/FXRSTOR.html
2424
#[inline(always)]
25-
#[target_feature = "+fxsr"]
25+
#[target_feature(enable = "fxsr")]
2626
#[cfg_attr(test, assert_instr(fxsave))]
2727
pub unsafe fn _fxsave(mem_addr: *mut u8) {
2828
fxsave(mem_addr)
@@ -43,7 +43,7 @@ pub unsafe fn _fxsave(mem_addr: *mut u8) {
4343
/// [fxsave]: http://www.felixcloutier.com/x86/FXSAVE.html
4444
/// [fxrstor]: http://www.felixcloutier.com/x86/FXRSTOR.html
4545
#[inline(always)]
46-
#[target_feature = "+fxsr"]
46+
#[target_feature(enable = "fxsr")]
4747
#[cfg_attr(test, assert_instr(fxrstor))]
4848
pub unsafe fn _fxrstor(mem_addr: *const u8) {
4949
fxrstor(mem_addr)

‎coresimd/src/x86/i386/mod.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,5 +3,8 @@
33
mod eflags;
44
pub use self::eflags::*;
55

6+
7+
#[cfg(dont_compile_me)] // TODO: need to upstream `fxsr` target feature
68
mod fxsr;
9+
#[cfg(dont_compile_me)] // TODO: need to upstream `fxsr` target feature
710
pub use self::fxsr::*;

‎coresimd/src/x86/i586/abm.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ use stdsimd_test::assert_instr;
2424
///
2525
/// When the operand is zero, it returns its size in bits.
2626
#[inline(always)]
27-
#[target_feature = "+lzcnt"]
27+
#[target_feature(enable = "lzcnt")]
2828
#[cfg_attr(test, assert_instr(lzcnt))]
2929
pub unsafe fn _lzcnt_u32(x: u32) -> u32 {
3030
x.leading_zeros()
@@ -34,23 +34,23 @@ pub unsafe fn _lzcnt_u32(x: u32) -> u32 {
3434
///
3535
/// When the operand is zero, it returns its size in bits.
3636
#[inline(always)]
37-
#[target_feature = "+lzcnt"]
37+
#[target_feature(enable = "lzcnt")]
3838
#[cfg_attr(test, assert_instr(lzcnt))]
3939
pub unsafe fn _lzcnt_u64(x: u64) -> u64 {
4040
x.leading_zeros() as u64
4141
}
4242

4343
/// Counts the bits that are set.
4444
#[inline(always)]
45-
#[target_feature = "+popcnt"]
45+
#[target_feature(enable = "popcnt")]
4646
#[cfg_attr(test, assert_instr(popcnt))]
4747
pub unsafe fn _popcnt32(x: i32) -> i32 {
4848
x.count_ones() as i32
4949
}
5050

5151
/// Counts the bits that are set.
5252
#[inline(always)]
53-
#[target_feature = "+popcnt"]
53+
#[target_feature(enable = "popcnt")]
5454
#[cfg_attr(test, assert_instr(popcnt))]
5555
pub unsafe fn _popcnt64(x: i64) -> i32 {
5656
x.count_ones() as i32

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