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Copy file name to clipboardExpand all lines: tools/power/x86/turbostat/turbostat.8
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@@ -33,6 +33,9 @@ name as necessary to disambiguate it from others is necessary. Note that option
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msr0xXXX is a hex offset, eg. msr0x10
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/sys/path... is an absolute path to a sysfs attribute
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<device> is a perf device from /sys/bus/event_source/devices/<device> eg. cstate_core
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On Intel hybrid platforms, instead of one "cpu" perf device there are two, "cpu_core" and "cpu_atom" devices for P and E cores respectively.
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Turbostat, in this case, allow user to use "cpu" device and will automatically detect the type of a CPU and translate it to "cpu_core" and "cpu_atom" accordingly.
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For a complete example see "ADD PERF COUNTER EXAMPLE #2 (using virtual "cpu" device)".
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<event> is a perf event for given device from /sys/bus/event_source/devices/<device>/events/<event> eg. c1-residency
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perf/cstate_core/c1-residency would then use /sys/bus/event_source/devices/cstate_core/events/c1-residency
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@@ -133,7 +136,7 @@ displays the statistics gathered since it was forked.
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The system configuration dump (if --quiet is not used) is followed by statistics. The first row of the statistics labels the content of each column (below). The second row of statistics is the system summary line. The system summary line has a '-' in the columns for the Package, Core, and CPU. The contents of the system summary line depends on the type of column. Columns that count items (eg. IRQ) show the sum across all CPUs in the system. Columns that show a percentage show the average across all CPUs in the system. Columns that dump raw MSR values simply show 0 in the summary. After the system summary row, each row describes a specific Package/Core/CPU. Note that if the --cpu parameter is used to limit which specific CPUs are displayed, turbostat will still collect statistics for all CPUs in the system and will still show the system summary for all CPUs in the system.
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.SH COLUMN DESCRIPTIONS
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.PP
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\fBusec\fP For each CPU, the number of microseconds elapsed during counter collection, including thread migration -- if any. This counter is disabled by default, and is enabled with "--enable usec", or --debug. On the summary row, usec refers to the total elapsed time to collect the counters on all cpus.
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\fBusec\fP For each CPU, the number of microseconds elapsed during counter collection, including thread migration -- if any. This counter is disabled by default, and is enabled with "--enable usec", or --debug. On the summary row, usec refers to the total elapsed time to snapshot the procfs/sysfs and collect the counters on all cpus.
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.PP
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\fBTime_Of_Day_Seconds\fP For each CPU, the gettimeofday(2) value (seconds.subsec since Epoch) when the counters ending the measurement interval were collected. This column is disabled by default, and can be enabled with "--enable Time_Of_Day_Seconds" or "--debug". On the summary row, Time_Of_Day_Seconds refers to the timestamp following collection of counters on the last CPU.
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.PP
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.PP
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\fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors.
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.PP
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\fBSysWatt\fP Watts consumed by the whole platform (RAPL PSYS).
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.PP
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\fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package. Note that the system summary is the sum of the package throttling time, and thus may be higher than 100% on a multi-package system. Note that the meaning of this field is model specific. For example, some hardware increments this counter when RAPL responds to thermal limits, but does not increment this counter when RAPL responds to power limits. Comparing PkgWatt and PkgTmp to system limits is necessary.
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.PP
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\fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
@@ -387,6 +392,28 @@ CPU pCPU%c1 CPU%c1
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.fi
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.SH ADD PERF COUNTER EXAMPLE #2 (using virtual cpu device)
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Here we run on hybrid, Raptor Lake platform.
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We limit turbostat to show output for just cpu0 (pcore) and cpu12 (ecore).
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We add a counter showing number of L3 cache misses, using virtual "cpu" device,
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labeling it with the column header, "VCMISS".
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We add a counter showing number of L3 cache misses, using virtual "cpu_core" device,
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labeling it with the column header, "PCMISS". This will fail on ecore cpu12.
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We add a counter showing number of L3 cache misses, using virtual "cpu_atom" device,
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labeling it with the column header, "ECMISS". This will fail on pcore cpu0.
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We display it only once, after the conclusion of 0.1 second sleep.
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