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Better instructions parsing of 00/11 to 1/0 #8

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Domkeykong opened this issue May 22, 2023 · 4 comments
Open

Better instructions parsing of 00/11 to 1/0 #8

Domkeykong opened this issue May 22, 2023 · 4 comments

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@Domkeykong
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While looking at the rv32e instruction set i found these 2 which can be very useful:

        snez a0, a0 // set not equal zero

which can be used here to save 3 instructions:

c.srli a0, USB_DM
c.addi a0, 1 // 00 -> 1, 11 -> 100
c.andi a0, 1 // If 1, 1 if 0, 0.

and this

        seqz a0, a0 // set equal zero

which can be used here as an alternative:

slti a0, a0, 1<<USB_DM // A0 = 0 if 0 bit, A0 = 1 if 1 bit.

with both of those changes combined you may even be able to drop the requirements of having D- before D+

@cnlohr
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cnlohr commented May 23, 2023

Please articulate more, exactly what the change would be (before/after)

Side-note: I have NEVER seen sltiu that's very cool.

@cnlohr
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cnlohr commented May 23, 2023

side-note: It would be mega cool to be able to do all this on the 24MHz internal clock for other situations w/o pll.

@cnlohr
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cnlohr commented May 23, 2023

side-side-note: I really wish they had c.sltiu

@duk-37
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duk-37 commented May 23, 2023

The proposal here is just to replace the highlighted instruction sequences with snez a0, a0 and seqz a0, a0 respectively. This works because at either of these points in time a0 will just be either zero or nonzero. Really the only issue I see with this would be alignment for the rest of the start of packet_type_loop, but that's fixable.

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3 participants