The initial implementation of simd for riscv64, #6118, states:
There is additional state that I'm ignoring here:
- vxrm: Vector fixed-point rounding mode register
- vxsat: Vector fixed-point saturation flag register
Not sure if we need these, but we can handle them in the same manner as vtype, and insert their respective mode switching instructions in the same pass.
According to ABI documentation for riscv64 it looks like both of these registers are not preserved around function calls. Cranelift's implementation of avg_round and sqmul_round_sat both rely on this (riscv64 instructions vssrl and vsmul). This seems to work in QEMU because nothing else in Wasmtime modifies the register, but this likely isn't a fully-safe assumption.
The initial implementation of simd for riscv64, #6118, states:
According to ABI documentation for riscv64 it looks like both of these registers are not preserved around function calls. Cranelift's implementation of
avg_roundandsqmul_round_satboth rely on this (riscv64 instructionsvssrlandvsmul). This seems to work in QEMU because nothing else in Wasmtime modifies the register, but this likely isn't a fully-safe assumption.