Skip to content

Commit cd24682

Browse files
MarinPostmaMarinPostma
committed
final edits
1 parent e16d7d8 commit cd24682

File tree

11 files changed

+69
-62
lines changed

11 files changed

+69
-62
lines changed

‎tests/disas/winch/x64/atomic/load/i32_atomic_load.wat

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -13,23 +13,23 @@
1313
;; movq 0x10(%r11), %r11
1414
;; addq $0x20, %r11
1515
;; cmpq %rsp, %r11
16-
;; ja 0x58
16+
;; ja 0x57
1717
;; 1c: movq %rdi, %r14
1818
;; subq $0x20, %rsp
1919
;; movq %rdi, 0x18(%rsp)
2020
;; movq %rsi, 0x10(%rsp)
2121
;; movl %edx, 0xc(%rsp)
2222
;; movl 0xc(%rsp), %eax
23-
;; movl %eax, %r11d
24-
;; andl $3, %r11d
25-
;; cmpl $0, %r11d
26-
;; jne 0x5a
27-
;; 46: movq 0x58(%r14), %r11
23+
;; andl $3, %eax
24+
;; cmpl $0, %eax
25+
;; jne 0x59
26+
;; 41: movl 0xc(%rsp), %eax
27+
;; movq 0x58(%r14), %r11
2828
;; movq (%r11), %rcx
2929
;; addq %rax, %rcx
3030
;; movl (%rcx), %eax
3131
;; addq $0x20, %rsp
3232
;; popq %rbp
3333
;; retq
34-
;; 58: ud2
35-
;; 5a: ud2
34+
;; 57: ud2
35+
;; 59: ud2

‎tests/disas/winch/x64/atomic/load/i32_atomic_load16_u.wat

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -13,23 +13,23 @@
1313
;; movq 0x10(%r11), %r11
1414
;; addq $0x20, %r11
1515
;; cmpq %rsp, %r11
16-
;; ja 0x5c
16+
;; ja 0x5b
1717
;; 1c: movq %rdi, %r14
1818
;; subq $0x20, %rsp
1919
;; movq %rdi, 0x18(%rsp)
2020
;; movq %rsi, 0x10(%rsp)
2121
;; movl %edx, 0xc(%rsp)
2222
;; movl 0xc(%rsp), %eax
23-
;; movl %eax, %r11d
24-
;; andw $1, %r11w
25-
;; cmpw $0, %r11w
26-
;; jne 0x5e
27-
;; 48: movq 0x58(%r14), %r11
23+
;; andw $1, %ax
24+
;; cmpw $0, %ax
25+
;; jne 0x5d
26+
;; 43: movl 0xc(%rsp), %eax
27+
;; movq 0x58(%r14), %r11
2828
;; movq (%r11), %rcx
2929
;; addq %rax, %rcx
3030
;; movzwq (%rcx), %rax
3131
;; addq $0x20, %rsp
3232
;; popq %rbp
3333
;; retq
34-
;; 5c: ud2
35-
;; 5e: ud2
34+
;; 5b: ud2
35+
;; 5d: ud2

‎tests/disas/winch/x64/atomic/load/i64_atomic_load.wat

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -14,21 +14,21 @@
1414
;; movq 0x10(%r11), %r11
1515
;; addq $0x10, %r11
1616
;; cmpq %rsp, %r11
17-
;; ja 0x52
17+
;; ja 0x54
1818
;; 1c: movq %rdi, %r14
1919
;; subq $0x10, %rsp
2020
;; movq %rdi, 8(%rsp)
2121
;; movq %rsi, (%rsp)
2222
;; movl $0, %eax
23-
;; movq %rax, %r11
24-
;; andq $7, %r11
25-
;; cmpq $0, %r11
26-
;; jne 0x54
27-
;; 42: movq 0x60(%r14), %rcx
23+
;; andq $7, %rax
24+
;; cmpq $0, %rax
25+
;; jne 0x56
26+
;; 3f: movl $0, %eax
27+
;; movq 0x60(%r14), %rcx
2828
;; addq %rax, %rcx
2929
;; movq (%rcx), %rax
3030
;; addq $0x10, %rsp
3131
;; popq %rbp
3232
;; retq
33-
;; 52: ud2
3433
;; 54: ud2
34+
;; 56: ud2

‎tests/disas/winch/x64/atomic/load/i64_atomic_load16_u.wat

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -20,11 +20,11 @@
2020
;; movq %rdi, 8(%rsp)
2121
;; movq %rsi, (%rsp)
2222
;; movl $0, %eax
23-
;; movl %eax, %r11d
24-
;; andw $1, %r11w
25-
;; cmpw $0, %r11w
23+
;; andw $1, %ax
24+
;; cmpw $0, %ax
2625
;; jne 0x57
27-
;; 44: movq 0x60(%r14), %rcx
26+
;; 3f: movl $0, %eax
27+
;; movq 0x60(%r14), %rcx
2828
;; addq %rax, %rcx
2929
;; movzwq (%rcx), %rax
3030
;; addq $0x10, %rsp

‎tests/disas/winch/x64/atomic/load/i64_atomic_load32_u.wat

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -20,11 +20,11 @@
2020
;; movq %rdi, 8(%rsp)
2121
;; movq %rsi, (%rsp)
2222
;; movl $0, %eax
23-
;; movl %eax, %r11d
24-
;; andl $3, %r11d
25-
;; cmpl $0, %r11d
23+
;; andl $3, %eax
24+
;; cmpl $0, %eax
2625
;; jne 0x53
27-
;; 42: movq 0x60(%r14), %rcx
26+
;; 3d: movl $0, %eax
27+
;; movq 0x60(%r14), %rcx
2828
;; addq %rax, %rcx
2929
;; movl (%rcx), %eax
3030
;; addq $0x10, %rsp

‎tests/disas/winch/x64/atomic/store/i32_atomic_store.wat

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18,11 +18,11 @@
1818
;; movq %rsi, (%rsp)
1919
;; movl $0x2a, %eax
2020
;; movl $0, %ecx
21-
;; movl %ecx, %r11d
22-
;; andl $3, %r11d
23-
;; cmpl $0, %r11d
21+
;; andl $3, %ecx
22+
;; cmpl $0, %ecx
2423
;; jne 0x5e
25-
;; 47: movq 0x58(%r14), %r11
24+
;; 42: movl $0, %ecx
25+
;; movq 0x58(%r14), %r11
2626
;; movq (%r11), %rdx
2727
;; addq %rcx, %rdx
2828
;; movl %eax, (%rdx)

‎tests/disas/winch/x64/atomic/store/i32_atomic_store16.wat

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18,11 +18,11 @@
1818
;; movq %rsi, (%rsp)
1919
;; movl $0x2a, %eax
2020
;; movl $0, %ecx
21-
;; movl %ecx, %r11d
22-
;; andw $1, %r11w
23-
;; cmpw $0, %r11w
21+
;; andw $1, %cx
22+
;; cmpw $0, %cx
2423
;; jne 0x61
25-
;; 49: movq 0x58(%r14), %r11
24+
;; 44: movl $0, %ecx
25+
;; movq 0x58(%r14), %r11
2626
;; movq (%r11), %rdx
2727
;; addq %rcx, %rdx
2828
;; movw %ax, (%rdx)

‎tests/disas/winch/x64/atomic/store/i64_atomic_store.wat

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -11,24 +11,24 @@
1111
;; movq 0x10(%r11), %r11
1212
;; addq $0x10, %r11
1313
;; cmpq %rsp, %r11
14-
;; ja 0x5f
14+
;; ja 0x61
1515
;; 1c: movq %rdi, %r14
1616
;; subq $0x10, %rsp
1717
;; movq %rdi, 8(%rsp)
1818
;; movq %rsi, (%rsp)
1919
;; movq $0x2a, %rax
2020
;; movl $0, %ecx
21-
;; movq %rcx, %r11
22-
;; andq $7, %r11
23-
;; cmpq $0, %r11
24-
;; jne 0x61
25-
;; 49: movq 0x58(%r14), %r11
21+
;; andq $7, %rcx
22+
;; cmpq $0, %rcx
23+
;; jne 0x63
24+
;; 46: movl $0, %ecx
25+
;; movq 0x58(%r14), %r11
2626
;; movq (%r11), %rdx
2727
;; addq %rcx, %rdx
2828
;; movq %rax, (%rdx)
2929
;; mfence
3030
;; addq $0x10, %rsp
3131
;; popq %rbp
3232
;; retq
33-
;; 5f: ud2
3433
;; 61: ud2
34+
;; 63: ud2

‎tests/disas/winch/x64/atomic/store/i64_atomic_store16.wat

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18,11 +18,11 @@
1818
;; movq %rsi, (%rsp)
1919
;; movq $0x2a, %rax
2020
;; movl $0, %ecx
21-
;; movl %ecx, %r11d
22-
;; andw $1, %r11w
23-
;; cmpw $0, %r11w
21+
;; andw $1, %cx
22+
;; cmpw $0, %cx
2423
;; jne 0x63
25-
;; 4b: movq 0x58(%r14), %r11
24+
;; 46: movl $0, %ecx
25+
;; movq 0x58(%r14), %r11
2626
;; movq (%r11), %rdx
2727
;; addq %rcx, %rdx
2828
;; movw %ax, (%rdx)

‎tests/disas/winch/x64/atomic/store/i64_atomic_store32.wat

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18,11 +18,11 @@
1818
;; movq %rsi, (%rsp)
1919
;; movq $0x2a, %rax
2020
;; movl $0, %ecx
21-
;; movl %ecx, %r11d
22-
;; andl $3, %r11d
23-
;; cmpl $0, %r11d
21+
;; andl $3, %ecx
22+
;; cmpl $0, %ecx
2423
;; jne 0x60
25-
;; 49: movq 0x58(%r14), %r11
24+
;; 44: movl $0, %ecx
25+
;; movq 0x58(%r14), %r11
2626
;; movq (%r11), %rdx
2727
;; addq %rcx, %rdx
2828
;; movl %eax, (%rdx)

‎winch/codegen/src/codegen/mod.rs

Lines changed: 15 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -844,11 +844,13 @@ where
844844
fn emit_check_align(&mut self, memarg: &MemArg, size: OperandSize) -> Result<()> {
845845
if size.bytes() > 1 {
846846
// Peek addr from top of the stack by popping and pushing.
847-
let addr = self.context.pop_to_reg(self.masm, None)?;
848-
self.context.stack.push(addr.into());
849-
850-
let tmp = scratch!(M);
851-
self.masm.mov(writable!(tmp), RegImm::Reg(addr.reg), size)?;
847+
let addr = *self
848+
.context
849+
.stack
850+
.peek()
851+
.ok_or_else(|| CodeGenError::missing_values_in_stack())?;
852+
let tmp = self.context.any_gpr(self.masm)?;
853+
self.context.move_val_to_reg(&addr, tmp, self.masm)?;
852854

853855
if memarg.offset != 0 {
854856
self.masm.add(
@@ -868,6 +870,7 @@ where
868870

869871
self.masm.cmp(tmp, RegImm::Imm(Imm::i64(0)), size)?;
870872
self.masm.trapif(IntCmpKind::Ne, TRAP_HEAP_MISALIGNED)?;
873+
self.context.free_reg(tmp);
871874
}
872875

873876
Ok(())
@@ -891,12 +894,16 @@ where
891894
op_kind: MemOpKind,
892895
) -> Result<()> {
893896
let maybe_addr = match op_kind {
894-
MemOpKind::Atomic => self.emit_compute_heap_address_align_checked(&arg, kind.derive_operand_size())?,
895-
MemOpKind::Normal => self.emit_compute_heap_address(&arg, kind.derive_operand_size())?,
897+
MemOpKind::Atomic => {
898+
self.emit_compute_heap_address_align_checked(&arg, kind.derive_operand_size())?
899+
}
900+
MemOpKind::Normal => {
901+
self.emit_compute_heap_address(&arg, kind.derive_operand_size())?
902+
}
896903
};
897904

898905
if let Some(addr) = maybe_addr {
899-
let dst = match target_ty {
906+
let dst = match target_type {
900907
WasmValType::I32 | WasmValType::I64 => self.context.any_gpr(self.masm)?,
901908
WasmValType::F32 | WasmValType::F64 => self.context.any_fpr(self.masm)?,
902909
WasmValType::V128 => self.context.reg_for_type(target_type, self.masm)?,

0 commit comments

Comments
 (0)