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1 parent a44951f commit bc6b244Copy full SHA for bc6b244
winch/codegen/src/isa/x64/masm.rs
@@ -1072,9 +1072,8 @@ impl Masm for MacroAssembler {
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size: OperandSize,
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kind: Option<ExtendKind>,
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) {
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- // The x86-64 architecture guarantee that a load
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- // operation will never be reodered with any memory operation appearing after it. Therefore
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- // loads are equivalent to their non-atomic counterparts.
+ // The guarantees of the x86-64 memory model ensure that `SeqCst`
+ // loads are equivalent to normal loads.
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self.wasm_load(src, dst, size, kind);
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}
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