@@ -12,20 +12,26 @@ void AD7173Class::init() {
12
12
SPI.begin ();
13
13
/* use SPI mode 3 */
14
14
SPI.setDataMode (SPI_MODE3);
15
+ /* allow the LDOs to power up */
16
+ delay (10 );
15
17
}
16
18
17
19
void AD7173Class::reset () {
18
20
/* sending at least 64 high bits returns ADC to default state */
19
21
for (int i = 0 ; i < 8 ; i++) {
20
22
SPI.transfer (0xFF );
21
23
}
24
+ /* allow the LDOs to power up */
25
+ delay (10 );
22
26
}
23
27
24
28
void AD7173Class::sync () {
25
29
/* toggle the chip select */
26
30
digitalWrite (SS, HIGH);
27
31
delay (10 );
28
32
digitalWrite (SS, LOW);
33
+ /* allow the LDOs to power up */
34
+ delay (10 );
29
35
}
30
36
31
37
void AD7173Class::print_byte (byte value) {
@@ -96,13 +102,13 @@ int AD7173Class::get_current_data_channel(register_t &channel) {
96
102
return 0 ;
97
103
}
98
104
99
- int AD7173Class::set_adc_mode_config (clock_mode_t clock_mode) {
105
+ int AD7173Class::set_adc_mode_config (data_mode_t data_mode, clock_mode_t clock_mode) {
100
106
/* Address: 0x01, Reset: 0x2000, Name: ADCMODE */
101
107
102
108
/* prepare the configuration value */
103
109
/* REF_EN [15], RESERVED [14], SING_CYC [13], RESERVED [12:11], DELAY [10:8], RESERVED [7], MODE [6:4], CLOCKSEL [3:2], RESERED [1:0] */
104
110
byte value[2 ] = {0x00 , 0x00 };
105
- value[1 ] = (clock_mode << 2 );
111
+ value[1 ] = (data_mode << 4 ) | ( clock_mode << 2 );
106
112
107
113
/* update the desired adc_mode configuration */
108
114
this ->set_register (ADCMODE_REG, value, 2 );
@@ -229,13 +235,12 @@ int AD7173Class::set_setup_config(register_t setup, coding_mode_t coding_mode) {
229
235
return 0 ;
230
236
}
231
237
232
- int AD7173Class::set_filter_config (register_t filter, bool ac_rejection, data_rate_t data_rate) {
238
+ int AD7173Class::set_filter_config (register_t filter, data_rate_t data_rate) {
233
239
/* Address Range: 0x28 to 0x2F, Reset: 0x0000, Name: FILTCON0 to FILTCON7 */
234
240
235
241
/* prepare the configuration value */
236
242
byte value[2 ] = {0x00 , 0x00 };
237
243
/* SINC3_MAP0 [15], RESERVED [14:12], ENHFILTEN0 [11], ENHFILT0 [10:8], RESERVED [7], ORDER0 [6:5], ORD0 [4:0] */
238
- value[0 ] = (ac_rejection << 3 );
239
244
value[1 ] = data_rate;
240
245
241
246
/* update the desired filter configuration */
0 commit comments