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Remove TyCtxt dependency from UnwindContext
1 parent ad5966e commit 9089c30

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4 files changed

+15
-15
lines changed

4 files changed

+15
-15
lines changed

src/debuginfo/mod.rs

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ use crate::prelude::*;
1010
use rustc_index::vec::IndexVec;
1111

1212
use cranelift_codegen::entity::EntityRef;
13-
use cranelift_codegen::ir::{LabelValueLoc, ValueLabel};
13+
use cranelift_codegen::ir::{Endianness, LabelValueLoc, ValueLabel};
1414
use cranelift_codegen::isa::TargetIsa;
1515
use cranelift_codegen::ValueLocRange;
1616

@@ -23,15 +23,6 @@ use gimli::{Encoding, Format, LineEncoding, RunTimeEndian, X86_64};
2323
pub(crate) use emit::{DebugReloc, DebugRelocName};
2424
pub(crate) use unwind::UnwindContext;
2525

26-
fn target_endian(tcx: TyCtxt<'_>) -> RunTimeEndian {
27-
use rustc_target::abi::Endian;
28-
29-
match tcx.data_layout.endian {
30-
Endian::Big => RunTimeEndian::Big,
31-
Endian::Little => RunTimeEndian::Little,
32-
}
33-
}
34-
3526
pub(crate) struct DebugContext<'tcx> {
3627
tcx: TyCtxt<'tcx>,
3728

@@ -60,6 +51,11 @@ impl<'tcx> DebugContext<'tcx> {
6051
address_size: isa.frontend_config().pointer_bytes(),
6152
};
6253

54+
let endian = match isa.endianness() {
55+
Endianness::Little => RunTimeEndian::Little,
56+
Endianness::Big => RunTimeEndian::Big,
57+
};
58+
6359
let mut dwarf = DwarfUnit::new(encoding);
6460

6561
let producer = format!(
@@ -108,7 +104,7 @@ impl<'tcx> DebugContext<'tcx> {
108104
DebugContext {
109105
tcx,
110106

111-
endian: target_endian(tcx),
107+
endian,
112108

113109
dwarf,
114110
unit_range_list: RangeList(Vec::new()),

src/debuginfo/unwind.rs

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22
33
use crate::prelude::*;
44

5+
use cranelift_codegen::ir::Endianness;
56
use cranelift_codegen::isa::{unwind::UnwindInfo, TargetIsa};
67

78
use cranelift_object::ObjectProduct;
@@ -17,8 +18,11 @@ pub(crate) struct UnwindContext {
1718
}
1819

1920
impl UnwindContext {
20-
pub(crate) fn new(tcx: TyCtxt<'_>, isa: &dyn TargetIsa, pic_eh_frame: bool) -> Self {
21-
let endian = super::target_endian(tcx);
21+
pub(crate) fn new(isa: &dyn TargetIsa, pic_eh_frame: bool) -> Self {
22+
let endian = match isa.endianness() {
23+
Endianness::Little => RunTimeEndian::Little,
24+
Endianness::Big => RunTimeEndian::Big,
25+
};
2226
let mut frame_table = FrameTable::default();
2327

2428
let cie_id = if let Some(mut cie) = isa.create_systemv_cie() {

src/driver/aot.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -243,7 +243,7 @@ pub(crate) fn run_aot(
243243
let isa = crate::build_isa(tcx.sess, &backend_config);
244244
let mut allocator_module = make_module(tcx.sess, isa, "allocator_shim".to_string());
245245
assert_eq!(pointer_ty(tcx), allocator_module.target_config().pointer_type());
246-
let mut allocator_unwind_context = UnwindContext::new(tcx, allocator_module.isa(), true);
246+
let mut allocator_unwind_context = UnwindContext::new(allocator_module.isa(), true);
247247
let created_alloc_shim =
248248
crate::allocator::codegen(tcx, &mut allocator_module, &mut allocator_unwind_context);
249249

src/lib.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,7 @@ impl<'tcx> CodegenCx<'tcx> {
141141
assert_eq!(pointer_ty(tcx), isa.pointer_type());
142142

143143
let unwind_context =
144-
UnwindContext::new(tcx, isa, matches!(backend_config.codegen_mode, CodegenMode::Aot));
144+
UnwindContext::new(isa, matches!(backend_config.codegen_mode, CodegenMode::Aot));
145145
let debug_context = if debug_info { Some(DebugContext::new(tcx, isa)) } else { None };
146146
CodegenCx {
147147
tcx,

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