[Fixes #74] Address changelog and formatting

Author: michalfita

hal/src/lib.rs

@@ -34,8 +34,8 @@ The datasheet (DS60001527F) is available via [Microchip](https://ww1.microchip.c
 #![deny(rustdoc::invalid_rust_codeblocks)]
 #![deny(rustdoc::bare_urls)]
 
-pub use embedded_hal_1 as ehal;
 pub use embedded_hal_02 as legacy_ehal;
+pub use embedded_hal_1 as ehal;
 pub use fugit;
 pub use nb;
 

hal/src/pwm.rs

@@ -50,8 +50,8 @@ ch.set_freq(2.kHz());
 use core::marker::PhantomData;
 
 use crate::clocks::{Clock, HostClock, PeripheralIdentifier};
-use crate::legacy_ehal::PwmPin;
 use crate::fugit::HertzU32 as Hertz;
+use crate::legacy_ehal::PwmPin;
 use crate::pac::{
     pwm0::{RegisterBlock, PWM_CH_NUM as ChannelRegister},
     PWM0, PWM1,
@@ -730,7 +730,8 @@ impl<M: PwmMeta, I: ChannelId> ErrorType for Channel<M, I> {
 }
 
 impl<M: PwmMeta, I: ChannelId> SetDutyCycle for Channel<M, I> {
-    fn max_duty_cycle(&self) -> u16 { // TODO: we need to be smarter with scaling
+    fn max_duty_cycle(&self) -> u16 {
+        // TODO: we need to be smarter with scaling
         let max = self.reg().cprd().read().cprd().bits();
         let shift = max.leading_zeros().saturating_sub(16);
         (self.reg().cprd().read().cprd().bits() >> shift & 0xFFFF) as u16 // ? what if frequency changes
@@ -744,13 +745,13 @@ impl<M: PwmMeta, I: ChannelId> SetDutyCycle for Channel<M, I> {
             let max = self.reg().cprd().read().cprd().bits();
             let shift = max.leading_zeros().saturating_sub(16);
             if duty > (max >> (shift & 0xFFFF)) as u16 {
-                return core::result::Result::Err(Self::Error::InvalidDutyCycle)
+                return core::result::Result::Err(Self::Error::InvalidDutyCycle);
             }
             // TODO: that's copy&paste from `self.apply_duty()`, consider commonalization
             if self.is_enabled() {
-            self.reg()
-                .cdtyupd()
-                .write(|w| unsafe { w.cdtyupd().bits((duty as u32) << shift) });
+                self.reg()
+                    .cdtyupd()
+                    .write(|w| unsafe { w.cdtyupd().bits((duty as u32) << shift) });
             } else {
                 self.reg()
                     .cdty()
@@ -759,4 +760,4 @@ impl<M: PwmMeta, I: ChannelId> SetDutyCycle for Channel<M, I> {
             core::result::Result::Ok(())
         }
     }
-}
+}

hal/src/rtt.rs

@@ -54,13 +54,14 @@ timer.disable();
 */
 
 use crate::clocks::{Clock, SlowClock, SlowClockSource};
-use crate::legacy_ehal::{blocking::delay as legacy_delay, timer};
 use crate::ehal::delay;
 use crate::generics::CountDownError;
+use crate::legacy_ehal::{blocking::delay as legacy_delay, timer};
 use crate::pac::{rtt::sr::R as StatusRegister, RTT};
 pub use fugit::{ExtU32, RateExtU32};
 use fugit::{
-    HertzU32 as Hertz, MicrosDurationU32 as MicrosDuration, MillisDurationU32 as MillisDuration, NanosDurationU32 as NanosDuration, TimerDurationU32 as Duration, TimerInstantU32 as Instant
+    HertzU32 as Hertz, MicrosDurationU32 as MicrosDuration, MillisDurationU32 as MillisDuration,
+    NanosDurationU32 as NanosDuration, TimerDurationU32 as Duration, TimerInstantU32 as Instant,
 };
 use rtic_monotonic::Monotonic;
 
@@ -378,7 +379,7 @@ impl<const FREQ_HZ: u32> legacy_delay::DelayMs<u32> for Timer<FREQ_HZ> {
 
 impl<const FREQ_HZ: u32> delay::DelayNs for Timer<FREQ_HZ> {
     fn delay_ns(&mut self, ns: u32) {
-         use timer::CountDown;
+        use timer::CountDown;
 
         self.start(NanosDuration::from_ticks(ns).convert());
         nb::block!(self.wait()).unwrap()

hal/src/serial/spi.rs

@@ -61,13 +61,13 @@ client.write(b"Hello").unwrap();
 
 use super::Bps;
 use crate::clocks::{Clock, HostClock, PeripheralIdentifier};
-use crate::legacy_ehal::blocking; // TODO:: implement embedded_hal 1.0 traits
 use crate::fugit::{ExtU32, NanosDurationU32 as NanosDuration};
+use crate::legacy_ehal::blocking; // TODO:: implement embedded_hal 1.0 traits
 #[cfg(feature = "__pins-144")]
 use crate::pac::SPI1;
 use crate::pac::{spi0::tdr::PCSSELECT_A as HwChipSelect, spi0::RegisterBlock, SPI0};
-use crate::{legacy_ehal, nb};
 use crate::{generics, pio::*};
+use crate::{legacy_ehal, nb};
 use core::marker::PhantomData;
 use legacy_ehal::spi::Mode;
 use strum::FromRepr;

hal/src/serial/twi.rs

@@ -43,8 +43,8 @@ twi.write_read(0x0, &[0b1000_0000], &mut buffer).unwrap();
 */
 
 use crate::clocks::{Clock, Hertz, HostClock, PeripheralIdentifier};
-use crate::legacy_ehal::blocking; // TODO: address I²C from embedded-hal 1.0
 use crate::generics;
+use crate::legacy_ehal::blocking; // TODO: address I²C from embedded-hal 1.0
 #[cfg(feature = "reconfigurable-system-pins")]
 use crate::pac::TWIHS1;
 #[cfg(not(feature = "__pins-64"))]

hal/src/serial/uart.rs

@@ -67,8 +67,8 @@ assert_eq!(uart.read().unwrap(), 0xff);
 */
 
 use crate::clocks::{Clock, HostClock, Pck, Pck4, PeripheralClock, PeripheralIdentifier};
-use crate::legacy_ehal::{self, blocking}; // TODO: embedded-hal 1.0 doesn't have traits for U(S)ART
 use crate::fugit::HertzU32 as Hertz;
+use crate::legacy_ehal::{self, blocking}; // TODO: embedded-hal 1.0 doesn't have traits for U(S)ART
 use crate::pac::uart0::mr::{CHMODESELECT_A as ChannelModeInner, PARSELECT_A as ParityModeInner};
 use crate::pac::{uart0::RegisterBlock, UART0, UART1, UART2};
 #[cfg(all(

hal/src/tc/mod.rs

@@ -187,16 +187,15 @@ interrupt:
 */
 
 use crate::clocks::{Clock, Hertz, HostClock, PeripheralIdentifier};
-use crate::legacy_ehal::blocking::delay as legacy_delay;
 use crate::ehal::delay;
-use crate::legacy_ehal::timer;
 pub use crate::fugit::{ExtU32, RateExtU32};
 use crate::fugit::{
     MicrosDurationU32 as MicrosDuration, MillisDurationU32 as MillisDuration,
-    NanosDurationU32 as NanosDuration,
-    TimerDurationU32 as Duration, TimerInstantU32 as Instant,
+    NanosDurationU32 as NanosDuration, TimerDurationU32 as Duration, TimerInstantU32 as Instant,
 };
 use crate::generics::{self, CountDownError};
+use crate::legacy_ehal::blocking::delay as legacy_delay;
+use crate::legacy_ehal::timer;
 use crate::pac::tc0::{
     tc_channel::{
         cmr_capture_mode::{LDRASELECT_A, LDRBSELECT_A, SBSMPLRSELECT_A},