|
| 1 | +From f6d6cdfcefc77d0bf333cf60812a1d0b7282a5f5 Mon Sep 17 00:00:00 2001 |
| 2 | +From: Martino Facchin < [email protected]> |
| 3 | +Date: Tue, 11 Jul 2023 15:21:40 +0200 |
| 4 | +Subject: [PATCH] giga: fix QSPI initialization |
| 5 | + |
| 6 | +--- |
| 7 | + .../TARGET_GIGA/system_clock_override.c | 17 +++++++++++++++++ |
| 8 | + 1 file changed, 17 insertions(+) |
| 9 | + |
| 10 | +diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_GIGA/system_clock_override.c b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_GIGA/system_clock_override.c |
| 11 | +index 21aa4979b9..71678d1187 100644 |
| 12 | +--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_GIGA/system_clock_override.c |
| 13 | ++++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_GIGA/system_clock_override.c |
| 14 | +@@ -76,6 +76,23 @@ void SetSysClock(void) |
| 15 | + } |
| 16 | + } |
| 17 | + } |
| 18 | ++ |
| 19 | ++ // Set seemingly unrelated pins that prevent QSPI from working |
| 20 | ++ GPIO_InitTypeDef GPIO_InitStruct; |
| 21 | ++ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
| 22 | ++ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; |
| 23 | ++ GPIO_InitStruct.Pull = GPIO_NOPULL; |
| 24 | ++ GPIO_InitStruct.Alternate = 0; |
| 25 | ++ |
| 26 | ++ GPIO_InitStruct.Pin = GPIO_PIN_13; |
| 27 | ++ __HAL_RCC_GPIOD_CLK_ENABLE(); |
| 28 | ++ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); |
| 29 | ++ __HAL_RCC_GPIOD_CLK_DISABLE(); |
| 30 | ++ |
| 31 | ++ GPIO_InitStruct.Pin = GPIO_PIN_7; |
| 32 | ++ __HAL_RCC_GPIOF_CLK_ENABLE(); |
| 33 | ++ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); |
| 34 | ++ __HAL_RCC_GPIOF_CLK_DISABLE(); |
| 35 | + } |
| 36 | + |
| 37 | + #if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) |
| 38 | +-- |
| 39 | +2.41.0 |
| 40 | + |
0 commit comments