diff --git a/README_Xperia b/README_Xperia new file mode 100644 index 00000000000..580bc10cd0b --- /dev/null +++ b/README_Xperia @@ -0,0 +1,56 @@ +Configuration files can be found in arch/arm/configs. + + Xperia Z2 D6502/D6503/D6543/L50w => shinano_sirius_defconfig + Xperia Z2 Tablet SGP521/SGP541 => shinano_castor_defconfig + Xperia Z2 Tablet SGP551 => shinano_castor_brazil_defconfig + Xperia Z2 Tablet SGP511/SGP512 => shinano_castor_windy_defconfig + Xperia Z3 D6603/D6653/D6643 => shinano_leo_defconfig + Xperia Z3 Compact D5803/D5833 => shinano_aries_defconfig + Xperia Z3 Tablet Compact SGP621/SGP641 => shinano_scorpion_defconfig + Xperia Z3 Tablet Compact SGP611/SGP612 => shinano_scorpion_windy_defconfig + + +How to build your kernel: + + Prerequisites: + + * ramdisk.img - root fs + + * mkbootimg - boot.img generator + + * dtbTool - DTB combiner + You can obtain it from various trusted sites including https://www.codeaurora.org/ + + * The ARM cross-compiler + We recommend getting the CodeSourcery Lite compiler. + Or, you can also use prebuild executable binary which is included in + standard Android tree. + + + Step 1: Build Your Kernel (zImage) + $ cd kernel + + $ export ARCH=arm + + $ export CROSS_COMPILE=/opt/arm-2010q1/bin/arm-none-eabi- + NOTE: Please set the location and the prefix of the ARM cross-compiler. + + $ make shinano_leo_defconfig + NOTE: Please set a configuration file you want to build. + + $ make + + You can see arch/arm/boot/zImage if you succeed in building the kernel. + + + Step 2: Prepare Device Tree Image (dt.img) + (In the Linux Kernel directory) + $ dtbTool -o dt.img -s 2048 -p scripts/dtc/ arch/arm/boot/ + + + Step 3: Assembling the boot.img + (In the Linux Kernel directory) + $ mkbootimg --cmdline "androidboot.hardware=qcom user_debug=31 msm_rtb.filter=0xb7 ehci-hcd.park=3 dwc3.maximum_speed=high dwc3_msm.prop_chg_detect=Y" \ + --base 0x00000000 --kernel arch/arm/boot/zImage --ramdisk ramdisk.img \ + --ramdisk_offset 0x02000000 -o boot.img --dt dt.img --tags_offset 0x01E00000 + diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index 1cbcac57507..fb3ba6fd3d5 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -1,33 +1,14 @@ ifeq ($(CONFIG_OF),y) -dtb-$(CONFIG_ARCH_MSM8974) += msm8974-v1-cdp.dtb \ - msm8974-v1-fluid.dtb \ - msm8974-v1-liquid.dtb \ - msm8974-v1-mtp.dtb \ - msm8974-v1-rumi.dtb \ - msm8974-v1-sim.dtb \ - msm8974-v2.0-1-cdp.dtb \ - msm8974-v2.0-1-fluid.dtb \ - msm8974-v2.0-1-liquid.dtb \ - msm8974-v2.0-1-mtp.dtb \ - apq8074-v2.0-1-cdp.dtb \ - apq8074-v2.0-1-liquid.dtb \ - apq8074-v2.0-1-dragonboard.dtb \ - apq8074-v2.2-cdp.dtb \ - apq8074-v2.2-liquid.dtb \ - apq8074-v2.2-dragonboard.dtb \ - msm8974-v2.2-cdp.dtb \ - msm8974-v2.2-fluid.dtb \ - msm8974-v2.2-liquid.dtb \ - msm8974-v2.2-mtp.dtb \ - msm8974pro-ab-pm8941-cdp.dtb \ - msm8974pro-ab-pm8941-fluid.dtb \ - msm8974pro-ab-pm8941-liquid.dtb \ - msm8974pro-ab-pm8941-mtp.dtb \ - msm8974pro-ac-pm8941-cdp.dtb \ - msm8974pro-ac-pm8941-liquid.dtb \ - msm8974pro-ac-pm8941-mtp.dtb \ - msm8974pro-ac-pma8084-pm8941-mtp.dtb +# MSM8974 +dtb-$(CONFIG_MACH_SONY_SIRIUS) += msm8974pro-ab-shinano_sirius.dtb +dtb-$(CONFIG_MACH_SONY_CASTOR) += msm8974pro-ab-shinano_castor.dtb +dtb-$(CONFIG_MACH_SONY_CASTOR_WINDY) += apq8074pro-ab-shinano_castor_windy.dtb +dtb-$(CONFIG_MACH_SONY_LEO) += msm8974pro-ac-shinano_leo.dtb +dtb-$(CONFIG_MACH_SONY_ARIES) += msm8974pro-ac-shinano_aries.dtb +dtb-$(CONFIG_MACH_SONY_SCORPION) += msm8974pro-ac-shinano_scorpion.dtb +dtb-$(CONFIG_MACH_SONY_SCORPION_WINDY) += apq8074pro-ac-shinano_scorpion_windy.dtb +# Other dtb-$(CONFIG_ARCH_MSM8916) += msm8916-sim.dtb \ msm8916-rumi.dtb dtb-$(CONFIG_ARCH_MSM8226) += msm8226-sim.dtb \ diff --git a/arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dts b/arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dts new file mode 100644 index 00000000000..6eb2b79d782 --- /dev/null +++ b/arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dts @@ -0,0 +1,31 @@ +/* arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dts + * + * Copyright (c) 2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ab-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ab-shinano_common.dtsi" +/include/ "msm8974pro-ab-shinano_castor_common.dtsi" +/include/ "apq8074pro-ab-shinano_castor_windy.dtsi" +/include/ "dsi-panel-castor.dtsi" + +/ { + model = "SoMC Castor WINDY"; + compatible = "somc,castor-windy", "qcom,apq8074"; + qcom,board-id = <8 0>, <9 0>; +}; diff --git a/arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dtsi b/arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dtsi new file mode 100644 index 00000000000..7b43c8a3807 --- /dev/null +++ b/arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dtsi @@ -0,0 +1,64 @@ +/* arch/arm/boot/dts/qcom/apq8074pro-ab-shinano_castor_windy.dtsi + * + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; +}; + +&pm8941_gpios { + /* GPIO_9: NC */ + gpio@c800 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; +}; + +&pm8941_mpps { + /* MPP_3: NC (TXDAC0_VREF) */ + mpp@a200 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; +}; + + +&spmi_bus { + qcom,pm8941@1 { + qcom,leds@d800 { + status = "disabled"; + }; + }; +}; + +&pm8941_iadc { + qcom,rsense = <10000000>; +}; + diff --git a/arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dts b/arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dts new file mode 100644 index 00000000000..0382e290f0b --- /dev/null +++ b/arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dts @@ -0,0 +1,31 @@ +/* arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dts + * + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ac-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ac-shinano_common.dtsi" +/include/ "msm8974pro-ac-shinano_scorpion_common.dtsi" +/include/ "apq8074pro-ac-shinano_scorpion_windy.dtsi" +/include/ "dsi-panel-scorpion.dtsi" + +/ { + model = "SoMC Scorpion WINDY"; + compatible = "somc,scorpion-windy", "qcom,apq8074"; + qcom,board-id = <8 0>, <9 0>; +}; diff --git a/arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dtsi b/arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dtsi new file mode 100644 index 00000000000..c9a54b5d5e2 --- /dev/null +++ b/arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dtsi @@ -0,0 +1,81 @@ +/* arch/arm/boot/dts/qcom/apq8074pro-ac-shinano_scorpion_windy.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; + + /* I2C : BLSP11 */ + i2c@f9967000 { + /delete-node/ ad7146@2f; + }; + + gpio_keys { + compatible = "gpio-keys"; + sim_det { + status = "disabled"; + }; + }; +}; + +&pm8941_gpios { + /* GPIO_9: NC */ + gpio@c800 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; +}; + +&pm8941_mpps { + /* MPP_3: NC */ + mpp@a200 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; +}; + +&pm8941_l14 { + status = "disabled"; +}; + +&pm8941_l15 { + status = "disabled"; +}; + +&pm8941_l19 { + status = "disabled"; +}; + +&pm8941_bms { + qcom,battery-vendor-name = "TDK", "SEND", "SANYO-PANASONIC", "LG", "5TH"; + qcom,battery-vendor-adc-min = <1450 1330 1230 1110 960>; + qcom,battery-vendor-adc-max = <1550 1430 1330 1210 1060>; + qcom,battery-vendor-select = <0 1 0 0 0>; +}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-aries.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-aries.dtsi new file mode 100644 index 00000000000..22731061677 --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-aries.dtsi @@ -0,0 +1,911 @@ +/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. + * Copyright (c) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + dsi_novatek_jdi_720_cmd: somc,novatek_jdi_720p_cmd_panel { + qcom,mdss-dsi-panel-name = "jdi novatek 720p cmd"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <720>; + qcom,mdss-dsi-panel-height = <1280>; + qcom,mdss-dsi-h-front-porch = <36>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <251>; + qcom,mdss-dsi-v-pulse-width = <5>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-early-init-command = [15 01 00 00 00 00 02 FF EE + 15 01 00 00 01 00 02 26 08 + 15 01 00 00 00 00 02 26 00 + 15 01 00 00 0A 00 02 FF 00]; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BA 03 + 15 01 00 00 00 00 02 C2 08 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 A2 00 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF EE + 15 01 00 00 00 00 02 12 50 + 15 01 00 00 00 00 02 13 02 + 15 01 00 00 00 00 02 6A 60 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 00 + 05 01 00 00 64 00 01 11 + 15 01 00 00 00 00 02 35 00]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 00 00 01 28 + 05 01 00 00 64 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [7A 1A 12 00 3E 42 16 20 14 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x11>; + qcom,mdss-dsi-t-clk-pre = <0x1A>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <1>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <56 100>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <1087000 1231000>; + somc,disp-en-on-post = <20>; + somc,pw-on-rst-seq = <0 1>, <1 20>; + somc,disp-en-off-post = <0>; + somc,pw-off-rst-b-seq = <0 10>; + somc,pw-down-period = <200>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3B 0x38 0x3B 0x5700 0x7000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x5900 0x6f00 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x5c00 0x6e00 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x5d80 0x6c80 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x6080 0x6c80 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x6380 0x6c80 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x6700 0x6c00 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x6980 0x6b00 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x6d00 0x6a80 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x7180 0x6900 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x7800 0x6800 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x7d00 0x6700 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x6500 0x7d00 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x6000 0x7700 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x5900 0x7000 + 0x00 0x10 0x38 0x3B 0x34 0x37 0x5900 0x7280 0x8000 + 0x00 0x11 0x34 0x37 0x34 0x37 0x5b00 0x7100 0x8000 + 0x00 0x12 0x30 0x33 0x34 0x37 0x5e00 0x7180 0x8000 + 0x00 0x13 0x2C 0x2F 0x34 0x37 0x6080 0x7180 0x8000 + 0x00 0x14 0x28 0x2B 0x34 0x37 0x6400 0x7000 0x8000 + 0x00 0x15 0x24 0x27 0x34 0x37 0x6700 0x7000 0x8000 + 0x00 0x16 0x20 0x23 0x34 0x37 0x6900 0x6f00 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0x34 0x37 0x00 0x03 0x6400 0x8000 0x6a00 + 0x00 0xD4 0x30 0x33 0x00 0x03 0x6800 0x8000 0x6b00 + 0x00 0xD5 0x2C 0x2F 0x00 0x03 0x6c00 0x8000 0x6b80 + 0x00 0xD6 0x28 0x2B 0x00 0x03 0x6f00 0x8000 0x6c00 + 0x00 0xD7 0x24 0x27 0x00 0x03 0x7300 0x8000 0x6d00 + 0x00 0xD8 0x20 0x23 0x00 0x03 0x7900 0x8000 0x6d00 + 0x00 0xD9 0x1C 0x1F 0x00 0x03 0x7f00 0x8000 0x6e00 + 0x00 0xDA 0x18 0x1B 0x00 0x03 0x8000 0x7b00 0x6a80 + 0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x7400 0x6580 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x6d00 0x6180 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x6900 0x5e00 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x6200 0x5800 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x5a00 0x5200 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x5400 0x4d00 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + + somc,chenge-fps-command = [15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 FF 00]; + somc,chenge-fps-default = <0x8E>; + somc,display-clock = <11000000>; + somc,driver-ic-vbp = <2>; + somc,driver-ic-vfp = <6>; + somc,chenge-fps-cmds-num = <1>; + somc,chenge-fps-payload-num = <1>; + }; + + dsi_novatek_sharp_720_cmd: somc,novatek_sharp_720p_cmd_panel { + qcom,mdss-dsi-panel-name = "sharp novatek 720p cmd"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <720>; + qcom,mdss-dsi-panel-height = <1280>; + qcom,mdss-dsi-h-front-porch = <36>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <251>; + qcom,mdss-dsi-v-pulse-width = <5>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BA 03 + 15 01 00 00 00 00 02 C2 08 + 39 01 00 00 00 00 06 3B 03 01 03 0C 06 + 15 01 00 00 00 00 02 FF 01 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 06 22 + 15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 03 8E + 15 01 00 00 00 00 02 04 8E + 15 01 00 00 00 00 02 09 00 + 15 01 00 00 00 00 02 0A 13 + 15 01 00 00 00 00 02 0B 76 + 15 01 00 00 00 00 02 0D 09 + 15 01 00 00 00 00 02 0E 1E + 15 01 00 00 00 00 02 0F 06 + 15 01 00 00 00 00 02 10 31 + 15 01 00 00 00 00 02 14 00 + 15 01 00 00 00 00 02 A2 00 + 15 01 00 00 00 00 02 FF 00 + 05 01 00 00 96 00 01 11 + 15 01 00 00 00 00 02 35 00]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 00 00 01 28 + 05 01 00 00 C8 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [7A 1A 12 00 3E 42 16 20 14 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x11>; + qcom,mdss-dsi-t-clk-pre = <0x1A>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <1>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <56 100>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <353000 414000>; + somc,disp-en-on-pre = <1>; + somc,disp-en-on-post = <20>; + somc,pw-on-rst-seq = <1 20>, <0 1>, <1 20>; + somc,disp-en-off-post = <5>; + somc,pw-off-rst-b-seq = <0 20>; + somc,pw-down-period = <200>; + + somc,mdss-dsi-u-rev = <0 0x4>; + somc,mdss-dsi-v-rev = <1 0x2>; + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3F 0x38 0x3B 0x5700 0x7000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x5900 0x6f00 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x5c00 0x6e00 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x5d80 0x6c80 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x6080 0x6c80 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x6380 0x6c80 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x6700 0x6c00 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x6980 0x6b00 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x6d00 0x6a80 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x7180 0x6900 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x7800 0x6800 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x7d00 0x6700 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x6500 0x7d00 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x6000 0x7700 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x5900 0x7000 + 0x00 0x10 0x38 0x3F 0x34 0x37 0x5900 0x7280 0x8000 + 0x00 0x11 0x34 0x37 0x34 0x37 0x5b00 0x7100 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0x6d00 0x8000 0x7300 + 0x00 0xA9 0x28 0x2B 0x0C 0x0F 0x7100 0x8000 0x7400 + 0x00 0xAA 0x24 0x27 0x0C 0x0F 0x7500 0x8000 0x7480 + 0x00 0xAB 0x20 0x23 0x0C 0x0F 0x7900 0x8000 0x7500 + 0x00 0xAC 0x1C 0x1F 0x0C 0x0F 0x7f00 0x8000 0x7600 + 0x00 0xAD 0x18 0x1B 0x0C 0x0F 0x8000 0x7b00 0x7200 + 0x00 0xAE 0x14 0x17 0x0C 0x0F 0x8000 0x7300 0x6d00 + 0x00 0xAF 0x10 0x13 0x0C 0x0F 0x8000 0x6d00 0x6800 + 0x00 0xB0 0x0C 0x0F 0x0C 0x0F 0x8000 0x6800 0x6400 + 0x00 0xB1 0x08 0x0B 0x0C 0x0F 0x8000 0x6100 0x5d00 + 0x00 0xB2 0x04 0x07 0x0C 0x0F 0x8000 0x5b00 0x5900 + 0x00 0xB3 0x00 0x03 0x0C 0x0F 0x8000 0x5600 0x5480 + 0x00 0xB4 0x38 0x3F 0x08 0x0B 0x6200 0x8000 0x6e00 + 0x00 0xB5 0x34 0x37 0x08 0x0B 0x6600 0x8000 0x6e00 + 0x00 0xB6 0x30 0x33 0x08 0x0B 0x6900 0x8000 0x6f00 + 0x00 0xB7 0x2C 0x2F 0x08 0x0B 0x6d00 0x8000 0x7000 + 0x00 0xB8 0x28 0x2B 0x08 0x0B 0x7100 0x8000 0x7200 + 0x00 0xB9 0x24 0x27 0x08 0x0B 0x7500 0x8000 0x7200 + 0x00 0xBA 0x20 0x23 0x08 0x0B 0x7a00 0x8000 0x7200 + 0x00 0xBB 0x1C 0x1F 0x08 0x0B 0x7f00 0x8000 0x7300 + 0x00 0xBC 0x18 0x1B 0x08 0x0B 0x8000 0x7b00 0x7000 + 0x00 0xBD 0x14 0x17 0x08 0x0B 0x8000 0x7200 0x6a00 + 0x00 0xBE 0x10 0x13 0x08 0x0B 0x8000 0x6c00 0x6500 + 0x00 0xBF 0x0C 0x0F 0x08 0x0B 0x8000 0x6600 0x6000 + 0x00 0xC0 0x08 0x0B 0x08 0x0B 0x8000 0x6000 0x5b00 + 0x00 0xC1 0x04 0x07 0x08 0x0B 0x8000 0x5b00 0x5700 + 0x00 0xC2 0x00 0x03 0x08 0x0B 0x8000 0x5500 0x5100 + 0x00 0xC3 0x38 0x3F 0x04 0x07 0x6200 0x8000 0x6b00 + 0x00 0xC4 0x34 0x37 0x04 0x07 0x6500 0x8000 0x6c00 + 0x00 0xC5 0x30 0x33 0x04 0x07 0x6800 0x8000 0x6d80 + 0x00 0xC6 0x2C 0x2F 0x04 0x07 0x6c00 0x8000 0x6e00 + 0x00 0xC7 0x28 0x2B 0x04 0x07 0x7000 0x8000 0x6e00 + 0x00 0xC8 0x24 0x27 0x04 0x07 0x7400 0x8000 0x6f00 + 0x00 0xC9 0x20 0x23 0x04 0x07 0x7800 0x8000 0x7000 + 0x00 0xCA 0x1C 0x1F 0x04 0x07 0x7e00 0x8000 0x7000 + 0x00 0xCB 0x18 0x1B 0x04 0x07 0x8000 0x7a80 0x6b80 + 0x00 0xCC 0x14 0x17 0x04 0x07 0x8000 0x7400 0x6780 + 0x00 0xCD 0x10 0x13 0x04 0x07 0x8000 0x6e00 0x6380 + 0x00 0xCE 0x0C 0x0F 0x04 0x07 0x8000 0x6700 0x5e00 + 0x00 0xCF 0x08 0x0B 0x04 0x07 0x8000 0x6180 0x5980 + 0x00 0xD0 0x04 0x07 0x04 0x07 0x8000 0x5b00 0x5500 + 0x00 0xD1 0x00 0x03 0x04 0x07 0x8000 0x5500 0x5100 + 0x00 0xD2 0x38 0x3F 0x00 0x03 0x6100 0x8000 0x6900 + 0x00 0xD3 0x34 0x37 0x00 0x03 0x6400 0x8000 0x6a00 + 0x00 0xD4 0x30 0x33 0x00 0x03 0x6800 0x8000 0x6b00 + 0x00 0xD5 0x2C 0x2F 0x00 0x03 0x6c00 0x8000 0x6b80 + 0x00 0xD6 0x28 0x2B 0x00 0x03 0x6f00 0x8000 0x6c00 + 0x00 0xD7 0x24 0x27 0x00 0x03 0x7300 0x8000 0x6d00 + 0x00 0xD8 0x20 0x23 0x00 0x03 0x7900 0x8000 0x6d00 + 0x00 0xD9 0x1C 0x1F 0x00 0x03 0x7f00 0x8000 0x6e00 + 0x00 0xDA 0x18 0x1B 0x00 0x03 0x8000 0x7b00 0x6a80 + 0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x7400 0x6580 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x6d00 0x6180 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x6900 0x5e00 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x6200 0x5800 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x5a00 0x5200 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x5400 0x4d00 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + + somc,chenge-fps-command = [15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 FF 00]; + somc,chenge-fps-default = <0x8E>; + somc,display-clock = <11000000>; + somc,driver-ic-vbp = <2>; + somc,driver-ic-vfp = <6>; + somc,chenge-fps-cmds-num = <1>; + somc,chenge-fps-payload-num = <1>; + }; + + dsi_default_gpio_0: somc,novatek_default_panel_0 { + qcom,mdss-dsi-panel-name = "default novatek 720p cmd 0"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <720>; + qcom,mdss-dsi-panel-height = <1280>; + qcom,mdss-dsi-h-front-porch = <36>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <251>; + qcom,mdss-dsi-v-pulse-width = <5>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-early-init-command = [15 01 00 00 00 00 02 FF EE + 15 01 00 00 01 00 02 26 08 + 15 01 00 00 00 00 02 26 00 + 15 01 00 00 0A 00 02 FF 00]; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BA 03 + 15 01 00 00 00 00 02 C2 08 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 A2 00 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF EE + 15 01 00 00 00 00 02 12 50 + 15 01 00 00 00 00 02 13 02 + 15 01 00 00 00 00 02 6A 60 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 00 + 05 01 00 00 64 00 01 11 + 15 01 00 00 00 00 02 35 00]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 00 00 01 28 + 05 01 00 00 64 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [7A 1A 12 00 3E 42 16 20 14 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x11>; + qcom,mdss-dsi-t-clk-pre = <0x1A>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <56 100>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <0>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-post = <20>; + somc,pw-on-rst-seq = <0 1>, <1 20>; + somc,disp-en-off-post = <0>; + somc,pw-off-rst-b-seq = <0 10>; + somc,pw-down-period = <200>; + somc,chenge-fps-command = [15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 FF 00]; + somc,chenge-fps-default = <0x8E>; + somc,display-clock = <11000000>; + somc,driver-ic-vbp = <2>; + somc,driver-ic-vfp = <6>; + somc,chenge-fps-cmds-num = <1>; + somc,chenge-fps-payload-num = <1>; + }; + + dsi_default_gpio_1: somc,novatek_default_panel_1 { + qcom,mdss-dsi-panel-name = "default novatek 720p cmd 1"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <720>; + qcom,mdss-dsi-panel-height = <1280>; + qcom,mdss-dsi-h-front-porch = <36>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <251>; + qcom,mdss-dsi-v-pulse-width = <5>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-early-init-command = [15 01 00 00 00 00 02 FF EE + 15 01 00 00 01 00 02 26 08 + 15 01 00 00 00 00 02 26 00 + 15 01 00 00 0A 00 02 FF 00]; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BA 03 + 15 01 00 00 00 00 02 C2 08 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 A2 00 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF EE + 15 01 00 00 00 00 02 12 50 + 15 01 00 00 00 00 02 13 02 + 15 01 00 00 00 00 02 6A 60 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 00 + 05 01 00 00 64 00 01 11 + 15 01 00 00 00 00 02 35 00]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 00 00 01 28 + 05 01 00 00 64 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [7A 1A 12 00 3E 42 16 20 14 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x11>; + qcom,mdss-dsi-t-clk-pre = <0x1A>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <1>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <56 100>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-post = <20>; + somc,pw-on-rst-seq = <0 1>, <1 20>; + somc,disp-en-off-post = <0>; + somc,pw-off-rst-b-seq = <0 10>; + somc,pw-down-period = <200>; + somc,chenge-fps-command = [15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 02 8E + 15 01 00 00 00 00 02 FF 00]; + somc,chenge-fps-default = <0x8E>; + somc,display-clock = <11000000>; + somc,driver-ic-vbp = <2>; + somc,driver-ic-vfp = <6>; + somc,chenge-fps-cmds-num = <1>; + somc,chenge-fps-payload-num = <1>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-castor.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-castor.dtsi new file mode 100644 index 00000000000..0283c4ffcab --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-castor.dtsi @@ -0,0 +1,331 @@ +/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. + * Copyright (C) 2012 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + qcom,mdss-ib-factor = <11 5>; + dsi_orise_auo_wuxga_vid: somc,orise_auo_wuxga_panel { + qcom,mdss-dsi-panel-name = "auo orise wuxga video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1920>; + qcom,mdss-dsi-panel-height = <1200>; + qcom,mdss-dsi-h-front-porch = <40>; + qcom,mdss-dsi-h-back-porch = <40>; + qcom,mdss-dsi-h-pulse-width = <40>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <15>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <255>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <3>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <217 135>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 57000>; + somc,disp-en-on-post = <200>; + somc,disp-en-off-pre = <50>; + somc,pw-down-period = <500>; + }; + + dsi_novatek_panasonic_wuxga_vid: somc,novatek_panasonic_wuxga_panel { + qcom,mdss-dsi-panel-name = "panasonic novatek wuxga video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1920>; + qcom,mdss-dsi-panel-height = <1200>; + qcom,mdss-dsi-h-front-porch = <152>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <52>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <48>; + qcom,mdss-dsi-v-front-porch = <24>; + qcom,mdss-dsi-v-pulse-width = <6>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [FB 3E 2A 00 70 74 2E 42 33 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2E>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <255>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <3>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <217 135>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,lcd-id = <1>; + somc,lcd-id-adc = <801000 917000>; + somc,disp-en-on-post = <251>; + somc,disp-en-off-pre = <86>; + somc,pw-down-period = <500>; + + somc,mdss-dsi-uv-param-type = <0>; + somc,mdss-dsi-pcc-table-size = <1>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x1C 0x1F 0x1C 0x1F 0x8000 0x8000 0x7D80>; + }; + + dsi_pollux_wuxga_vid: somc,pollux_wuxga_panel { + qcom,mdss-dsi-panel-name = "pollux-vsb panasonic wuxga video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1920>; + qcom,mdss-dsi-panel-height = <1200>; + qcom,mdss-dsi-h-front-porch = <96>; + qcom,mdss-dsi-h-back-porch = <48>; + qcom,mdss-dsi-h-pulse-width = <16>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <10>; + qcom,mdss-dsi-v-front-porch = <23>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [DE 48 3C 00 64 59 3B 4A 5E 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x1E>; + qcom,mdss-dsi-t-clk-pre = <0x38>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <255>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <3>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <217 136>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,lcd-id = <1>; + somc,lcd-id-adc = <1705000 1899000>; + somc,disp-en-on-post = <251>; + somc,disp-en-off-pre = <86>; + somc,pw-down-period = <500>; + }; + + dsi_default_gpio_0: somc,default_panel_0 { + qcom,mdss-dsi-panel-name = "default novatek wuxga video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1920>; + qcom,mdss-dsi-panel-height = <1200>; + qcom,mdss-dsi-h-front-porch = <152>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <52>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <48>; + qcom,mdss-dsi-v-front-porch = <24>; + qcom,mdss-dsi-v-pulse-width = <6>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [FB 3E 2A 00 70 74 2E 42 33 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2E>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <255>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <3>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <217 135>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,lcd-id = <0>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-post = <251>; + somc,disp-en-off-pre = <86>; + somc,pw-down-period = <500>; + }; + + dsi_default_gpio_1: somc,default_panel_1 { + qcom,mdss-dsi-panel-name = "default novatek wuxga video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1920>; + qcom,mdss-dsi-panel-height = <1200>; + qcom,mdss-dsi-h-front-porch = <152>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <52>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <48>; + qcom,mdss-dsi-v-front-porch = <24>; + qcom,mdss-dsi-v-pulse-width = <6>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-on-command = [32 01 00 00 00 00 02 00 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [FB 3E 2A 00 70 74 2E 42 33 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2E>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <255>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <3>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <217 135>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-post = <251>; + somc,disp-en-off-pre = <86>; + somc,pw-down-period = <500>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-leo.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-leo.dtsi new file mode 100644 index 00000000000..9e2bfebd722 --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-leo.dtsi @@ -0,0 +1,1856 @@ +/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. + * Copyright (c) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + qcom,mdss-ib-factor = <19 10>; + dsi_novatek_sharp_1080_vid: somc,novatek_sharp_1080p_video_panel { + qcom,mdss-dsi-panel-name = "sharp novatek 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <136>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <60>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <3>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BB 03 + 39 01 00 00 00 00 06 3B 03 05 04 50 88 + 15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 C4 9A + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-on-command = [05 01 00 00 96 00 01 11 + 05 01 00 00 28 00 01 29]; + qcom,mdss-dsi-off-command = [15 01 00 00 00 00 02 FF 10 + 05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <215000 256000>; + somc,disp-en-on-pre = <200>; + somc,disp-en-on-post = <10>; + somc,pw-on-rst-seq = <1 1>, <0 1>, <1 20>; + somc,disp-en-off-post = <200>; + somc,pw-off-rst-seq = <0 5>; + somc,pw-down-period = <100>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3B 0x38 0x3B 0x5700 0x7000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x5900 0x6f00 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x5c00 0x6e00 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x5d80 0x6c80 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x6080 0x6c80 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x6380 0x6c80 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x6700 0x6c00 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x6980 0x6b00 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x6d00 0x6a80 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x7180 0x6900 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x7800 0x6800 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x7d00 0x6700 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x6500 0x7d00 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x6000 0x7700 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x5900 0x7000 + 0x00 0x10 0x38 0x3B 0x34 0x37 0x5900 0x7280 0x8000 + 0x00 0x11 0x34 0x37 0x34 0x37 0x5b00 0x7100 0x8000 + 0x00 0x12 0x30 0x33 0x34 0x37 0x5e00 0x7180 0x8000 + 0x00 0x13 0x2C 0x2F 0x34 0x37 0x6080 0x7180 0x8000 + 0x00 0x14 0x28 0x2B 0x34 0x37 0x6400 0x7000 0x8000 + 0x00 0x15 0x24 0x27 0x34 0x37 0x6700 0x7000 0x8000 + 0x00 0x16 0x20 0x23 0x34 0x37 0x6900 0x6f00 0x8000 + 0x00 0x17 0x1C 0x1F 0x34 0x37 0x6c00 0x6e80 0x8000 + 0x00 0x18 0x18 0x1B 0x34 0x37 0x7000 0x6d80 0x8000 + 0x00 0x19 0x14 0x17 0x34 0x37 0x7580 0x6b80 0x8000 + 0x00 0x1A 0x10 0x13 0x34 0x37 0x7b00 0x6a80 0x8000 + 0x00 0x1B 0x0C 0x0F 0x34 0x37 0x8000 0x6a80 0x8000 + 0x00 0x1C 0x08 0x0B 0x34 0x37 0x8000 0x6600 0x7c00 + 0x00 0x1D 0x04 0x07 0x34 0x37 0x8000 0x6100 0x7400 + 0x00 0x1E 0x00 0x03 0x34 0x37 0x8000 0x5b00 0x6e00 + 0x00 0x1F 0x38 0x3B 0x30 0x33 0x5c80 0x7600 0x8000 + 0x00 0x20 0x34 0x37 0x30 0x33 0x5e00 0x7500 0x8000 + 0x00 0x21 0x30 0x33 0x30 0x33 0x6100 0x7480 0x8000 + 0x00 0x22 0x2C 0x2F 0x30 0x33 0x6400 0x7400 0x8000 + 0x00 0x23 0x28 0x2B 0x30 0x33 0x6500 0x7300 0x8000 + 0x00 0x24 0x24 0x27 0x30 0x33 0x6880 0x7400 0x8000 + 0x00 0x25 0x20 0x23 0x30 0x33 0x6b00 0x7200 0x8000 + 0x00 0x26 0x1C 0x1F 0x30 0x33 0x6e00 0x6f00 0x8000 + 0x00 0x27 0x18 0x1B 0x30 0x33 0x7300 0x7080 0x8000 + 0x00 0x28 0x14 0x17 0x30 0x33 0x7700 0x6d80 0x8000 + 0x00 0x29 0x10 0x13 0x30 0x33 0x7c00 0x6d80 0x8000 + 0x00 0x2A 0x0C 0x0F 0x30 0x33 0x8000 0x6c00 0x7e00 + 0x00 0x2B 0x08 0x0B 0x30 0x33 0x8000 0x6700 0x7a00 + 0x00 0x2C 0x04 0x07 0x30 0x33 0x8000 0x6100 0x7200 + 0x00 0x2D 0x00 0x03 0x30 0x33 0x8000 0x5b00 0x6c00 + 0x00 0x2E 0x38 0x3B 0x2C 0x2F 0x5c00 0x7880 0x8000 + 0x00 0x2F 0x34 0x37 0x2C 0x2F 0x5f00 0x7700 0x8000 + 0x00 0x30 0x30 0x33 0x2C 0x2F 0x6100 0x7700 0x8000 + 0x00 0x31 0x2C 0x2F 0x2C 0x2F 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0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x7400 0x6580 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x6d00 0x6180 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x6900 0x5e00 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x6200 0x5800 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x5a00 0x5200 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x5400 0x4d00 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + }; + + dsi_novatek_sharp_1080_cmd: somc,novatek_sharp_1080p_cmd_panel { + qcom,mdss-dsi-panel-name = "sharp novatek 1080p cmd"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <56>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <237>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BB 10 + 15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 C4 9A + 15 01 00 00 00 00 02 85 05 + 15 01 00 00 00 00 02 93 02 + 15 01 00 00 00 00 02 94 08 + 15 01 00 00 00 00 02 92 95 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 FF 20 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 58 82 + 15 01 00 00 00 00 02 59 02 + 15 01 00 00 00 00 02 5A 02 + 15 01 00 00 00 00 02 5B 02 + 15 01 00 00 00 00 02 5C 83 + 15 01 00 00 00 00 02 5D 83 + 15 01 00 00 00 00 02 5E 03 + 15 01 00 00 00 00 02 5F 03 + 15 01 00 00 00 00 02 6D 55 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 C4 02 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 03 44 03 00 + 05 01 00 00 1E 00 01 11]; + qcom,mdss-dsi-on-command = [05 01 00 00 28 00 01 29]; + qcom,mdss-dsi-off-command = [15 01 00 00 00 00 02 FF 10 + 05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x21>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <0>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 57000>; + somc,disp-en-on-pre = <10>; + somc,disp-en-on-post = <20>; + somc,pw-on-rst-seq = <1 1>, <0 1>, <1 20>; + somc,disp-en-off-post = <200>; + somc,pw-off-rst-seq = <0 5>; + somc,pw-down-period = <100>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3B 0x38 0x3B 0x5700 0x7000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x5900 0x6f00 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x5c00 0x6e00 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x5d80 0x6c80 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x6080 0x6c80 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x6380 0x6c80 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x6700 0x6c00 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x6980 0x6b00 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x6d00 0x6a80 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x7180 0x6900 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x7800 0x6800 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x7d00 0x6700 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x6500 0x7d00 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x6000 0x7700 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x5900 0x7000 + 0x00 0x10 0x38 0x3B 0x34 0x37 0x5900 0x7280 0x8000 + 0x00 0x11 0x34 0x37 0x34 0x37 0x5b00 0x7100 0x8000 + 0x00 0x12 0x30 0x33 0x34 0x37 0x5e00 0x7180 0x8000 + 0x00 0x13 0x2C 0x2F 0x34 0x37 0x6080 0x7180 0x8000 + 0x00 0x14 0x28 0x2B 0x34 0x37 0x6400 0x7000 0x8000 + 0x00 0x15 0x24 0x27 0x34 0x37 0x6700 0x7000 0x8000 + 0x00 0x16 0x20 0x23 0x34 0x37 0x6900 0x6f00 0x8000 + 0x00 0x17 0x1C 0x1F 0x34 0x37 0x6c00 0x6e80 0x8000 + 0x00 0x18 0x18 0x1B 0x34 0x37 0x7000 0x6d80 0x8000 + 0x00 0x19 0x14 0x17 0x34 0x37 0x7580 0x6b80 0x8000 + 0x00 0x1A 0x10 0x13 0x34 0x37 0x7b00 0x6a80 0x8000 + 0x00 0x1B 0x0C 0x0F 0x34 0x37 0x8000 0x6a80 0x8000 + 0x00 0x1C 0x08 0x0B 0x34 0x37 0x8000 0x6600 0x7c00 + 0x00 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0x8000 0x6e00 + 0x00 0xC7 0x28 0x2B 0x04 0x07 0x7000 0x8000 0x6e00 + 0x00 0xC8 0x24 0x27 0x04 0x07 0x7400 0x8000 0x6f00 + 0x00 0xC9 0x20 0x23 0x04 0x07 0x7800 0x8000 0x7000 + 0x00 0xCA 0x1C 0x1F 0x04 0x07 0x7e00 0x8000 0x7000 + 0x00 0xCB 0x18 0x1B 0x04 0x07 0x8000 0x7a80 0x6b80 + 0x00 0xCC 0x14 0x17 0x04 0x07 0x8000 0x7400 0x6780 + 0x00 0xCD 0x10 0x13 0x04 0x07 0x8000 0x6e00 0x6380 + 0x00 0xCE 0x0C 0x0F 0x04 0x07 0x8000 0x6700 0x5e00 + 0x00 0xCF 0x08 0x0B 0x04 0x07 0x8000 0x6180 0x5980 + 0x00 0xD0 0x04 0x07 0x04 0x07 0x8000 0x5b00 0x5500 + 0x00 0xD1 0x00 0x03 0x04 0x07 0x8000 0x5500 0x5100 + 0x00 0xD2 0x38 0x3B 0x00 0x03 0x6100 0x8000 0x6900 + 0x00 0xD3 0x34 0x37 0x00 0x03 0x6400 0x8000 0x6a00 + 0x00 0xD4 0x30 0x33 0x00 0x03 0x6800 0x8000 0x6b00 + 0x00 0xD5 0x2C 0x2F 0x00 0x03 0x6c00 0x8000 0x6b80 + 0x00 0xD6 0x28 0x2B 0x00 0x03 0x6f00 0x8000 0x6c00 + 0x00 0xD7 0x24 0x27 0x00 0x03 0x7300 0x8000 0x6d00 + 0x00 0xD8 0x20 0x23 0x00 0x03 0x7900 0x8000 0x6d00 + 0x00 0xD9 0x1C 0x1F 0x00 0x03 0x7f00 0x8000 0x6e00 + 0x00 0xDA 0x18 0x1B 0x00 0x03 0x8000 0x7b00 0x6a80 + 0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x7400 0x6580 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x6d00 0x6180 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x6900 0x5e00 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x6200 0x5800 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x5a00 0x5200 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x5400 0x4d00 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + + somc,chenge-fps-command = [15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 92 95 + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 44 03 00]; + somc,chenge-fps-default = <0x95>; + somc,display-clock = <17330000>; + somc,driver-ic-vbp = <8>; + somc,driver-ic-vfp = <2>; + somc,chenge-fps-cmds-num = <1>; + somc,chenge-fps-payload-num = <1>; + + somc,chenge-wait-update = <1>; + somc,chenge-wait-on = <40 60>; + somc,chenge-wait-off = <80 90>; + somc,chenge-wait-cmds-num = <0 2>; + somc,fps-threshold = <47400>; + somc,te-c-update = <1>; + somc,te-c-mode-60fps = <0x03 0x00>; + somc,te-c-mode-45fps = <0x04 0xFF>; + somc,te-c-cmds-num = <3>; + somc,te-c-payload-num = <1>; + }; + + dsi_novatek_jdi_1080_vid: somc,novatek_jdi_1080p_video_panel { + qcom,mdss-dsi-panel-name = "jdi novatek 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <112>; + qcom,mdss-dsi-h-back-porch = <76>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <8>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [23 01 00 00 00 00 02 FF 10 + 05 01 00 00 14 00 01 01 + 15 01 00 00 00 00 02 BB 03 + 15 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 05 2A 00 00 04 37 + 39 01 00 00 00 00 05 2B 00 00 07 7F + 39 01 00 00 00 00 04 3B 03 08 08]; + qcom,mdss-dsi-on-command = [05 01 00 00 64 00 01 11 + 05 01 00 00 28 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3A 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <801000 917000>; + somc,disp-en-on-post = <10>; + somc,pw-on-rst-seq = <1 15>; + somc,disp-en-off-post = <200>; + somc,pw-off-rst-seq = <0 0>; + somc,pw-down-period = <100>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3B 0x38 0x3B 0x5700 0x7000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x5900 0x6f00 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x5c00 0x6e00 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x5d80 0x6c80 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x6080 0x6c80 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x6380 0x6c80 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x6700 0x6c00 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x6980 0x6b00 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x6d00 0x6a80 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x7180 0x6900 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x7800 0x6800 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x7d00 0x6700 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x6500 0x7d00 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x6000 0x7700 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x5900 0x7000 + 0x00 0x10 0x38 0x3B 0x34 0x37 0x5900 0x7280 0x8000 + 0x00 0x11 0x34 0x37 0x34 0x37 0x5b00 0x7100 0x8000 + 0x00 0x12 0x30 0x33 0x34 0x37 0x5e00 0x7180 0x8000 + 0x00 0x13 0x2C 0x2F 0x34 0x37 0x6080 0x7180 0x8000 + 0x00 0x14 0x28 0x2B 0x34 0x37 0x6400 0x7000 0x8000 + 0x00 0x15 0x24 0x27 0x34 0x37 0x6700 0x7000 0x8000 + 0x00 0x16 0x20 0x23 0x34 0x37 0x6900 0x6f00 0x8000 + 0x00 0x17 0x1C 0x1F 0x34 0x37 0x6c00 0x6e80 0x8000 + 0x00 0x18 0x18 0x1B 0x34 0x37 0x7000 0x6d80 0x8000 + 0x00 0x19 0x14 0x17 0x34 0x37 0x7580 0x6b80 0x8000 + 0x00 0x1A 0x10 0x13 0x34 0x37 0x7b00 0x6a80 0x8000 + 0x00 0x1B 0x0C 0x0F 0x34 0x37 0x8000 0x6a80 0x8000 + 0x00 0x1C 0x08 0x0B 0x34 0x37 0x8000 0x6600 0x7c00 + 0x00 0x1D 0x04 0x07 0x34 0x37 0x8000 0x6100 0x7400 + 0x00 0x1E 0x00 0x03 0x34 0x37 0x8000 0x5b00 0x6e00 + 0x00 0x1F 0x38 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0x7400 0x6580 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x6d00 0x6180 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x6900 0x5e00 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x6200 0x5800 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x5a00 0x5200 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x5400 0x4d00 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + }; + + dsi_novatek_jdi_1080_cmd: somc,novatek_jdi_1080p_cmd_panel { + qcom,mdss-dsi-panel-name = "jdi novatek 1080p cmd"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <56>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <237>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [23 01 00 00 00 00 02 FF 10 + 05 01 00 00 14 00 01 01 + 23 01 00 00 00 00 02 FF 10 + 23 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 BB 10 + 15 01 00 00 00 00 02 35 00 + 15 01 00 00 00 00 02 44 03 + 23 01 00 00 00 00 02 FF 24 + 23 01 00 00 00 00 02 92 95 + 23 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 C4 20 + 23 01 00 00 00 00 02 FF 10 + 23 01 00 00 00 00 02 FB 01 + 05 01 00 00 64 00 01 11]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [15 01 00 00 00 00 02 FF 10 + 05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x21>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <0>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <565000 653000>; + somc,disp-en-on-post = <20>; + somc,pw-on-rst-seq = <1 15>; + somc,pw-off-rst-seq = <0 0>; + somc,pw-down-period = <100>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < 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0x04 0x07 0x04 0x07 0x8000 0x5b00 0x5500 + 0x00 0xD1 0x00 0x03 0x04 0x07 0x8000 0x5500 0x5100 + 0x00 0xD2 0x38 0x3B 0x00 0x03 0x6100 0x8000 0x6900 + 0x00 0xD3 0x34 0x37 0x00 0x03 0x6400 0x8000 0x6a00 + 0x00 0xD4 0x30 0x33 0x00 0x03 0x6800 0x8000 0x6b00 + 0x00 0xD5 0x2C 0x2F 0x00 0x03 0x6c00 0x8000 0x6b80 + 0x00 0xD6 0x28 0x2B 0x00 0x03 0x6f00 0x8000 0x6c00 + 0x00 0xD7 0x24 0x27 0x00 0x03 0x7300 0x8000 0x6d00 + 0x00 0xD8 0x20 0x23 0x00 0x03 0x7900 0x8000 0x6d00 + 0x00 0xD9 0x1C 0x1F 0x00 0x03 0x7f00 0x8000 0x6e00 + 0x00 0xDA 0x18 0x1B 0x00 0x03 0x8000 0x7b00 0x6a80 + 0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x7400 0x6580 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x6d00 0x6180 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x6900 0x5e00 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x6200 0x5800 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x5a00 0x5200 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x5400 0x4d00 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + + somc,chenge-fps-command = [15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 92 95 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 44 03]; + somc,chenge-fps-default = <0x95>; + somc,display-clock = <17330000>; + somc,driver-ic-vbp = <8>; + somc,driver-ic-vfp = <8>; + somc,chenge-fps-cmds-num = <1>; + somc,chenge-fps-payload-num = <1>; + + somc,chenge-wait-update = <0>; + somc,chenge-wait-on = <0 0>; + somc,chenge-wait-off = <0 0>; + somc,chenge-wait-cmds-num = <0 0>; + somc,fps-threshold = <47400>; + somc,te-c-update = <1>; + somc,te-c-mode-60fps = <0x03 0x00>; + somc,te-c-mode-45fps = <0x05 0x00>; + somc,te-c-cmds-num = <3>; + somc,te-c-payload-num = <1>; + }; + + dsi_novatek_auo_1080_cmd: somc,novatek_auo_1080p_cmd_panel { + qcom,mdss-dsi-panel-name = "auo novatek 1080p cmd"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <56>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <237>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 C6 00 + 15 01 00 00 00 00 02 C5 32 + 15 01 00 00 00 00 02 92 92 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 35 00 + 39 01 00 00 00 00 03 44 03 00 + 39 01 00 00 00 00 04 3B 03 30 06 + 15 01 00 00 01 00 02 BB 10 + 05 01 00 00 1E 00 01 11]; + qcom,mdss-dsi-on-command = [05 01 00 00 28 00 01 29]; + qcom,mdss-dsi-off-command = [15 01 00 00 00 00 02 FF 10 + 05 01 00 00 00 00 01 28 + 05 01 00 00 64 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x21>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <0>; + somc,mdss-dsi-wait-time-before-on-cmd = <100>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <1236000 1395000>; + somc,disp-en-on-post = <20>; + somc,pw-on-rst-seq = <1 10>; + somc,disp-en-off-post = <70>; + somc,pw-off-rst-seq = <0 0>; + somc,pw-down-period = <100>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3B 0x38 0x3B 0x5700 0x7000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x5900 0x6f00 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x5c00 0x6e00 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x5d80 0x6c80 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x6080 0x6c80 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x6380 0x6c80 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x6700 0x6c00 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x6980 0x6b00 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x6d00 0x6a80 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x7180 0x6900 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x7800 0x6800 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x7d00 0x6700 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x6500 0x7d00 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x6000 0x7700 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x5900 0x7000 + 0x00 0x10 0x38 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0x00 0xA7 0x30 0x33 0x0C 0x0F 0x6a00 0x8000 0x7200 + 0x00 0xA8 0x2C 0x2F 0x0C 0x0F 0x6d00 0x8000 0x7300 + 0x00 0xA9 0x28 0x2B 0x0C 0x0F 0x7100 0x8000 0x7400 + 0x00 0xAA 0x24 0x27 0x0C 0x0F 0x7500 0x8000 0x7480 + 0x00 0xAB 0x20 0x23 0x0C 0x0F 0x7900 0x8000 0x7500 + 0x00 0xAC 0x1C 0x1F 0x0C 0x0F 0x7f00 0x8000 0x7600 + 0x00 0xAD 0x18 0x1B 0x0C 0x0F 0x8000 0x7b00 0x7200 + 0x00 0xAE 0x14 0x17 0x0C 0x0F 0x8000 0x7300 0x6d00 + 0x00 0xAF 0x10 0x13 0x0C 0x0F 0x8000 0x6d00 0x6800 + 0x00 0xB0 0x0C 0x0F 0x0C 0x0F 0x8000 0x6800 0x6400 + 0x00 0xB1 0x08 0x0B 0x0C 0x0F 0x8000 0x6100 0x5d00 + 0x00 0xB2 0x04 0x07 0x0C 0x0F 0x8000 0x5b00 0x5900 + 0x00 0xB3 0x00 0x03 0x0C 0x0F 0x8000 0x5600 0x5480 + 0x00 0xB4 0x38 0x3B 0x08 0x0B 0x6200 0x8000 0x6e00 + 0x00 0xB5 0x34 0x37 0x08 0x0B 0x6600 0x8000 0x6e00 + 0x00 0xB6 0x30 0x33 0x08 0x0B 0x6900 0x8000 0x6f00 + 0x00 0xB7 0x2C 0x2F 0x08 0x0B 0x6d00 0x8000 0x7000 + 0x00 0xB8 0x28 0x2B 0x08 0x0B 0x7100 0x8000 0x7200 + 0x00 0xB9 0x24 0x27 0x08 0x0B 0x7500 0x8000 0x7200 + 0x00 0xBA 0x20 0x23 0x08 0x0B 0x7a00 0x8000 0x7200 + 0x00 0xBB 0x1C 0x1F 0x08 0x0B 0x7f00 0x8000 0x7300 + 0x00 0xBC 0x18 0x1B 0x08 0x0B 0x8000 0x7b00 0x7000 + 0x00 0xBD 0x14 0x17 0x08 0x0B 0x8000 0x7200 0x6a00 + 0x00 0xBE 0x10 0x13 0x08 0x0B 0x8000 0x6c00 0x6500 + 0x00 0xBF 0x0C 0x0F 0x08 0x0B 0x8000 0x6600 0x6000 + 0x00 0xC0 0x08 0x0B 0x08 0x0B 0x8000 0x6000 0x5b00 + 0x00 0xC1 0x04 0x07 0x08 0x0B 0x8000 0x5b00 0x5700 + 0x00 0xC2 0x00 0x03 0x08 0x0B 0x8000 0x5500 0x5100 + 0x00 0xC3 0x38 0x3B 0x04 0x07 0x6200 0x8000 0x6b00 + 0x00 0xC4 0x34 0x37 0x04 0x07 0x6500 0x8000 0x6c00 + 0x00 0xC5 0x30 0x33 0x04 0x07 0x6800 0x8000 0x6d80 + 0x00 0xC6 0x2C 0x2F 0x04 0x07 0x6c00 0x8000 0x6e00 + 0x00 0xC7 0x28 0x2B 0x04 0x07 0x7000 0x8000 0x6e00 + 0x00 0xC8 0x24 0x27 0x04 0x07 0x7400 0x8000 0x6f00 + 0x00 0xC9 0x20 0x23 0x04 0x07 0x7800 0x8000 0x7000 + 0x00 0xCA 0x1C 0x1F 0x04 0x07 0x7e00 0x8000 0x7000 + 0x00 0xCB 0x18 0x1B 0x04 0x07 0x8000 0x7a80 0x6b80 + 0x00 0xCC 0x14 0x17 0x04 0x07 0x8000 0x7400 0x6780 + 0x00 0xCD 0x10 0x13 0x04 0x07 0x8000 0x6e00 0x6380 + 0x00 0xCE 0x0C 0x0F 0x04 0x07 0x8000 0x6700 0x5e00 + 0x00 0xCF 0x08 0x0B 0x04 0x07 0x8000 0x6180 0x5980 + 0x00 0xD0 0x04 0x07 0x04 0x07 0x8000 0x5b00 0x5500 + 0x00 0xD1 0x00 0x03 0x04 0x07 0x8000 0x5500 0x5100 + 0x00 0xD2 0x38 0x3B 0x00 0x03 0x6100 0x8000 0x6900 + 0x00 0xD3 0x34 0x37 0x00 0x03 0x6400 0x8000 0x6a00 + 0x00 0xD4 0x30 0x33 0x00 0x03 0x6800 0x8000 0x6b00 + 0x00 0xD5 0x2C 0x2F 0x00 0x03 0x6c00 0x8000 0x6b80 + 0x00 0xD6 0x28 0x2B 0x00 0x03 0x6f00 0x8000 0x6c00 + 0x00 0xD7 0x24 0x27 0x00 0x03 0x7300 0x8000 0x6d00 + 0x00 0xD8 0x20 0x23 0x00 0x03 0x7900 0x8000 0x6d00 + 0x00 0xD9 0x1C 0x1F 0x00 0x03 0x7f00 0x8000 0x6e00 + 0x00 0xDA 0x18 0x1B 0x00 0x03 0x8000 0x7b00 0x6a80 + 0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x7400 0x6580 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x6d00 0x6180 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x6900 0x5e00 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x6200 0x5800 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x5a00 0x5200 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x5400 0x4d00 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + + somc,chenge-fps-command = [15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 92 92 + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 44 03 00]; + somc,chenge-fps-default = <0x92>; + somc,display-clock = <17330000>; + somc,driver-ic-vbp = <48>; + somc,driver-ic-vfp = <6>; + somc,chenge-fps-cmds-num = <1>; + somc,chenge-fps-payload-num = <1>; + + somc,chenge-wait-update = <0>; + somc,chenge-wait-on = <0 0>; + somc,chenge-wait-off = <0 0>; + somc,chenge-wait-cmds-num = <0 0>; + somc,fps-threshold = <47400>; + somc,te-c-update = <1>; + somc,te-c-mode-60fps = <0x03 0x00>; + somc,te-c-mode-45fps = <0x04 0xFF>; + somc,te-c-cmds-num = <3>; + somc,te-c-payload-num = <1>; + }; + + dsi_default_gpio_0: somc,default_panel_0 { + qcom,mdss-dsi-panel-name = "default video 0"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <136>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <60>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <3>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BB 03 + 39 01 00 00 00 00 06 3B 03 05 04 50 88 + 15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 C4 9A + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-on-command = [05 01 00 00 96 00 01 11 + 05 01 00 00 28 00 01 29]; + qcom,mdss-dsi-off-command = [15 01 00 00 00 00 02 FF 10 + 05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <0>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-pre = <200>; + somc,disp-en-on-post = <10>; + somc,pw-on-rst-seq = <1 1>, <0 1>, <1 20>; + somc,disp-en-off-post = <200>; + somc,pw-off-rst-seq = <0 5>; + somc,pw-down-period = <100>; + }; + + dsi_default_gpio_1: somc,default_panel_1 { + qcom,mdss-dsi-panel-name = "default video 1"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <136>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-pulse-width = <60>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <3>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 BB 03 + 39 01 00 00 00 00 06 3B 03 05 04 50 88 + 15 01 00 00 00 00 02 FF 24 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 C4 9A + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-on-command = [05 01 00 00 96 00 01 11 + 05 01 00 00 28 00 01 29]; + qcom,mdss-dsi-off-command = [15 01 00 00 00 00 02 FF 10 + 05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,touch-reset-gpio = <&msmgpio 85 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-pre = <200>; + somc,disp-en-on-post = <10>; + somc,pw-on-rst-seq = <1 1>, <0 1>, <1 20>; + somc,disp-en-off-post = <200>; + somc,pw-off-rst-seq = <0 5>; + somc,pw-down-period = <100>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-scorpion.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-scorpion.dtsi new file mode 100644 index 00000000000..67154b8ef2c --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-scorpion.dtsi @@ -0,0 +1,668 @@ +/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. + * Copyright (c) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + dsi_default_gpio_0: somc,default_panel_0 { + qcom,mdss-dsi-panel-name = "default cmd 0"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1200>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <12>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <102>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [05 01 00 00 05 00 01 01 + 23 01 00 00 00 00 02 B0 00 + 29 01 00 00 00 00 06 B3 04 08 00 22 00 + 23 01 00 00 00 00 02 B4 0C + 29 01 00 00 00 00 03 B6 3A D3 + 15 01 00 00 00 00 02 3A 77 + 39 01 00 00 00 00 05 2A 00 00 04 AF + 39 01 00 00 00 00 05 2B 00 00 07 7F + 15 01 00 00 00 00 02 44 00 + 15 01 00 00 00 00 02 35 00]; + qcom,mdss-dsi-on-command = [05 01 00 00 64 00 01 11 + 05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x1B>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <255>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <108 172>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <0>; + somc,mdss-dsi-wait-time-before-on-cmd = <100>; + somc,lcd-id = <0>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-pre = <5>; + somc,disp-en-on-post = <10>; + somc,disp-en-off-post = <80>; + somc,pw-on-rst-seq = <1 10>; + somc,pw-off-rst-seq = <0 0>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 00]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x10 0x38 0x3B 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x11 0x34 0x37 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x12 0x30 0x33 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x13 0x2C 0x2F 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x14 0x28 0x2B 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x15 0x24 0x27 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x16 0x20 0x23 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x17 0x1C 0x1F 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x18 0x18 0x1B 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x19 0x14 0x17 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1A 0x10 0x13 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1B 0x0C 0x0F 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1C 0x08 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0x8000 0x8000 + 0x00 0xD9 0x1C 0x1F 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDA 0x18 0x1B 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x8000 0x8000 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + + somc,chenge-fps-command = [23 01 00 00 00 00 02 C6 79]; + somc,chenge-fps-default = <0x79>; + somc,display-clock = <14000000>; + somc,driver-ic-vbp = <4>; + somc,driver-ic-vfp = <8>; + somc,chenge-fps-cmds-num = <0>; + somc,chenge-fps-payload-num = <1>; + }; + + dsi_default_gpio_1: somc,default_panel_1 { + qcom,mdss-dsi-panel-name = "default cmd 1"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1200>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <12>; + qcom,mdss-dsi-h-back-porch = <8>; + qcom,mdss-dsi-h-pulse-width = <8>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <102>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [05 01 00 00 05 00 01 01 + 23 01 00 00 00 00 02 B0 00 + 29 01 00 00 00 00 06 B3 04 08 00 22 00 + 23 01 00 00 00 00 02 B4 0C + 29 01 00 00 00 00 03 B6 3A D3 + 15 01 00 00 00 00 02 3A 77 + 39 01 00 00 00 00 05 2A 00 00 04 AF + 39 01 00 00 00 00 05 2B 00 00 07 7F + 15 01 00 00 00 00 02 44 00 + 15 01 00 00 00 00 02 35 00]; + qcom,mdss-dsi-on-command = [05 01 00 00 64 00 01 11 + 05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6E 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x1B>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <255>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <108 172>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 c2 ef 00 00 00 00 01 ff + 00 02 00 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <0>; + somc,mdss-dsi-wait-time-before-on-cmd = <100>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-pre = <5>; + somc,disp-en-on-post = <10>; + somc,disp-en-off-post = <80>; + somc,pw-on-rst-seq = <1 10>; + somc,pw-off-rst-seq = <0 0>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 00]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <225>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x38 0x3B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x02 0x34 0x37 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x03 0x30 0x33 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x04 0x2C 0x2F 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x05 0x28 0x2B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x06 0x24 0x27 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x07 0x20 0x23 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x08 0x1C 0x1F 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x09 0x18 0x1B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0A 0x14 0x17 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0B 0x10 0x13 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0C 0x0C 0x0F 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0D 0x08 0x0B 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0E 0x04 0x07 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x0F 0x00 0x03 0x38 0x3B 0x8000 0x8000 0x8000 + 0x00 0x10 0x38 0x3B 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x11 0x34 0x37 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x12 0x30 0x33 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x13 0x2C 0x2F 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x14 0x28 0x2B 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x15 0x24 0x27 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x16 0x20 0x23 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x17 0x1C 0x1F 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x18 0x18 0x1B 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x19 0x14 0x17 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1A 0x10 0x13 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1B 0x0C 0x0F 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1C 0x08 0x0B 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1D 0x04 0x07 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1E 0x00 0x03 0x34 0x37 0x8000 0x8000 0x8000 + 0x00 0x1F 0x38 0x3B 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x20 0x34 0x37 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x21 0x30 0x33 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x22 0x2C 0x2F 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x23 0x28 0x2B 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x24 0x24 0x27 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x25 0x20 0x23 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x26 0x1C 0x1F 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x27 0x18 0x1B 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x28 0x14 0x17 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x29 0x10 0x13 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x2A 0x0C 0x0F 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x2B 0x08 0x0B 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x2C 0x04 0x07 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x2D 0x00 0x03 0x30 0x33 0x8000 0x8000 0x8000 + 0x00 0x2E 0x38 0x3B 0x2C 0x2F 0x8000 0x8000 0x8000 + 0x00 0x2F 0x34 0x37 0x2C 0x2F 0x8000 0x8000 0x8000 + 0x00 0x30 0x30 0x33 0x2C 0x2F 0x8000 0x8000 0x8000 + 0x00 0x31 0x2C 0x2F 0x2C 0x2F 0x6300 0x7980 0x8000 + 0x00 0x32 0x28 0x2B 0x2C 0x2F 0x6700 0x7900 0x8000 + 0x00 0x33 0x24 0x27 0x2C 0x2F 0x6B80 0x7880 0x8000 + 0x00 0x34 0x20 0x23 0x2C 0x2F 0x6F80 0x7800 0x8000 + 0x00 0x35 0x1C 0x1F 0x2C 0x2F 0x7480 0x7780 0x8000 + 0x00 0x36 0x18 0x1B 0x2C 0x2F 0x7500 0x7280 0x8000 + 0x00 0x37 0x14 0x17 0x2C 0x2F 0x7A00 0x7200 0x8000 + 0x00 0x38 0x10 0x13 0x2C 0x2F 0x7F80 0x7180 0x8000 + 0x00 0x39 0x0C 0x0F 0x2C 0x2F 0x8000 0x6D00 0x7B80 + 0x00 0x3A 0x08 0x0B 0x2C 0x2F 0x8000 0x8000 0x8000 + 0x00 0x3B 0x04 0x07 0x2C 0x2F 0x8000 0x8000 0x8000 + 0x00 0x3C 0x00 0x03 0x2C 0x2F 0x8000 0x8000 0x8000 + 0x00 0x3D 0x38 0x3B 0x28 0x2B 0x8000 0x8000 0x8000 + 0x00 0x3E 0x34 0x37 0x28 0x2B 0x8000 0x8000 0x8000 + 0x00 0x3F 0x30 0x33 0x28 0x2B 0x8000 0x8000 0x8000 + 0x00 0x40 0x2C 0x2F 0x28 0x2B 0x6700 0x7C80 0x8000 + 0x00 0x41 0x28 0x2B 0x28 0x2B 0x6B00 0x7C00 0x8000 + 0x00 0x42 0x24 0x27 0x28 0x2B 0x6F00 0x7B00 0x8000 + 0x00 0x43 0x20 0x23 0x28 0x2B 0x7380 0x7A80 0x8000 + 0x00 0x44 0x1C 0x1F 0x28 0x2B 0x7800 0x7A00 0x8000 + 0x00 0x45 0x18 0x1B 0x28 0x2B 0x7900 0x7580 0x8000 + 0x00 0x46 0x14 0x17 0x28 0x2B 0x7E00 0x7480 0x8000 + 0x00 0x47 0x10 0x13 0x28 0x2B 0x8000 0x7180 0x7D00 + 0x00 0x48 0x0C 0x0F 0x28 0x2B 0x8000 0x6C00 0x7800 + 0x00 0x49 0x08 0x0B 0x28 0x2B 0x8000 0x8000 0x8000 + 0x00 0x4A 0x04 0x07 0x28 0x2B 0x8000 0x8000 0x8000 + 0x00 0x4B 0x00 0x03 0x28 0x2B 0x8000 0x8000 0x8000 + 0x00 0x4C 0x38 0x3B 0x24 0x27 0x8000 0x8000 0x8000 + 0x00 0x4D 0x34 0x37 0x24 0x27 0x8000 0x8000 0x8000 + 0x00 0x4E 0x30 0x33 0x24 0x27 0x8000 0x8000 0x8000 + 0x00 0x4F 0x2C 0x2F 0x24 0x27 0x6A80 0x7F00 0x8000 + 0x00 0x50 0x28 0x2B 0x24 0x27 0x6E80 0x7E80 0x8000 + 0x00 0x51 0x24 0x27 0x24 0x27 0x7300 0x7E00 0x8000 + 0x00 0x52 0x20 0x23 0x24 0x27 0x7700 0x7D80 0x8000 + 0x00 0x53 0x1C 0x1F 0x24 0x27 0x7C00 0x7C80 0x8000 + 0x00 0x54 0x18 0x1B 0x24 0x27 0x7C80 0x7800 0x8000 + 0x00 0x55 0x14 0x17 0x24 0x27 0x8000 0x7580 0x7E80 + 0x00 0x56 0x10 0x13 0x24 0x27 0x8000 0x7080 0x7A00 + 0x00 0x57 0x0C 0x0F 0x24 0x27 0x8000 0x6A80 0x7500 + 0x00 0x58 0x08 0x0B 0x24 0x27 0x8000 0x8000 0x8000 + 0x00 0x59 0x04 0x07 0x24 0x27 0x8000 0x8000 0x8000 + 0x00 0x5A 0x00 0x03 0x24 0x27 0x8000 0x8000 0x8000 + 0x00 0x5B 0x38 0x3B 0x20 0x23 0x8000 0x8000 0x8000 + 0x00 0x5C 0x34 0x37 0x20 0x23 0x8000 0x8000 0x8000 + 0x00 0x5D 0x30 0x33 0x20 0x23 0x8000 0x8000 0x8000 + 0x00 0x5E 0x2C 0x2F 0x20 0x23 0x6B80 0x8000 0x7E80 + 0x00 0x5F 0x28 0x2B 0x20 0x23 0x7080 0x8000 0x7F00 + 0x00 0x60 0x24 0x27 0x20 0x23 0x7580 0x8000 0x7F80 + 0x00 0x61 0x20 0x23 0x20 0x23 0x7A80 0x8000 0x8000 + 0x00 0x62 0x1C 0x1F 0x20 0x23 0x7F80 0x7F80 0x8000 + 0x00 0x63 0x18 0x1B 0x20 0x23 0x8000 0x7A80 0x8000 + 0x00 0x64 0x14 0x17 0x20 0x23 0x8000 0x7580 0x7C00 + 0x00 0x65 0x10 0x13 0x20 0x23 0x8000 0x7000 0x7780 + 0x00 0x66 0x0C 0x0F 0x20 0x23 0x8000 0x6980 0x7200 + 0x00 0x67 0x08 0x0B 0x20 0x23 0x8000 0x8000 0x8000 + 0x00 0x68 0x04 0x07 0x20 0x23 0x8000 0x8000 0x8000 + 0x00 0x69 0x00 0x03 0x20 0x23 0x8000 0x8000 0x8000 + 0x00 0x6A 0x38 0x3B 0x1C 0x1F 0x8000 0x8000 0x8000 + 0x00 0x6B 0x34 0x37 0x1C 0x1F 0x8000 0x8000 0x8000 + 0x00 0x6C 0x30 0x33 0x1C 0x1F 0x8000 0x8000 0x8000 + 0x00 0x6D 0x2C 0x2F 0x1C 0x1F 0x6B00 0x8000 0x7C00 + 0x00 0x6E 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0x00 0x81 0x14 0x17 0x18 0x1B 0x8000 0x7680 0x7480 + 0x00 0x82 0x10 0x13 0x18 0x1B 0x8000 0x7080 0x7000 + 0x00 0x83 0x0C 0x0F 0x18 0x1B 0x8000 0x6880 0x6A00 + 0x00 0x84 0x08 0x0B 0x18 0x1B 0x8000 0x8000 0x8000 + 0x00 0x85 0x04 0x07 0x18 0x1B 0x8000 0x8000 0x8000 + 0x00 0x86 0x00 0x03 0x18 0x1B 0x8000 0x8000 0x8000 + 0x00 0x87 0x38 0x3B 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x88 0x34 0x37 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x89 0x30 0x33 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x8A 0x2C 0x2F 0x14 0x17 0x6A00 0x8000 0x7700 + 0x00 0x8B 0x28 0x2B 0x14 0x17 0x7000 0x8000 0x7800 + 0x00 0x8C 0x24 0x27 0x14 0x17 0x7500 0x8000 0x7880 + 0x00 0x8D 0x20 0x23 0x14 0x17 0x7B00 0x8000 0x7980 + 0x00 0x8E 0x1C 0x1F 0x14 0x17 0x8000 0x8000 0x7A00 + 0x00 0x8F 0x18 0x1B 0x14 0x17 0x8000 0x7B80 0x7680 + 0x00 0x90 0x14 0x17 0x14 0x17 0x8000 0x7680 0x7280 + 0x00 0x91 0x10 0x13 0x14 0x17 0x8000 0x7000 0x6E00 + 0x00 0x92 0x0C 0x0F 0x14 0x17 0x8000 0x6880 0x6880 + 0x00 0x93 0x08 0x0B 0x14 0x17 0x8000 0x8000 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0x8000 0x8000 0x8000 + 0x00 0xBA 0x20 0x23 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xBB 0x1C 0x1F 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xBC 0x18 0x1B 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xBD 0x14 0x17 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xBE 0x10 0x13 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xBF 0x0C 0x0F 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xC0 0x08 0x0B 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xC1 0x04 0x07 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xC2 0x00 0x03 0x08 0x0B 0x8000 0x8000 0x8000 + 0x00 0xC3 0x38 0x3B 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xC4 0x34 0x37 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xC5 0x30 0x33 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xC6 0x2C 0x2F 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xC7 0x28 0x2B 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xC8 0x24 0x27 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xC9 0x20 0x23 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xCA 0x1C 0x1F 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xCB 0x18 0x1B 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xCC 0x14 0x17 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xCD 0x10 0x13 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xCE 0x0C 0x0F 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xCF 0x08 0x0B 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xD0 0x04 0x07 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xD1 0x00 0x03 0x04 0x07 0x8000 0x8000 0x8000 + 0x00 0xD2 0x38 0x3B 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xD3 0x34 0x37 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xD4 0x30 0x33 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xD5 0x2C 0x2F 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xD6 0x28 0x2B 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xD7 0x24 0x27 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xD8 0x20 0x23 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xD9 0x1C 0x1F 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDA 0x18 0x1B 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDB 0x14 0x17 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDC 0x10 0x13 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDD 0x0C 0x0F 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDE 0x08 0x0B 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xDF 0x04 0x07 0x00 0x03 0x8000 0x8000 0x8000 + 0x00 0xE0 0x00 0x03 0x00 0x03 0x8000 0x8000 0x8000 + 0xFF 0x00 0x00 0x3B 0x00 0x3B 0x8000 0x8000 0x8000>; + + somc,chenge-fps-command = [23 01 00 00 00 00 02 C6 79]; + somc,chenge-fps-default = <0x79>; + somc,display-clock = <14000000>; + somc,driver-ic-vbp = <4>; + somc,driver-ic-vfp = <8>; + somc,chenge-fps-cmds-num = <0>; + somc,chenge-fps-payload-num = <1>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/dsi-panel-sirius.dtsi b/arch/arm/boot/dts/qcom/dsi-panel-sirius.dtsi new file mode 100644 index 00000000000..7ffc6998ec7 --- /dev/null +++ b/arch/arm/boot/dts/qcom/dsi-panel-sirius.dtsi @@ -0,0 +1,1980 @@ +/* Copyright (c) 2012, Code Aurora Forum. All rights reserved. + * Copyright (C) 2012-2014 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&mdss_mdp { + qcom,mdss-ib-factor = <19 10>; + dsi_renesas_sharp_1080_vid: somc,renesas_sharp_1080p_panel { + qcom,mdss-dsi-panel-name = "sharp renesas 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <128>; + qcom,mdss-dsi-h-back-porch = <76>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <3>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [23 01 00 00 00 00 02 B0 04 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 D6 01 + 29 01 00 00 00 00 03 C0 0F 0F + 29 01 00 00 00 00 03 EC 00 10 + 29 01 00 00 00 00 19 C7 + 05 19 22 2B 38 51 41 50 5C 64 6B 74 + 0F 23 2B 32 3F 52 44 55 61 69 70 77 + 29 01 00 00 00 00 19 C8 + 03 18 21 2B 38 51 42 4F 5D 65 6C 74 + 0D 22 2A 32 3E 52 41 54 5D 66 6D 77 + 29 01 00 00 00 00 19 C9 + 00 15 1E 28 36 50 42 50 5E 66 6D 74 + 0A 1F 27 2F 3D 51 41 55 5E 67 6E 77 + 05 01 00 00 00 00 01 11]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 6E 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + somc,mdss-dsi-cabc-early-on-command = [39 01 00 00 00 00 03 51 0F FF + 15 01 00 00 00 00 02 53 24 + 15 01 00 00 00 00 02 55 02]; + somc,mdss-dsi-cabc-late-off-command = [39 01 00 00 00 00 03 51 00 00 + 15 01 00 00 00 00 02 55 00 + 15 01 00 00 00 00 02 53 20]; + somc,mdss-dsi-cabc-enabled = <0>; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3A 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 57000>; + somc,disp-en-on-pre = <25>; + somc,pw-on-rst-seq = <0 60>, <1 10>; + somc,disp-en-off-post = <50>; + somc,pw-off-rst-b-seq = <0 10>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <73>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x10 0x13 0x28 0x2B 0x8000 0x7400 0x8000 + 0x00 0x02 0x14 0x17 0x28 0x2B 0x7a80 0x7400 0x7e00 + 0x00 0x03 0x18 0x1B 0x28 0x2B 0x7480 0x7380 0x8000 + 0x00 0x04 0x1C 0x1F 0x28 0x2B 0x7280 0x7380 0x8000 + 0x00 0x05 0x20 0x23 0x28 0x2B 0x6e00 0x7400 0x8000 + 0x00 0x06 0x0C 0x0F 0x24 0x27 0x7f80 0x7200 0x7c00 + 0x00 0x07 0x10 0x13 0x24 0x27 0x8000 0x7400 0x7d80 + 0x00 0x08 0x14 0x17 0x24 0x27 0x7d00 0x7700 0x7e00 + 0x00 0x09 0x18 0x1B 0x24 0x27 0x7700 0x7600 0x8000 + 0x00 0x0A 0x1C 0x1F 0x24 0x27 0x7380 0x7500 0x7c00 + 0x00 0x0B 0x20 0x23 0x24 0x27 0x6f00 0x7500 0x7e80 + 0x00 0x0C 0x0C 0x0F 0x20 0x23 0x7f80 0x7200 0x7900 + 0x00 0x0D 0x10 0x13 0x20 0x23 0x8000 0x7400 0x7b00 + 0x00 0x0E 0x14 0x17 0x20 0x23 0x7a80 0x7400 0x7b00 + 0x00 0x0F 0x18 0x1B 0x20 0x23 0x7800 0x7700 0x7e80 + 0x00 0x10 0x1C 0x1F 0x20 0x23 0x7780 0x7900 0x7f80 + 0x00 0x11 0x20 0x23 0x20 0x23 0x7300 0x7900 0x7f00 + 0x00 0x12 0x24 0x27 0x20 0x23 0x7100 0x7980 0x8000 + 0x00 0x13 0x0C 0x0F 0x1C 0x1F 0x7f80 0x7200 0x7700 + 0x00 0x14 0x10 0x13 0x1C 0x1F 0x7c00 0x7000 0x7580 + 0x00 0x15 0x14 0x17 0x1C 0x1F 0x7f80 0x7900 0x7e00 + 0x00 0x16 0x18 0x1B 0x1C 0x1F 0x7c00 0x7a00 0x7d80 + 0x00 0x17 0x1C 0x1F 0x1C 0x1F 0x7900 0x7a00 0x7e00 + 0x00 0x18 0x20 0x23 0x1C 0x1F 0x7600 0x7c80 0x8000 + 0x00 0x19 0x24 0x27 0x1C 0x1F 0x7300 0x7c00 0x7e80 + 0x00 0x1A 0x0C 0x0F 0x18 0x1B 0x8000 0x7200 0x7300 + 0x00 0x1B 0x10 0x13 0x18 0x1B 0x7e80 0x7200 0x7500 + 0x00 0x1C 0x14 0x17 0x18 0x1B 0x7f00 0x7900 0x7b80 + 0x00 0x1D 0x18 0x1B 0x18 0x1B 0x7f00 0x7d00 0x7e00 + 0x00 0x1E 0x1C 0x1F 0x18 0x1B 0x7d00 0x7d80 0x8000 + 0x00 0x1F 0x20 0x23 0x18 0x1B 0x7900 0x7f00 0x8000 + 0x00 0x20 0x24 0x27 0x18 0x1B 0x7780 0x8000 0x8000 + 0x00 0x21 0x10 0x13 0x14 0x17 0x7f80 0x7380 0x7200 + 0x00 0x22 0x14 0x17 0x14 0x17 0x7f00 0x7900 0x7900 + 0x00 0x23 0x18 0x1B 0x14 0x17 0x7f00 0x7d00 0x7b80 + 0xFF 0x00 0x1C 0x1F 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x24 0x20 0x23 0x14 0x17 0x7a00 0x8000 0x7e80 + 0x00 0x25 0x24 0x27 0x14 0x17 0x7780 0x8000 0x7d80 + 0x00 0x26 0x10 0x13 0x10 0x13 0x8000 0x7400 0x7000 + 0x00 0x27 0x14 0x17 0x10 0x13 0x7f80 0x7900 0x7680 + 0x00 0x28 0x18 0x1B 0x10 0x13 0x8000 0x7d80 0x7980 + 0x00 0x29 0x1C 0x1F 0x10 0x13 0x8000 0x8000 0x7c00 + 0x00 0x2A 0x20 0x23 0x10 0x13 0x7a00 0x8000 0x7c00 + 0x00 0x2B 0x10 0x13 0x0C 0x0F 0x7f80 0x7480 0x6f00 + 0x00 0x2C 0x14 0x17 0x0C 0x0F 0x7f80 0x7900 0x7400 + 0x00 0x2D 0x18 0x1B 0x0C 0x0F 0x7f80 0x7d80 0x7680 + 0x00 0x2E 0x1C 0x1F 0x0C 0x0F 0x8000 0x8000 0x7980 + 0x01 0x00 0x00 0x09 0x32 0x3B 0x8000 0x6D00 0x8000 + 0x02 0x00 0x0A 0x13 0x32 0x3B 0x7A00 0x7100 0x8000 + 0x03 0x00 0x14 0x1D 0x32 0x3B 0x7400 0x7180 0x8000 + 0x04 0x00 0x1E 0x27 0x32 0x3B 0x7100 0x7200 0x8000 + 0x05 0x00 0x28 0x31 0x32 0x3B 0x6C80 0x7180 0x8000 + 0x06 0x00 0x32 0x3B 0x32 0x3B 0x6680 0x7300 0x8000 + 0x07 0x00 0x00 0x09 0x28 0x31 0x8000 0x6B80 0x7080 + 0x08 0x00 0x0A 0x13 0x28 0x31 0x8000 0x7400 0x8000 + 0x09 0x00 0x14 0x1D 0x28 0x31 0x7A00 0x7700 0x8000 + 0x0A 0x00 0x1E 0x27 0x28 0x31 0x7600 0x7780 0x8000 + 0x0B 0x00 0x28 0x31 0x28 0x31 0x6F80 0x7980 0x8000 + 0x0C 0x00 0x32 0x3B 0x28 0x31 0x7080 0x7E80 0x8000 + 0x0D 0x00 0x00 0x09 0x14 0x27 0x8000 0x6B00 0x6D00 + 0x0E 0x00 0x0A 0x13 0x14 0x27 0x8000 0x7380 0x7480 + 0xFF 0x00 0x14 0x27 0x14 0x27 0x8000 0x8000 0x8000 + 0x10 0x00 0x28 0x31 0x14 0x27 0x7500 0x8000 0x7E80 + 0x11 0x00 0x32 0x3B 0x14 0x27 0x7100 0x8000 0x7C80 + 0x12 0x00 0x00 0x09 0x00 0x09 0x8000 0x6900 0x6500 + 0x13 0x00 0x00 0x13 0x0A 0x13 0x8000 0x7300 0x6F00 + 0x13 0x00 0x0A 0x13 0x00 0x09 0x8000 0x7300 0x6F00 + 0x14 0x00 0x14 0x27 0x0A 0x13 0x7F00 0x8000 0x7900 + 0x15 0x00 0x14 0x27 0x00 0x09 0x7E80 0x8000 0x7680 + 0x16 0x00 0x28 0x31 0x0A 0x13 0x7380 0x8000 0x7600 + 0x17 0x00 0x32 0x3B 0x0A 0x13 0x7080 0x8000 0x7900 + 0x18 0x00 0x28 0x31 0x00 0x09 0x7A00 0x8000 0x7580 + 0x19 0x00 0x32 0x3B 0x00 0x09 0x6F00 0x8000 0x7200>; + }; + + dsi_renesas_auo_1080_vid: somc,renesas_auo_1080p_panel { + qcom,mdss-dsi-panel-name = "auo renesas 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <104>; + qcom,mdss-dsi-h-back-porch = <56>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <20>; + qcom,mdss-dsi-v-front-porch = <24>; + qcom,mdss-dsi-v-pulse-width = <10>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 35 01 + 29 01 00 00 00 00 02 B0 04 + 29 01 00 00 00 00 08 C2 30 F7 84 1B 0C 00 00 + 29 01 00 00 00 00 02 D6 01 + 05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-on-command = [05 01 00 00 78 00 01 11]; + qcom,mdss-dsi-off-command = [05 01 00 00 00 00 01 28 + 05 01 00 00 43 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <215000 256000>; + somc,pw-on-rst-seq = <1 10>, <0 1>, <1 10>; + somc,pw-off-rst-seq = <0 0>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DC]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <73>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x10 0x13 0x28 0x2B 0x8000 0x7400 0x8000 + 0x00 0x02 0x14 0x17 0x28 0x2B 0x7a80 0x7400 0x7e00 + 0x00 0x03 0x18 0x1B 0x28 0x2B 0x7480 0x7380 0x8000 + 0x00 0x04 0x1C 0x1F 0x28 0x2B 0x7280 0x7380 0x8000 + 0x00 0x05 0x20 0x23 0x28 0x2B 0x6e00 0x7400 0x8000 + 0x00 0x06 0x0C 0x0F 0x24 0x27 0x7f80 0x7200 0x7c00 + 0x00 0x07 0x10 0x13 0x24 0x27 0x8000 0x7400 0x7d80 + 0x00 0x08 0x14 0x17 0x24 0x27 0x7d00 0x7700 0x7e00 + 0x00 0x09 0x18 0x1B 0x24 0x27 0x7700 0x7600 0x8000 + 0x00 0x0A 0x1C 0x1F 0x24 0x27 0x7380 0x7500 0x7c00 + 0x00 0x0B 0x20 0x23 0x24 0x27 0x6f00 0x7500 0x7e80 + 0x00 0x0C 0x0C 0x0F 0x20 0x23 0x7f80 0x7200 0x7900 + 0x00 0x0D 0x10 0x13 0x20 0x23 0x8000 0x7400 0x7b00 + 0x00 0x0E 0x14 0x17 0x20 0x23 0x7a80 0x7400 0x7b00 + 0x00 0x0F 0x18 0x1B 0x20 0x23 0x7800 0x7700 0x7e80 + 0x00 0x10 0x1C 0x1F 0x20 0x23 0x7780 0x7900 0x7f80 + 0x00 0x11 0x20 0x23 0x20 0x23 0x7300 0x7900 0x7f00 + 0x00 0x12 0x24 0x27 0x20 0x23 0x7100 0x7980 0x8000 + 0x00 0x13 0x0C 0x0F 0x1C 0x1F 0x7f80 0x7200 0x7700 + 0x00 0x14 0x10 0x13 0x1C 0x1F 0x7c00 0x7000 0x7580 + 0x00 0x15 0x14 0x17 0x1C 0x1F 0x7f80 0x7900 0x7e00 + 0x00 0x16 0x18 0x1B 0x1C 0x1F 0x7c00 0x7a00 0x7d80 + 0x00 0x17 0x1C 0x1F 0x1C 0x1F 0x7900 0x7a00 0x7e00 + 0x00 0x18 0x20 0x23 0x1C 0x1F 0x7600 0x7c80 0x8000 + 0x00 0x19 0x24 0x27 0x1C 0x1F 0x7300 0x7c00 0x7e80 + 0x00 0x1A 0x0C 0x0F 0x18 0x1B 0x8000 0x7200 0x7300 + 0x00 0x1B 0x10 0x13 0x18 0x1B 0x7e80 0x7200 0x7500 + 0x00 0x1C 0x14 0x17 0x18 0x1B 0x7f00 0x7900 0x7b80 + 0x00 0x1D 0x18 0x1B 0x18 0x1B 0x7f00 0x7d00 0x7e00 + 0x00 0x1E 0x1C 0x1F 0x18 0x1B 0x7d00 0x7d80 0x8000 + 0x00 0x1F 0x20 0x23 0x18 0x1B 0x7900 0x7f00 0x8000 + 0x00 0x20 0x24 0x27 0x18 0x1B 0x7780 0x8000 0x8000 + 0x00 0x21 0x10 0x13 0x14 0x17 0x7f80 0x7380 0x7200 + 0x00 0x22 0x14 0x17 0x14 0x17 0x7f00 0x7900 0x7900 + 0x00 0x23 0x18 0x1B 0x14 0x17 0x7f00 0x7d00 0x7b80 + 0xFF 0x00 0x1C 0x1F 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x24 0x20 0x23 0x14 0x17 0x7a00 0x8000 0x7e80 + 0x00 0x25 0x24 0x27 0x14 0x17 0x7780 0x8000 0x7d80 + 0x00 0x26 0x10 0x13 0x10 0x13 0x8000 0x7400 0x7000 + 0x00 0x27 0x14 0x17 0x10 0x13 0x7f80 0x7900 0x7680 + 0x00 0x28 0x18 0x1B 0x10 0x13 0x8000 0x7d80 0x7980 + 0x00 0x29 0x1C 0x1F 0x10 0x13 0x8000 0x8000 0x7c00 + 0x00 0x2A 0x20 0x23 0x10 0x13 0x7a00 0x8000 0x7c00 + 0x00 0x2B 0x10 0x13 0x0C 0x0F 0x7f80 0x7480 0x6f00 + 0x00 0x2C 0x14 0x17 0x0C 0x0F 0x7f80 0x7900 0x7400 + 0x00 0x2D 0x18 0x1B 0x0C 0x0F 0x7f80 0x7d80 0x7680 + 0x00 0x2E 0x1C 0x1F 0x0C 0x0F 0x8000 0x8000 0x7980 + 0x01 0x00 0x00 0x09 0x32 0x3B 0x8000 0x6D00 0x8000 + 0x02 0x00 0x0A 0x13 0x32 0x3B 0x7A00 0x7100 0x8000 + 0x03 0x00 0x14 0x1D 0x32 0x3B 0x7400 0x7180 0x8000 + 0x04 0x00 0x1E 0x27 0x32 0x3B 0x7100 0x7200 0x8000 + 0x05 0x00 0x28 0x31 0x32 0x3B 0x6C80 0x7180 0x8000 + 0x06 0x00 0x32 0x3B 0x32 0x3B 0x6680 0x7300 0x8000 + 0x07 0x00 0x00 0x09 0x28 0x31 0x8000 0x6B80 0x7080 + 0x08 0x00 0x0A 0x13 0x28 0x31 0x8000 0x7400 0x8000 + 0x09 0x00 0x14 0x1D 0x28 0x31 0x7A00 0x7700 0x8000 + 0x0A 0x00 0x1E 0x27 0x28 0x31 0x7600 0x7780 0x8000 + 0x0B 0x00 0x28 0x31 0x28 0x31 0x6F80 0x7980 0x8000 + 0x0C 0x00 0x32 0x3B 0x28 0x31 0x7080 0x7E80 0x8000 + 0x0D 0x00 0x00 0x09 0x14 0x27 0x8000 0x6B00 0x6D00 + 0x0E 0x00 0x0A 0x13 0x14 0x27 0x8000 0x7380 0x7480 + 0xFF 0x00 0x14 0x27 0x14 0x27 0x8000 0x8000 0x8000 + 0x10 0x00 0x28 0x31 0x14 0x27 0x7500 0x8000 0x7E80 + 0x11 0x00 0x32 0x3B 0x14 0x27 0x7100 0x8000 0x7C80 + 0x12 0x00 0x00 0x09 0x00 0x09 0x8000 0x6900 0x6500 + 0x13 0x00 0x00 0x13 0x0A 0x13 0x8000 0x7300 0x6F00 + 0x13 0x00 0x0A 0x13 0x00 0x09 0x8000 0x7300 0x6F00 + 0x14 0x00 0x14 0x27 0x0A 0x13 0x7F00 0x8000 0x7900 + 0x15 0x00 0x14 0x27 0x00 0x09 0x7E80 0x8000 0x7680 + 0x16 0x00 0x28 0x31 0x0A 0x13 0x7380 0x8000 0x7600 + 0x17 0x00 0x32 0x3B 0x0A 0x13 0x7080 0x8000 0x7900 + 0x18 0x00 0x28 0x31 0x00 0x09 0x7A00 0x8000 0x7580 + 0x19 0x00 0x32 0x3B 0x00 0x09 0x6F00 0x8000 0x7200>; + }; + + dsi_renesas_jdi_1080_vid: somc,renesas_jdi_1080p_panel { + qcom,mdss-dsi-panel-name = "jdi renesas 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <112>; + qcom,mdss-dsi-h-back-porch = <76>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <27>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [05 01 00 00 05 00 01 01 + 23 01 00 00 00 00 02 B0 00 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 00 00 + 29 01 00 00 00 00 19 C7 + 08 12 1B 24 31 48 40 52 5E 61 6A 76 + 08 12 1B 24 31 48 40 52 5E 61 6A 76 + 29 01 00 00 00 00 19 C8 + 08 12 1B 24 31 49 41 53 5E 61 6A 76 + 08 12 1B 24 31 49 41 53 5E 61 6A 76 + 29 01 00 00 00 00 19 C9 + 08 12 1B 24 31 47 3F 52 5E 61 6A 76 + 08 12 1B 24 31 47 3F 52 5E 61 6A 76 + 29 01 00 00 00 00 1B D3 + 1B 33 BB CC C4 33 33 33 00 01 00 A0 D8 + A0 06 2B 33 33 22 70 02 2B 43 3D BF 99 + 23 01 00 00 00 00 02 D6 01]; + qcom,mdss-dsi-on-command = [05 01 00 00 78 00 01 11 + 05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <353000 414000>; + somc,disp-en-on-pre = <5>; + somc,disp-en-on-post = <15>; + somc,disp-en-off-post = <70>; + somc,pw-on-rst-seq = <1 10>; + somc,pw-off-rst-seq = <0 0>; + + somc,mdss-dsi-pre-uv-command = [23 01 00 00 00 00 02 B0 04]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <4>; + somc,mdss-dsi-pcc-table-size = <73>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x10 0x13 0x28 0x2B 0x8000 0x7400 0x8000 + 0x00 0x02 0x14 0x17 0x28 0x2B 0x7a80 0x7400 0x7e00 + 0x00 0x03 0x18 0x1B 0x28 0x2B 0x7480 0x7380 0x8000 + 0x00 0x04 0x1C 0x1F 0x28 0x2B 0x7280 0x7380 0x8000 + 0x00 0x05 0x20 0x23 0x28 0x2B 0x6e00 0x7400 0x8000 + 0x00 0x06 0x0C 0x0F 0x24 0x27 0x7f80 0x7200 0x7c00 + 0x00 0x07 0x10 0x13 0x24 0x27 0x8000 0x7400 0x7d80 + 0x00 0x08 0x14 0x17 0x24 0x27 0x7d00 0x7700 0x7e00 + 0x00 0x09 0x18 0x1B 0x24 0x27 0x7700 0x7600 0x8000 + 0x00 0x0A 0x1C 0x1F 0x24 0x27 0x7380 0x7500 0x7c00 + 0x00 0x0B 0x20 0x23 0x24 0x27 0x6f00 0x7500 0x7e80 + 0x00 0x0C 0x0C 0x0F 0x20 0x23 0x7f80 0x7200 0x7900 + 0x00 0x0D 0x10 0x13 0x20 0x23 0x8000 0x7400 0x7b00 + 0x00 0x0E 0x14 0x17 0x20 0x23 0x7a80 0x7400 0x7b00 + 0x00 0x0F 0x18 0x1B 0x20 0x23 0x7800 0x7700 0x7e80 + 0x00 0x10 0x1C 0x1F 0x20 0x23 0x7780 0x7900 0x7f80 + 0x00 0x11 0x20 0x23 0x20 0x23 0x7300 0x7900 0x7f00 + 0x00 0x12 0x24 0x27 0x20 0x23 0x7100 0x7980 0x8000 + 0x00 0x13 0x0C 0x0F 0x1C 0x1F 0x7f80 0x7200 0x7700 + 0x00 0x14 0x10 0x13 0x1C 0x1F 0x7c00 0x7000 0x7580 + 0x00 0x15 0x14 0x17 0x1C 0x1F 0x7f80 0x7900 0x7e00 + 0x00 0x16 0x18 0x1B 0x1C 0x1F 0x7c00 0x7a00 0x7d80 + 0x00 0x17 0x1C 0x1F 0x1C 0x1F 0x7900 0x7a00 0x7e00 + 0x00 0x18 0x20 0x23 0x1C 0x1F 0x7600 0x7c80 0x8000 + 0x00 0x19 0x24 0x27 0x1C 0x1F 0x7300 0x7c00 0x7e80 + 0x00 0x1A 0x0C 0x0F 0x18 0x1B 0x8000 0x7200 0x7300 + 0x00 0x1B 0x10 0x13 0x18 0x1B 0x7e80 0x7200 0x7500 + 0x00 0x1C 0x14 0x17 0x18 0x1B 0x7f00 0x7900 0x7b80 + 0x00 0x1D 0x18 0x1B 0x18 0x1B 0x7f00 0x7d00 0x7e00 + 0x00 0x1E 0x1C 0x1F 0x18 0x1B 0x7d00 0x7d80 0x8000 + 0x00 0x1F 0x20 0x23 0x18 0x1B 0x7900 0x7f00 0x8000 + 0x00 0x20 0x24 0x27 0x18 0x1B 0x7780 0x8000 0x8000 + 0x00 0x21 0x10 0x13 0x14 0x17 0x7f80 0x7380 0x7200 + 0x00 0x22 0x14 0x17 0x14 0x17 0x7f00 0x7900 0x7900 + 0x00 0x23 0x18 0x1B 0x14 0x17 0x7f00 0x7d00 0x7b80 + 0xFF 0x00 0x1C 0x1F 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x24 0x20 0x23 0x14 0x17 0x7a00 0x8000 0x7e80 + 0x00 0x25 0x24 0x27 0x14 0x17 0x7780 0x8000 0x7d80 + 0x00 0x26 0x10 0x13 0x10 0x13 0x8000 0x7400 0x7000 + 0x00 0x27 0x14 0x17 0x10 0x13 0x7f80 0x7900 0x7680 + 0x00 0x28 0x18 0x1B 0x10 0x13 0x8000 0x7d80 0x7980 + 0x00 0x29 0x1C 0x1F 0x10 0x13 0x8000 0x8000 0x7c00 + 0x00 0x2A 0x20 0x23 0x10 0x13 0x7a00 0x8000 0x7c00 + 0x00 0x2B 0x10 0x13 0x0C 0x0F 0x7f80 0x7480 0x6f00 + 0x00 0x2C 0x14 0x17 0x0C 0x0F 0x7f80 0x7900 0x7400 + 0x00 0x2D 0x18 0x1B 0x0C 0x0F 0x7f80 0x7d80 0x7680 + 0x00 0x2E 0x1C 0x1F 0x0C 0x0F 0x8000 0x8000 0x7980 + 0x01 0x00 0x00 0x09 0x32 0x3B 0x8000 0x6D00 0x8000 + 0x02 0x00 0x0A 0x13 0x32 0x3B 0x7A00 0x7100 0x8000 + 0x03 0x00 0x14 0x1D 0x32 0x3B 0x7400 0x7180 0x8000 + 0x04 0x00 0x1E 0x27 0x32 0x3B 0x7100 0x7200 0x8000 + 0x05 0x00 0x28 0x31 0x32 0x3B 0x6C80 0x7180 0x8000 + 0x06 0x00 0x32 0x3B 0x32 0x3B 0x6680 0x7300 0x8000 + 0x07 0x00 0x00 0x09 0x28 0x31 0x8000 0x6B80 0x7080 + 0x08 0x00 0x0A 0x13 0x28 0x31 0x8000 0x7400 0x8000 + 0x09 0x00 0x14 0x1D 0x28 0x31 0x7A00 0x7700 0x8000 + 0x0A 0x00 0x1E 0x27 0x28 0x31 0x7600 0x7780 0x8000 + 0x0B 0x00 0x28 0x31 0x28 0x31 0x6F80 0x7980 0x8000 + 0x0C 0x00 0x32 0x3B 0x28 0x31 0x7080 0x7E80 0x8000 + 0x0D 0x00 0x00 0x09 0x14 0x27 0x8000 0x6B00 0x6D00 + 0x0E 0x00 0x0A 0x13 0x14 0x27 0x8000 0x7380 0x7480 + 0xFF 0x00 0x14 0x27 0x14 0x27 0x8000 0x8000 0x8000 + 0x10 0x00 0x28 0x31 0x14 0x27 0x7500 0x8000 0x7E80 + 0x11 0x00 0x32 0x3B 0x14 0x27 0x7100 0x8000 0x7C80 + 0x12 0x00 0x00 0x09 0x00 0x09 0x8000 0x6900 0x6500 + 0x13 0x00 0x00 0x13 0x0A 0x13 0x8000 0x7300 0x6F00 + 0x13 0x00 0x0A 0x13 0x00 0x09 0x8000 0x7300 0x6F00 + 0x14 0x00 0x14 0x27 0x0A 0x13 0x7F00 0x8000 0x7900 + 0x15 0x00 0x14 0x27 0x00 0x09 0x7E80 0x8000 0x7680 + 0x16 0x00 0x28 0x31 0x0A 0x13 0x7380 0x8000 0x7600 + 0x17 0x00 0x32 0x3B 0x0A 0x13 0x7080 0x8000 0x7900 + 0x18 0x00 0x28 0x31 0x00 0x09 0x7A00 0x8000 0x7580 + 0x19 0x00 0x32 0x3B 0x00 0x09 0x6F00 0x8000 0x7200>; + }; + + dsi_novatek_jdi_1080_vid: somc,novatek_jdi_1080p_panel { + qcom,mdss-dsi-panel-name = "jdi novatek 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <112>; + qcom,mdss-dsi-h-back-porch = <76>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <4>; + qcom,mdss-dsi-v-front-porch = <27>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [05 01 00 00 0A 00 01 01 + 23 01 00 00 00 00 02 FF 01 + 23 01 00 00 00 00 02 75 00 + 23 01 00 00 00 00 02 76 30 + 23 01 00 00 00 00 02 77 00 + 23 01 00 00 00 00 02 78 43 + 23 01 00 00 00 00 02 79 00 + 23 01 00 00 00 00 02 7A 61 + 23 01 00 00 00 00 02 7B 00 + 23 01 00 00 00 00 02 7C 7D + 23 01 00 00 00 00 02 7D 00 + 23 01 00 00 00 00 02 7E 98 + 23 01 00 00 00 00 02 7F 00 + 23 01 00 00 00 00 02 80 AE + 23 01 00 00 00 00 02 81 00 + 23 01 00 00 00 00 02 82 C0 + 23 01 00 00 00 00 02 83 00 + 23 01 00 00 00 00 02 84 CD + 23 01 00 00 00 00 02 85 00 + 23 01 00 00 00 00 02 86 DB + 23 01 00 00 00 00 02 87 01 + 23 01 00 00 00 00 02 88 0A + 23 01 00 00 00 00 02 89 01 + 23 01 00 00 00 00 02 8A 2A + 23 01 00 00 00 00 02 8B 01 + 23 01 00 00 00 00 02 8C 66 + 23 01 00 00 00 00 02 8D 01 + 23 01 00 00 00 00 02 8E 95 + 23 01 00 00 00 00 02 8F 01 + 23 01 00 00 00 00 02 90 D8 + 23 01 00 00 00 00 02 91 02 + 23 01 00 00 00 00 02 92 1A + 23 01 00 00 00 00 02 93 02 + 23 01 00 00 00 00 02 94 1C + 23 01 00 00 00 00 02 95 02 + 23 01 00 00 00 00 02 96 5E + 23 01 00 00 00 00 02 97 02 + 23 01 00 00 00 00 02 98 9A + 23 01 00 00 00 00 02 99 02 + 23 01 00 00 00 00 02 9A BF + 23 01 00 00 00 00 02 9B 02 + 23 01 00 00 00 00 02 9C ED + 23 01 00 00 00 00 02 9D 03 + 23 01 00 00 00 00 02 9E 0B + 23 01 00 00 00 00 02 9F 03 + 23 01 00 00 00 00 02 A0 36 + 23 01 00 00 00 00 02 A2 03 + 23 01 00 00 00 00 02 A3 3B + 23 01 00 00 00 00 02 A4 03 + 23 01 00 00 00 00 02 A5 40 + 23 01 00 00 00 00 02 A6 03 + 23 01 00 00 00 00 02 A7 45 + 23 01 00 00 00 00 02 A9 03 + 23 01 00 00 00 00 02 AA 54 + 23 01 00 00 00 00 02 AB 03 + 23 01 00 00 00 00 02 AC 70 + 23 01 00 00 00 00 02 AD 03 + 23 01 00 00 00 00 02 AE 8E + 23 01 00 00 00 00 02 AF 03 + 23 01 00 00 00 00 02 B0 B2 + 23 01 00 00 00 00 02 B1 03 + 23 01 00 00 00 00 02 B2 C9 + 23 01 00 00 00 00 02 B3 00 + 23 01 00 00 00 00 02 B4 30 + 23 01 00 00 00 00 02 B5 00 + 23 01 00 00 00 00 02 B6 43 + 23 01 00 00 00 00 02 B7 00 + 23 01 00 00 00 00 02 B8 61 + 23 01 00 00 00 00 02 B9 00 + 23 01 00 00 00 00 02 BA 7D + 23 01 00 00 00 00 02 BB 00 + 23 01 00 00 00 00 02 BC 98 + 23 01 00 00 00 00 02 BD 00 + 23 01 00 00 00 00 02 BE AE + 23 01 00 00 00 00 02 BF 00 + 23 01 00 00 00 00 02 C0 C0 + 23 01 00 00 00 00 02 C1 00 + 23 01 00 00 00 00 02 C2 CD + 23 01 00 00 00 00 02 C3 00 + 23 01 00 00 00 00 02 C4 DB + 23 01 00 00 00 00 02 C5 01 + 23 01 00 00 00 00 02 C6 0A + 23 01 00 00 00 00 02 C7 01 + 23 01 00 00 00 00 02 C8 2A + 23 01 00 00 00 00 02 C9 01 + 23 01 00 00 00 00 02 CA 66 + 23 01 00 00 00 00 02 CB 01 + 23 01 00 00 00 00 02 CC 95 + 23 01 00 00 00 00 02 CD 01 + 23 01 00 00 00 00 02 CE D8 + 23 01 00 00 00 00 02 CF 02 + 23 01 00 00 00 00 02 D0 1A + 23 01 00 00 00 00 02 D1 02 + 23 01 00 00 00 00 02 D2 1C + 23 01 00 00 00 00 02 D3 02 + 23 01 00 00 00 00 02 D4 5E + 23 01 00 00 00 00 02 D5 02 + 23 01 00 00 00 00 02 D6 9A + 23 01 00 00 00 00 02 D7 02 + 23 01 00 00 00 00 02 D8 BF + 23 01 00 00 00 00 02 D9 02 + 23 01 00 00 00 00 02 DA ED + 23 01 00 00 00 00 02 DB 03 + 23 01 00 00 00 00 02 DC 0B + 23 01 00 00 00 00 02 DD 03 + 23 01 00 00 00 00 02 DE 36 + 23 01 00 00 00 00 02 DF 03 + 23 01 00 00 00 00 02 E0 3B + 23 01 00 00 00 00 02 E1 03 + 23 01 00 00 00 00 02 E2 40 + 23 01 00 00 00 00 02 E3 03 + 23 01 00 00 00 00 02 E4 45 + 23 01 00 00 00 00 02 E5 03 + 23 01 00 00 00 00 02 E6 54 + 23 01 00 00 00 00 02 E7 03 + 23 01 00 00 00 00 02 E8 70 + 23 01 00 00 00 00 02 E9 03 + 23 01 00 00 00 00 02 EA 8E + 23 01 00 00 00 00 02 EB 03 + 23 01 00 00 00 00 02 EC B2 + 23 01 00 00 00 00 02 ED 03 + 23 01 00 00 00 00 02 EE C9 + 23 01 00 00 00 00 02 EF 00 + 23 01 00 00 00 00 02 F0 30 + 23 01 00 00 00 00 02 F1 00 + 23 01 00 00 00 00 02 F2 43 + 23 01 00 00 00 00 02 F3 00 + 23 01 00 00 00 00 02 F4 61 + 23 01 00 00 00 00 02 F5 00 + 23 01 00 00 00 00 02 F6 7D + 23 01 00 00 00 00 02 F7 00 + 23 01 00 00 00 00 02 F8 98 + 23 01 00 00 00 00 02 F9 00 + 23 01 00 00 00 00 02 FA AE + 23 01 00 00 00 00 02 FB 01 + 23 01 00 00 00 00 02 FF 02 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 01 C0 + 23 01 00 00 00 00 02 02 00 + 23 01 00 00 00 00 02 03 CD + 23 01 00 00 00 00 02 04 00 + 23 01 00 00 00 00 02 05 DB + 23 01 00 00 00 00 02 06 01 + 23 01 00 00 00 00 02 07 0A + 23 01 00 00 00 00 02 08 01 + 23 01 00 00 00 00 02 09 2A + 23 01 00 00 00 00 02 0A 01 + 23 01 00 00 00 00 02 0B 69 + 23 01 00 00 00 00 02 0C 01 + 23 01 00 00 00 00 02 0D 99 + 23 01 00 00 00 00 02 0E 01 + 23 01 00 00 00 00 02 0F DE + 23 01 00 00 00 00 02 10 02 + 23 01 00 00 00 00 02 11 20 + 23 01 00 00 00 00 02 12 02 + 23 01 00 00 00 00 02 13 22 + 23 01 00 00 00 00 02 14 02 + 23 01 00 00 00 00 02 15 64 + 23 01 00 00 00 00 02 16 02 + 23 01 00 00 00 00 02 17 A0 + 23 01 00 00 00 00 02 18 02 + 23 01 00 00 00 00 02 19 C4 + 23 01 00 00 00 00 02 1A 02 + 23 01 00 00 00 00 02 1B F3 + 23 01 00 00 00 00 02 1C 03 + 23 01 00 00 00 00 02 1D 0F + 23 01 00 00 00 00 02 1E 03 + 23 01 00 00 00 00 02 1F 36 + 23 01 00 00 00 00 02 20 03 + 23 01 00 00 00 00 02 21 3B + 23 01 00 00 00 00 02 22 03 + 23 01 00 00 00 00 02 23 40 + 23 01 00 00 00 00 02 24 03 + 23 01 00 00 00 00 02 25 45 + 23 01 00 00 00 00 02 26 03 + 23 01 00 00 00 00 02 27 54 + 23 01 00 00 00 00 02 28 03 + 23 01 00 00 00 00 02 29 70 + 23 01 00 00 00 00 02 2A 03 + 23 01 00 00 00 00 02 2B 8E + 23 01 00 00 00 00 02 2D 03 + 23 01 00 00 00 00 02 2F B2 + 23 01 00 00 00 00 02 30 03 + 23 01 00 00 00 00 02 31 C9 + 23 01 00 00 00 00 02 32 00 + 23 01 00 00 00 00 02 33 30 + 23 01 00 00 00 00 02 34 00 + 23 01 00 00 00 00 02 35 43 + 23 01 00 00 00 00 02 36 00 + 23 01 00 00 00 00 02 37 61 + 23 01 00 00 00 00 02 38 00 + 23 01 00 00 00 00 02 39 7D + 23 01 00 00 00 00 02 3A 00 + 23 01 00 00 00 00 02 3B 98 + 23 01 00 00 00 00 02 3D 00 + 23 01 00 00 00 00 02 3F AE + 23 01 00 00 00 00 02 40 00 + 23 01 00 00 00 00 02 41 C0 + 23 01 00 00 00 00 02 42 00 + 23 01 00 00 00 00 02 43 CD + 23 01 00 00 00 00 02 44 00 + 23 01 00 00 00 00 02 45 DB + 23 01 00 00 00 00 02 46 01 + 23 01 00 00 00 00 02 47 0A + 23 01 00 00 00 00 02 48 01 + 23 01 00 00 00 00 02 49 2A + 23 01 00 00 00 00 02 4A 01 + 23 01 00 00 00 00 02 4B 69 + 23 01 00 00 00 00 02 4C 01 + 23 01 00 00 00 00 02 4D 99 + 23 01 00 00 00 00 02 4E 01 + 23 01 00 00 00 00 02 4F DE + 23 01 00 00 00 00 02 50 02 + 23 01 00 00 00 00 02 51 20 + 23 01 00 00 00 00 02 52 02 + 23 01 00 00 00 00 02 53 22 + 23 01 00 00 00 00 02 54 02 + 23 01 00 00 00 00 02 55 64 + 23 01 00 00 00 00 02 56 02 + 23 01 00 00 00 00 02 58 A0 + 23 01 00 00 00 00 02 59 02 + 23 01 00 00 00 00 02 5A C4 + 23 01 00 00 00 00 02 5B 02 + 23 01 00 00 00 00 02 5C F3 + 23 01 00 00 00 00 02 5D 03 + 23 01 00 00 00 00 02 5E 0F + 23 01 00 00 00 00 02 5F 03 + 23 01 00 00 00 00 02 60 36 + 23 01 00 00 00 00 02 61 03 + 23 01 00 00 00 00 02 62 3B + 23 01 00 00 00 00 02 63 03 + 23 01 00 00 00 00 02 64 40 + 23 01 00 00 00 00 02 65 03 + 23 01 00 00 00 00 02 66 45 + 23 01 00 00 00 00 02 67 03 + 23 01 00 00 00 00 02 68 54 + 23 01 00 00 00 00 02 69 03 + 23 01 00 00 00 00 02 6A 70 + 23 01 00 00 00 00 02 6B 03 + 23 01 00 00 00 00 02 6C 8E + 23 01 00 00 00 00 02 6D 03 + 23 01 00 00 00 00 02 6E B2 + 23 01 00 00 00 00 02 6F 03 + 23 01 00 00 00 00 02 70 C9 + 23 01 00 00 00 00 02 71 00 + 23 01 00 00 00 00 02 72 30 + 23 01 00 00 00 00 02 73 00 + 23 01 00 00 00 00 02 74 43 + 23 01 00 00 00 00 02 75 00 + 23 01 00 00 00 00 02 76 61 + 23 01 00 00 00 00 02 77 00 + 23 01 00 00 00 00 02 78 7D + 23 01 00 00 00 00 02 79 00 + 23 01 00 00 00 00 02 7A 98 + 23 01 00 00 00 00 02 7B 00 + 23 01 00 00 00 00 02 7C AE + 23 01 00 00 00 00 02 7D 00 + 23 01 00 00 00 00 02 7E C0 + 23 01 00 00 00 00 02 7F 00 + 23 01 00 00 00 00 02 80 CD + 23 01 00 00 00 00 02 81 00 + 23 01 00 00 00 00 02 82 DB + 23 01 00 00 00 00 02 83 01 + 23 01 00 00 00 00 02 84 0A + 23 01 00 00 00 00 02 85 01 + 23 01 00 00 00 00 02 86 2A + 23 01 00 00 00 00 02 87 01 + 23 01 00 00 00 00 02 88 63 + 23 01 00 00 00 00 02 89 01 + 23 01 00 00 00 00 02 8A 90 + 23 01 00 00 00 00 02 8B 01 + 23 01 00 00 00 00 02 8C D2 + 23 01 00 00 00 00 02 8D 02 + 23 01 00 00 00 00 02 8E 14 + 23 01 00 00 00 00 02 8F 02 + 23 01 00 00 00 00 02 90 16 + 23 01 00 00 00 00 02 91 02 + 23 01 00 00 00 00 02 92 58 + 23 01 00 00 00 00 02 93 02 + 23 01 00 00 00 00 02 94 95 + 23 01 00 00 00 00 02 95 02 + 23 01 00 00 00 00 02 96 BC + 23 01 00 00 00 00 02 97 02 + 23 01 00 00 00 00 02 98 ED + 23 01 00 00 00 00 02 99 03 + 23 01 00 00 00 00 02 9A 0B + 23 01 00 00 00 00 02 9B 03 + 23 01 00 00 00 00 02 9C 36 + 23 01 00 00 00 00 02 9D 03 + 23 01 00 00 00 00 02 9E 3B + 23 01 00 00 00 00 02 9F 03 + 23 01 00 00 00 00 02 A0 40 + 23 01 00 00 00 00 02 A2 03 + 23 01 00 00 00 00 02 A3 45 + 23 01 00 00 00 00 02 A4 03 + 23 01 00 00 00 00 02 A5 54 + 23 01 00 00 00 00 02 A6 03 + 23 01 00 00 00 00 02 A7 70 + 23 01 00 00 00 00 02 A9 03 + 23 01 00 00 00 00 02 AA 8E + 23 01 00 00 00 00 02 AB 03 + 23 01 00 00 00 00 02 AC B2 + 23 01 00 00 00 00 02 AD 03 + 23 01 00 00 00 00 02 AE C9 + 23 01 00 00 00 00 02 AF 00 + 23 01 00 00 00 00 02 B0 30 + 23 01 00 00 00 00 02 B1 00 + 23 01 00 00 00 00 02 B2 43 + 23 01 00 00 00 00 02 B3 00 + 23 01 00 00 00 00 02 B4 61 + 23 01 00 00 00 00 02 B5 00 + 23 01 00 00 00 00 02 B6 7D + 23 01 00 00 00 00 02 B7 00 + 23 01 00 00 00 00 02 B8 98 + 23 01 00 00 00 00 02 B9 00 + 23 01 00 00 00 00 02 BA AE + 23 01 00 00 00 00 02 BB 00 + 23 01 00 00 00 00 02 BC C0 + 23 01 00 00 00 00 02 BD 00 + 23 01 00 00 00 00 02 BE CD + 23 01 00 00 00 00 02 BF 00 + 23 01 00 00 00 00 02 C0 DB + 23 01 00 00 00 00 02 C1 01 + 23 01 00 00 00 00 02 C2 0A + 23 01 00 00 00 00 02 C3 01 + 23 01 00 00 00 00 02 C4 2A + 23 01 00 00 00 00 02 C5 01 + 23 01 00 00 00 00 02 C6 63 + 23 01 00 00 00 00 02 C7 01 + 23 01 00 00 00 00 02 C8 90 + 23 01 00 00 00 00 02 C9 01 + 23 01 00 00 00 00 02 CA D2 + 23 01 00 00 00 00 02 CB 02 + 23 01 00 00 00 00 02 CC 14 + 23 01 00 00 00 00 02 CD 02 + 23 01 00 00 00 00 02 CE 16 + 23 01 00 00 00 00 02 CF 02 + 23 01 00 00 00 00 02 D0 58 + 23 01 00 00 00 00 02 D1 02 + 23 01 00 00 00 00 02 D2 95 + 23 01 00 00 00 00 02 D3 02 + 23 01 00 00 00 00 02 D4 BC + 23 01 00 00 00 00 02 D5 02 + 23 01 00 00 00 00 02 D6 ED + 23 01 00 00 00 00 02 D7 03 + 23 01 00 00 00 00 02 D8 0B + 23 01 00 00 00 00 02 D9 03 + 23 01 00 00 00 00 02 DA 36 + 23 01 00 00 00 00 02 DB 03 + 23 01 00 00 00 00 02 DC 3B + 23 01 00 00 00 00 02 DD 03 + 23 01 00 00 00 00 02 DE 40 + 23 01 00 00 00 00 02 DF 03 + 23 01 00 00 00 00 02 E0 45 + 23 01 00 00 00 00 02 E1 03 + 23 01 00 00 00 00 02 E2 54 + 23 01 00 00 00 00 02 E3 03 + 23 01 00 00 00 00 02 E4 70 + 23 01 00 00 00 00 02 E5 03 + 23 01 00 00 00 00 02 E6 8E + 23 01 00 00 00 00 02 E7 03 + 23 01 00 00 00 00 02 E8 B2 + 23 01 00 00 00 00 02 E9 03 + 23 01 00 00 00 00 02 EA C9 + 23 01 00 00 00 00 02 FB 01 + 23 01 00 00 00 00 02 FF 01 + 23 01 00 00 00 00 02 0B 4B + 23 01 00 00 00 00 02 0C 4B + 23 01 00 00 00 00 02 0E A1 + 23 01 00 00 00 00 02 15 0B + 23 01 00 00 00 00 02 16 0B + 23 01 00 00 00 00 02 1B 1B + 23 01 00 00 00 00 02 1C F5 + 23 01 00 00 00 00 02 01 44 + 23 01 00 00 00 00 02 5C 82 + 23 01 00 00 00 00 02 5E 02 + 23 01 00 00 00 00 02 60 0F + 23 01 00 00 00 00 02 66 01 + 23 01 00 00 00 00 02 69 99 + 23 01 00 00 00 00 02 6D 33 + 23 01 00 00 00 00 02 FB 01 + 23 01 00 00 00 00 02 FF 05 + 23 01 00 00 00 00 02 35 6B + 23 01 00 00 00 00 02 7E 02 + 23 01 00 00 00 00 02 7F 18 + 23 01 00 00 00 00 02 81 05 + 23 01 00 00 00 00 02 82 05 + 23 01 00 00 00 00 02 A6 04 + 23 01 00 00 00 00 02 84 03 + 23 01 00 00 00 00 02 85 04 + 15 01 00 00 00 00 02 C6 00 + 23 01 00 00 00 00 02 FB 01 + 23 01 00 00 00 00 02 FF FF + 23 01 00 00 00 00 02 4F 03 + 23 01 00 00 00 00 02 FB 01 + 23 01 00 00 00 00 02 FF 00 + 15 01 00 00 00 00 02 D3 08 + 15 01 00 00 00 00 02 D4 1B + 15 01 00 00 00 00 02 D5 50 + 15 01 00 00 00 00 02 D6 70]; + qcom,mdss-dsi-on-command = [05 01 00 00 78 00 01 11 + 05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 50 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <1>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <1087000 1231000>; + somc,disp-en-on-pre = <5>; + somc,disp-en-on-post = <20>; + somc,disp-en-off-post = <70>; + somc,pw-on-rst-seq = <1 10>; + somc,pw-off-rst-seq = <0 0>; + somc,pw-down-period = <200>; + + somc,mdss-dsi-pre-uv-command = [15 01 00 00 00 00 02 FF 00]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <2>; + somc,mdss-dsi-pcc-table-size = <73>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x10 0x13 0x28 0x2B 0x8000 0x7400 0x8000 + 0x00 0x02 0x14 0x17 0x28 0x2B 0x7a80 0x7400 0x7e00 + 0x00 0x03 0x18 0x1B 0x28 0x2B 0x7480 0x7380 0x8000 + 0x00 0x04 0x1C 0x1F 0x28 0x2B 0x7280 0x7380 0x8000 + 0x00 0x05 0x20 0x23 0x28 0x2B 0x6e00 0x7400 0x8000 + 0x00 0x06 0x0C 0x0F 0x24 0x27 0x7f80 0x7200 0x7c00 + 0x00 0x07 0x10 0x13 0x24 0x27 0x8000 0x7400 0x7d80 + 0x00 0x08 0x14 0x17 0x24 0x27 0x7d00 0x7700 0x7e00 + 0x00 0x09 0x18 0x1B 0x24 0x27 0x7700 0x7600 0x8000 + 0x00 0x0A 0x1C 0x1F 0x24 0x27 0x7380 0x7500 0x7c00 + 0x00 0x0B 0x20 0x23 0x24 0x27 0x6f00 0x7500 0x7e80 + 0x00 0x0C 0x0C 0x0F 0x20 0x23 0x7f80 0x7200 0x7900 + 0x00 0x0D 0x10 0x13 0x20 0x23 0x8000 0x7400 0x7b00 + 0x00 0x0E 0x14 0x17 0x20 0x23 0x7a80 0x7400 0x7b00 + 0x00 0x0F 0x18 0x1B 0x20 0x23 0x7800 0x7700 0x7e80 + 0x00 0x10 0x1C 0x1F 0x20 0x23 0x7780 0x7900 0x7f80 + 0x00 0x11 0x20 0x23 0x20 0x23 0x7300 0x7900 0x7f00 + 0x00 0x12 0x24 0x27 0x20 0x23 0x7100 0x7980 0x8000 + 0x00 0x13 0x0C 0x0F 0x1C 0x1F 0x7f80 0x7200 0x7700 + 0x00 0x14 0x10 0x13 0x1C 0x1F 0x7c00 0x7000 0x7580 + 0x00 0x15 0x14 0x17 0x1C 0x1F 0x7f80 0x7900 0x7e00 + 0x00 0x16 0x18 0x1B 0x1C 0x1F 0x7c00 0x7a00 0x7d80 + 0x00 0x17 0x1C 0x1F 0x1C 0x1F 0x7900 0x7a00 0x7e00 + 0x00 0x18 0x20 0x23 0x1C 0x1F 0x7600 0x7c80 0x8000 + 0x00 0x19 0x24 0x27 0x1C 0x1F 0x7300 0x7c00 0x7e80 + 0x00 0x1A 0x0C 0x0F 0x18 0x1B 0x8000 0x7200 0x7300 + 0x00 0x1B 0x10 0x13 0x18 0x1B 0x7e80 0x7200 0x7500 + 0x00 0x1C 0x14 0x17 0x18 0x1B 0x7f00 0x7900 0x7b80 + 0x00 0x1D 0x18 0x1B 0x18 0x1B 0x7f00 0x7d00 0x7e00 + 0x00 0x1E 0x1C 0x1F 0x18 0x1B 0x7d00 0x7d80 0x8000 + 0x00 0x1F 0x20 0x23 0x18 0x1B 0x7900 0x7f00 0x8000 + 0x00 0x20 0x24 0x27 0x18 0x1B 0x7780 0x8000 0x8000 + 0x00 0x21 0x10 0x13 0x14 0x17 0x7f80 0x7380 0x7200 + 0x00 0x22 0x14 0x17 0x14 0x17 0x7f00 0x7900 0x7900 + 0x00 0x23 0x18 0x1B 0x14 0x17 0x7f00 0x7d00 0x7b80 + 0xFF 0x00 0x1C 0x1F 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x24 0x20 0x23 0x14 0x17 0x7a00 0x8000 0x7e80 + 0x00 0x25 0x24 0x27 0x14 0x17 0x7780 0x8000 0x7d80 + 0x00 0x26 0x10 0x13 0x10 0x13 0x8000 0x7400 0x7000 + 0x00 0x27 0x14 0x17 0x10 0x13 0x7f80 0x7900 0x7680 + 0x00 0x28 0x18 0x1B 0x10 0x13 0x8000 0x7d80 0x7980 + 0x00 0x29 0x1C 0x1F 0x10 0x13 0x8000 0x8000 0x7c00 + 0x00 0x2A 0x20 0x23 0x10 0x13 0x7a00 0x8000 0x7c00 + 0x00 0x2B 0x10 0x13 0x0C 0x0F 0x7f80 0x7480 0x6f00 + 0x00 0x2C 0x14 0x17 0x0C 0x0F 0x7f80 0x7900 0x7400 + 0x00 0x2D 0x18 0x1B 0x0C 0x0F 0x7f80 0x7d80 0x7680 + 0x00 0x2E 0x1C 0x1F 0x0C 0x0F 0x8000 0x8000 0x7980 + 0x01 0x00 0x00 0x09 0x32 0x3B 0x8000 0x6D00 0x8000 + 0x02 0x00 0x0A 0x13 0x32 0x3B 0x7A00 0x7100 0x8000 + 0x03 0x00 0x14 0x1D 0x32 0x3B 0x7400 0x7180 0x8000 + 0x04 0x00 0x1E 0x27 0x32 0x3B 0x7100 0x7200 0x8000 + 0x05 0x00 0x28 0x31 0x32 0x3B 0x6C80 0x7180 0x8000 + 0x06 0x00 0x32 0x3B 0x32 0x3B 0x6680 0x7300 0x8000 + 0x07 0x00 0x00 0x09 0x28 0x31 0x8000 0x6B80 0x7080 + 0x08 0x00 0x0A 0x13 0x28 0x31 0x8000 0x7400 0x8000 + 0x09 0x00 0x14 0x1D 0x28 0x31 0x7A00 0x7700 0x8000 + 0x0A 0x00 0x1E 0x27 0x28 0x31 0x7600 0x7780 0x8000 + 0x0B 0x00 0x28 0x31 0x28 0x31 0x6F80 0x7980 0x8000 + 0x0C 0x00 0x32 0x3B 0x28 0x31 0x7080 0x7E80 0x8000 + 0x0D 0x00 0x00 0x09 0x14 0x27 0x8000 0x6B00 0x6D00 + 0x0E 0x00 0x0A 0x13 0x14 0x27 0x8000 0x7380 0x7480 + 0xFF 0x00 0x14 0x27 0x14 0x27 0x8000 0x8000 0x8000 + 0x10 0x00 0x28 0x31 0x14 0x27 0x7500 0x8000 0x7E80 + 0x11 0x00 0x32 0x3B 0x14 0x27 0x7100 0x8000 0x7C80 + 0x12 0x00 0x00 0x09 0x00 0x09 0x8000 0x6900 0x6500 + 0x13 0x00 0x00 0x13 0x0A 0x13 0x8000 0x7300 0x6F00 + 0x13 0x00 0x0A 0x13 0x00 0x09 0x8000 0x7300 0x6F00 + 0x14 0x00 0x14 0x27 0x0A 0x13 0x7F00 0x8000 0x7900 + 0x15 0x00 0x14 0x27 0x00 0x09 0x7E80 0x8000 0x7680 + 0x16 0x00 0x28 0x31 0x0A 0x13 0x7380 0x8000 0x7600 + 0x17 0x00 0x32 0x3B 0x0A 0x13 0x7080 0x8000 0x7900 + 0x18 0x00 0x28 0x31 0x00 0x09 0x7A00 0x8000 0x7580 + 0x19 0x00 0x32 0x3B 0x00 0x09 0x6F00 0x8000 0x7200>; + }; + + dsi_novatek_sharp_1080_vid: somc,novatek_sharp_1080p_panel { + qcom,mdss-dsi-panel-name = "sharp novatek 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <128>; + qcom,mdss-dsi-h-back-porch = <76>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <3>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 FF 01 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 15 14 + 15 01 00 00 00 00 02 16 12 + 15 01 00 00 00 00 02 58 82 + 15 01 00 00 00 00 02 59 00 + 15 01 00 00 00 00 02 5A 02 + 15 01 00 00 00 00 02 5B 00 + 15 01 00 00 00 00 02 5C 82 + 15 01 00 00 00 00 02 5D 00 + 15 01 00 00 00 00 02 5E 02 + 15 01 00 00 00 00 02 5F 00 + 15 01 00 00 00 00 02 60 0F + 15 01 00 00 00 00 02 6D 22 + 15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 A6 04 + 15 01 00 00 00 00 02 C4 04 + 15 01 00 00 00 00 02 FF 00 + 15 01 00 00 00 00 02 FF 01 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 75 00 + 15 01 00 00 00 00 02 76 21 + 15 01 00 00 00 00 02 77 00 + 15 01 00 00 00 00 02 78 57 + 15 01 00 00 00 00 02 79 00 + 15 01 00 00 00 00 02 7A 8A + 15 01 00 00 00 00 02 7B 00 + 15 01 00 00 00 00 02 7C A9 + 15 01 00 00 00 00 02 7D 00 + 15 01 00 00 00 00 02 7E C1 + 15 01 00 00 00 00 02 7F 00 + 15 01 00 00 00 00 02 80 D6 + 15 01 00 00 00 00 02 81 00 + 15 01 00 00 00 00 02 82 E4 + 15 01 00 00 00 00 02 83 00 + 15 01 00 00 00 00 02 84 F6 + 15 01 00 00 00 00 02 85 01 + 15 01 00 00 00 00 02 86 06 + 15 01 00 00 00 00 02 87 01 + 15 01 00 00 00 00 02 88 33 + 15 01 00 00 00 00 02 89 01 + 15 01 00 00 00 00 02 8A 59 + 15 01 00 00 00 00 02 8B 01 + 15 01 00 00 00 00 02 8C 95 + 15 01 00 00 00 00 02 8D 01 + 15 01 00 00 00 00 02 8E C5 + 15 01 00 00 00 00 02 8F 02 + 15 01 00 00 00 00 02 90 11 + 15 01 00 00 00 00 02 91 02 + 15 01 00 00 00 00 02 92 4D + 15 01 00 00 00 00 02 93 02 + 15 01 00 00 00 00 02 94 4F + 15 01 00 00 00 00 02 95 02 + 15 01 00 00 00 00 02 96 77 + 15 01 00 00 00 00 02 97 02 + 15 01 00 00 00 00 02 98 A2 + 15 01 00 00 00 00 02 99 02 + 15 01 00 00 00 00 02 9A BE + 15 01 00 00 00 00 02 9B 02 + 15 01 00 00 00 00 02 9C E5 + 15 01 00 00 00 00 02 9D 03 + 15 01 00 00 00 00 02 9E 04 + 15 01 00 00 00 00 02 9F 03 + 15 01 00 00 00 00 02 A0 2C + 15 01 00 00 00 00 02 A2 03 + 15 01 00 00 00 00 02 A3 39 + 15 01 00 00 00 00 02 A4 03 + 15 01 00 00 00 00 02 A5 46 + 15 01 00 00 00 00 02 A6 03 + 15 01 00 00 00 00 02 A7 55 + 15 01 00 00 00 00 02 A9 03 + 15 01 00 00 00 00 02 AA 66 + 15 01 00 00 00 00 02 AB 03 + 15 01 00 00 00 00 02 AC 7B + 15 01 00 00 00 00 02 AD 03 + 15 01 00 00 00 00 02 AE 95 + 15 01 00 00 00 00 02 AF 03 + 15 01 00 00 00 00 02 B0 B4 + 15 01 00 00 00 00 02 B1 03 + 15 01 00 00 00 00 02 B2 BB + 15 01 00 00 00 00 02 B3 00 + 15 01 00 00 00 00 02 B4 5B + 15 01 00 00 00 00 02 B5 00 + 15 01 00 00 00 00 02 B6 94 + 15 01 00 00 00 00 02 B7 00 + 15 01 00 00 00 00 02 B8 C2 + 15 01 00 00 00 00 02 B9 00 + 15 01 00 00 00 00 02 BA DE + 15 01 00 00 00 00 02 BB 00 + 15 01 00 00 00 00 02 BC F5 + 15 01 00 00 00 00 02 BD 01 + 15 01 00 00 00 00 02 BE 09 + 15 01 00 00 00 00 02 BF 01 + 15 01 00 00 00 00 02 C0 15 + 15 01 00 00 00 00 02 C1 01 + 15 01 00 00 00 00 02 C2 26 + 15 01 00 00 00 00 02 C3 01 + 15 01 00 00 00 00 02 C4 34 + 15 01 00 00 00 00 02 C5 01 + 15 01 00 00 00 00 02 C6 5C + 15 01 00 00 00 00 02 C7 01 + 15 01 00 00 00 00 02 C8 7C + 15 01 00 00 00 00 02 C9 01 + 15 01 00 00 00 00 02 CA AC + 15 01 00 00 00 00 02 CB 01 + 15 01 00 00 00 00 02 CC D2 + 15 01 00 00 00 00 02 CD 02 + 15 01 00 00 00 00 02 CE 0D + 15 01 00 00 00 00 02 CF 02 + 15 01 00 00 00 00 02 D0 3B + 15 01 00 00 00 00 02 D1 02 + 15 01 00 00 00 00 02 D2 3D + 15 01 00 00 00 00 02 D3 02 + 15 01 00 00 00 00 02 D4 73 + 15 01 00 00 00 00 02 D5 02 + 15 01 00 00 00 00 02 D6 AD + 15 01 00 00 00 00 02 D7 02 + 15 01 00 00 00 00 02 D8 CF + 15 01 00 00 00 00 02 D9 02 + 15 01 00 00 00 00 02 DA FE + 15 01 00 00 00 00 02 DB 03 + 15 01 00 00 00 00 02 DC 1C + 15 01 00 00 00 00 02 DD 03 + 15 01 00 00 00 00 02 DE 44 + 15 01 00 00 00 00 02 DF 03 + 15 01 00 00 00 00 02 E0 51 + 15 01 00 00 00 00 02 E1 03 + 15 01 00 00 00 00 02 E2 5E + 15 01 00 00 00 00 02 E3 03 + 15 01 00 00 00 00 02 E4 6E + 15 01 00 00 00 00 02 E5 03 + 15 01 00 00 00 00 02 E6 7F + 15 01 00 00 00 00 02 E7 03 + 15 01 00 00 00 00 02 E8 93 + 15 01 00 00 00 00 02 E9 03 + 15 01 00 00 00 00 02 EA AC + 15 01 00 00 00 00 02 EB 03 + 15 01 00 00 00 00 02 EC CA + 15 01 00 00 00 00 02 ED 03 + 15 01 00 00 00 00 02 EE D1 + 15 01 00 00 00 00 02 EF 00 + 15 01 00 00 00 00 02 F0 14 + 15 01 00 00 00 00 02 F1 00 + 15 01 00 00 00 00 02 F2 50 + 15 01 00 00 00 00 02 F3 00 + 15 01 00 00 00 00 02 F4 84 + 15 01 00 00 00 00 02 F5 00 + 15 01 00 00 00 00 02 F6 A4 + 15 01 00 00 00 00 02 F7 00 + 15 01 00 00 00 00 02 F8 B9 + 15 01 00 00 00 00 02 F9 00 + 15 01 00 00 00 00 02 FA D2 + 15 01 00 00 00 00 02 FF 02 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 00 00 + 15 01 00 00 00 00 02 01 E1 + 15 01 00 00 00 00 02 02 00 + 15 01 00 00 00 00 02 03 F1 + 15 01 00 00 00 00 02 04 01 + 15 01 00 00 00 00 02 05 02 + 15 01 00 00 00 00 02 06 01 + 15 01 00 00 00 00 02 07 31 + 15 01 00 00 00 00 02 08 01 + 15 01 00 00 00 00 02 09 56 + 15 01 00 00 00 00 02 0A 01 + 15 01 00 00 00 00 02 0B 93 + 15 01 00 00 00 00 02 0C 01 + 15 01 00 00 00 00 02 0D C4 + 15 01 00 00 00 00 02 0E 02 + 15 01 00 00 00 00 02 0F 0F + 15 01 00 00 00 00 02 10 02 + 15 01 00 00 00 00 02 11 4B + 15 01 00 00 00 00 02 12 02 + 15 01 00 00 00 00 02 13 4C + 15 01 00 00 00 00 02 14 02 + 15 01 00 00 00 00 02 15 75 + 15 01 00 00 00 00 02 16 02 + 15 01 00 00 00 00 02 17 A0 + 15 01 00 00 00 00 02 18 02 + 15 01 00 00 00 00 02 19 BB + 15 01 00 00 00 00 02 1A 02 + 15 01 00 00 00 00 02 1B E0 + 15 01 00 00 00 00 02 1C 02 + 15 01 00 00 00 00 02 1D FF + 15 01 00 00 00 00 02 1E 03 + 15 01 00 00 00 00 02 1F 27 + 15 01 00 00 00 00 02 20 03 + 15 01 00 00 00 00 02 21 33 + 15 01 00 00 00 00 02 22 03 + 15 01 00 00 00 00 02 23 41 + 15 01 00 00 00 00 02 24 03 + 15 01 00 00 00 00 02 25 50 + 15 01 00 00 00 00 02 26 03 + 15 01 00 00 00 00 02 27 61 + 15 01 00 00 00 00 02 28 03 + 15 01 00 00 00 00 02 29 76 + 15 01 00 00 00 00 02 2A 03 + 15 01 00 00 00 00 02 2B 91 + 15 01 00 00 00 00 02 2D 03 + 15 01 00 00 00 00 02 2F B3 + 15 01 00 00 00 00 02 30 03 + 15 01 00 00 00 00 02 31 BB + 15 01 00 00 00 00 02 32 00 + 15 01 00 00 00 00 02 33 4E + 15 01 00 00 00 00 02 34 00 + 15 01 00 00 00 00 02 35 8F + 15 01 00 00 00 00 02 36 00 + 15 01 00 00 00 00 02 37 BE + 15 01 00 00 00 00 02 38 00 + 15 01 00 00 00 00 02 39 DB + 15 01 00 00 00 00 02 3A 00 + 15 01 00 00 00 00 02 3B EF + 15 01 00 00 00 00 02 3D 01 + 15 01 00 00 00 00 02 3F 06 + 15 01 00 00 00 00 02 40 01 + 15 01 00 00 00 00 02 41 13 + 15 01 00 00 00 00 02 42 01 + 15 01 00 00 00 00 02 43 22 + 15 01 00 00 00 00 02 44 01 + 15 01 00 00 00 00 02 45 31 + 15 01 00 00 00 00 02 46 01 + 15 01 00 00 00 00 02 47 5B + 15 01 00 00 00 00 02 48 01 + 15 01 00 00 00 00 02 49 7B + 15 01 00 00 00 00 02 4A 01 + 15 01 00 00 00 00 02 4B AB + 15 01 00 00 00 00 02 4C 01 + 15 01 00 00 00 00 02 4D D1 + 15 01 00 00 00 00 02 4E 02 + 15 01 00 00 00 00 02 4F 0B + 15 01 00 00 00 00 02 50 02 + 15 01 00 00 00 00 02 51 39 + 15 01 00 00 00 00 02 52 02 + 15 01 00 00 00 00 02 53 3A + 15 01 00 00 00 00 02 54 02 + 15 01 00 00 00 00 02 55 71 + 15 01 00 00 00 00 02 56 02 + 15 01 00 00 00 00 02 58 AA + 15 01 00 00 00 00 02 59 02 + 15 01 00 00 00 00 02 5A CC + 15 01 00 00 00 00 02 5B 02 + 15 01 00 00 00 00 02 5C FA + 15 01 00 00 00 00 02 5D 03 + 15 01 00 00 00 00 02 5E 17 + 15 01 00 00 00 00 02 5F 03 + 15 01 00 00 00 00 02 60 3F + 15 01 00 00 00 00 02 61 03 + 15 01 00 00 00 00 02 62 4B + 15 01 00 00 00 00 02 63 03 + 15 01 00 00 00 00 02 64 59 + 15 01 00 00 00 00 02 65 03 + 15 01 00 00 00 00 02 66 68 + 15 01 00 00 00 00 02 67 03 + 15 01 00 00 00 00 02 68 7A + 15 01 00 00 00 00 02 69 03 + 15 01 00 00 00 00 02 6A 8E + 15 01 00 00 00 00 02 6B 03 + 15 01 00 00 00 00 02 6C A8 + 15 01 00 00 00 00 02 6D 03 + 15 01 00 00 00 00 02 6E C9 + 15 01 00 00 00 00 02 6F 03 + 15 01 00 00 00 00 02 70 D1 + 15 01 00 00 00 00 02 71 00 + 15 01 00 00 00 00 02 72 00 + 15 01 00 00 00 00 02 73 00 + 15 01 00 00 00 00 02 74 38 + 15 01 00 00 00 00 02 75 00 + 15 01 00 00 00 00 02 76 6C + 15 01 00 00 00 00 02 77 00 + 15 01 00 00 00 00 02 78 8F + 15 01 00 00 00 00 02 79 00 + 15 01 00 00 00 00 02 7A AA + 15 01 00 00 00 00 02 7B 00 + 15 01 00 00 00 00 02 7C BF + 15 01 00 00 00 00 02 7D 00 + 15 01 00 00 00 00 02 7E D5 + 15 01 00 00 00 00 02 7F 00 + 15 01 00 00 00 00 02 80 E2 + 15 01 00 00 00 00 02 81 00 + 15 01 00 00 00 00 02 82 F3 + 15 01 00 00 00 00 02 83 01 + 15 01 00 00 00 00 02 84 27 + 15 01 00 00 00 00 02 85 01 + 15 01 00 00 00 00 02 86 4E + 15 01 00 00 00 00 02 87 01 + 15 01 00 00 00 00 02 88 8D + 15 01 00 00 00 00 02 89 01 + 15 01 00 00 00 00 02 8A C0 + 15 01 00 00 00 00 02 8B 02 + 15 01 00 00 00 00 02 8C 0D + 15 01 00 00 00 00 02 8D 02 + 15 01 00 00 00 00 02 8E 4B + 15 01 00 00 00 00 02 8F 02 + 15 01 00 00 00 00 02 90 4C + 15 01 00 00 00 00 02 91 02 + 15 01 00 00 00 00 02 92 76 + 15 01 00 00 00 00 02 93 02 + 15 01 00 00 00 00 02 94 A1 + 15 01 00 00 00 00 02 95 02 + 15 01 00 00 00 00 02 96 BD + 15 01 00 00 00 00 02 97 02 + 15 01 00 00 00 00 02 98 E4 + 15 01 00 00 00 00 02 99 03 + 15 01 00 00 00 00 02 9A 03 + 15 01 00 00 00 00 02 9B 03 + 15 01 00 00 00 00 02 9C 2D + 15 01 00 00 00 00 02 9D 03 + 15 01 00 00 00 00 02 9E 39 + 15 01 00 00 00 00 02 9F 03 + 15 01 00 00 00 00 02 A0 46 + 15 01 00 00 00 00 02 A2 03 + 15 01 00 00 00 00 02 A3 56 + 15 01 00 00 00 00 02 A4 03 + 15 01 00 00 00 00 02 A5 68 + 15 01 00 00 00 00 02 A6 03 + 15 01 00 00 00 00 02 A7 7F + 15 01 00 00 00 00 02 A9 03 + 15 01 00 00 00 00 02 AA 97 + 15 01 00 00 00 00 02 AB 03 + 15 01 00 00 00 00 02 AC B5 + 15 01 00 00 00 00 02 AD 03 + 15 01 00 00 00 00 02 AE BB + 15 01 00 00 00 00 02 AF 00 + 15 01 00 00 00 00 02 B0 39 + 15 01 00 00 00 00 02 B1 00 + 15 01 00 00 00 00 02 B2 76 + 15 01 00 00 00 00 02 B3 00 + 15 01 00 00 00 00 02 B4 A6 + 15 01 00 00 00 00 02 B5 00 + 15 01 00 00 00 00 02 B6 C6 + 15 01 00 00 00 00 02 B7 00 + 15 01 00 00 00 00 02 B8 DF + 15 01 00 00 00 00 02 B9 00 + 15 01 00 00 00 00 02 BA F2 + 15 01 00 00 00 00 02 BB 01 + 15 01 00 00 00 00 02 BC 07 + 15 01 00 00 00 00 02 BD 01 + 15 01 00 00 00 00 02 BE 13 + 15 01 00 00 00 00 02 BF 01 + 15 01 00 00 00 00 02 C0 22 + 15 01 00 00 00 00 02 C1 01 + 15 01 00 00 00 00 02 C2 50 + 15 01 00 00 00 00 02 C3 01 + 15 01 00 00 00 00 02 C4 72 + 15 01 00 00 00 00 02 C5 01 + 15 01 00 00 00 00 02 C6 A5 + 15 01 00 00 00 00 02 C7 01 + 15 01 00 00 00 00 02 C8 CD + 15 01 00 00 00 00 02 C9 02 + 15 01 00 00 00 00 02 CA 09 + 15 01 00 00 00 00 02 CB 02 + 15 01 00 00 00 00 02 CC 39 + 15 01 00 00 00 00 02 CD 02 + 15 01 00 00 00 00 02 CE 3A + 15 01 00 00 00 00 02 CF 02 + 15 01 00 00 00 00 02 D0 72 + 15 01 00 00 00 00 02 D1 02 + 15 01 00 00 00 00 02 D2 AC + 15 01 00 00 00 00 02 D3 02 + 15 01 00 00 00 00 02 D4 CF + 15 01 00 00 00 00 02 D5 02 + 15 01 00 00 00 00 02 D6 FE + 15 01 00 00 00 00 02 D7 03 + 15 01 00 00 00 00 02 D8 1C + 15 01 00 00 00 00 02 D9 03 + 15 01 00 00 00 00 02 DA 45 + 15 01 00 00 00 00 02 DB 03 + 15 01 00 00 00 00 02 DC 51 + 15 01 00 00 00 00 02 DD 03 + 15 01 00 00 00 00 02 DE 5F + 15 01 00 00 00 00 02 DF 03 + 15 01 00 00 00 00 02 E0 6F + 15 01 00 00 00 00 02 E1 03 + 15 01 00 00 00 00 02 E2 81 + 15 01 00 00 00 00 02 E3 03 + 15 01 00 00 00 00 02 E4 97 + 15 01 00 00 00 00 02 E5 03 + 15 01 00 00 00 00 02 E6 AE + 15 01 00 00 00 00 02 E7 03 + 15 01 00 00 00 00 02 E8 CB + 15 01 00 00 00 00 02 E9 03 + 15 01 00 00 00 00 02 EA D1 + 15 01 00 00 00 00 02 FF 00 + 05 01 00 00 96 00 01 11 + 15 01 00 00 00 00 02 D3 05]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 64 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + somc,mdss-dsi-cabc-early-on-command = [39 01 00 00 00 00 03 51 0F FF + 15 01 00 00 00 00 02 53 24 + 15 01 00 00 00 00 02 55 02]; + somc,mdss-dsi-cabc-late-off-command = [39 01 00 00 00 00 03 51 00 00 + 15 01 00 00 00 00 02 55 00 + 15 01 00 00 00 00 02 53 20]; + somc,mdss-dsi-cabc-enabled = <0>; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3A 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <1>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <1236000 1395000>; + somc,disp-en-on-pre = <25>; + somc,pw-on-rst-seq = <0 60>, <1 10>; + somc,disp-en-off-post = <50>; + somc,pw-off-rst-b-seq = <0 10>; + + somc,mdss-dsi-pre-uv-command = [15 01 00 00 00 00 02 FF 00]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DB]; + somc,mdss-dsi-uv-param-type = <2>; + somc,mdss-dsi-pcc-table-size = <73>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x10 0x13 0x28 0x2B 0x8000 0x7400 0x8000 + 0x00 0x02 0x14 0x17 0x28 0x2B 0x7a80 0x7400 0x7e00 + 0x00 0x03 0x18 0x1B 0x28 0x2B 0x7480 0x7380 0x8000 + 0x00 0x04 0x1C 0x1F 0x28 0x2B 0x7280 0x7380 0x8000 + 0x00 0x05 0x20 0x23 0x28 0x2B 0x6e00 0x7400 0x8000 + 0x00 0x06 0x0C 0x0F 0x24 0x27 0x7f80 0x7200 0x7c00 + 0x00 0x07 0x10 0x13 0x24 0x27 0x8000 0x7400 0x7d80 + 0x00 0x08 0x14 0x17 0x24 0x27 0x7d00 0x7700 0x7e00 + 0x00 0x09 0x18 0x1B 0x24 0x27 0x7700 0x7600 0x8000 + 0x00 0x0A 0x1C 0x1F 0x24 0x27 0x7380 0x7500 0x7c00 + 0x00 0x0B 0x20 0x23 0x24 0x27 0x6f00 0x7500 0x7e80 + 0x00 0x0C 0x0C 0x0F 0x20 0x23 0x7f80 0x7200 0x7900 + 0x00 0x0D 0x10 0x13 0x20 0x23 0x8000 0x7400 0x7b00 + 0x00 0x0E 0x14 0x17 0x20 0x23 0x7a80 0x7400 0x7b00 + 0x00 0x0F 0x18 0x1B 0x20 0x23 0x7800 0x7700 0x7e80 + 0x00 0x10 0x1C 0x1F 0x20 0x23 0x7780 0x7900 0x7f80 + 0x00 0x11 0x20 0x23 0x20 0x23 0x7300 0x7900 0x7f00 + 0x00 0x12 0x24 0x27 0x20 0x23 0x7100 0x7980 0x8000 + 0x00 0x13 0x0C 0x0F 0x1C 0x1F 0x7f80 0x7200 0x7700 + 0x00 0x14 0x10 0x13 0x1C 0x1F 0x7c00 0x7000 0x7580 + 0x00 0x15 0x14 0x17 0x1C 0x1F 0x7f80 0x7900 0x7e00 + 0x00 0x16 0x18 0x1B 0x1C 0x1F 0x7c00 0x7a00 0x7d80 + 0x00 0x17 0x1C 0x1F 0x1C 0x1F 0x7900 0x7a00 0x7e00 + 0x00 0x18 0x20 0x23 0x1C 0x1F 0x7600 0x7c80 0x8000 + 0x00 0x19 0x24 0x27 0x1C 0x1F 0x7300 0x7c00 0x7e80 + 0x00 0x1A 0x0C 0x0F 0x18 0x1B 0x8000 0x7200 0x7300 + 0x00 0x1B 0x10 0x13 0x18 0x1B 0x7e80 0x7200 0x7500 + 0x00 0x1C 0x14 0x17 0x18 0x1B 0x7f00 0x7900 0x7b80 + 0x00 0x1D 0x18 0x1B 0x18 0x1B 0x7f00 0x7d00 0x7e00 + 0x00 0x1E 0x1C 0x1F 0x18 0x1B 0x7d00 0x7d80 0x8000 + 0x00 0x1F 0x20 0x23 0x18 0x1B 0x7900 0x7f00 0x8000 + 0x00 0x20 0x24 0x27 0x18 0x1B 0x7780 0x8000 0x8000 + 0x00 0x21 0x10 0x13 0x14 0x17 0x7f80 0x7380 0x7200 + 0x00 0x22 0x14 0x17 0x14 0x17 0x7f00 0x7900 0x7900 + 0x00 0x23 0x18 0x1B 0x14 0x17 0x7f00 0x7d00 0x7b80 + 0xFF 0x00 0x1C 0x1F 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x24 0x20 0x23 0x14 0x17 0x7a00 0x8000 0x7e80 + 0x00 0x25 0x24 0x27 0x14 0x17 0x7780 0x8000 0x7d80 + 0x00 0x26 0x10 0x13 0x10 0x13 0x8000 0x7400 0x7000 + 0x00 0x27 0x14 0x17 0x10 0x13 0x7f80 0x7900 0x7680 + 0x00 0x28 0x18 0x1B 0x10 0x13 0x8000 0x7d80 0x7980 + 0x00 0x29 0x1C 0x1F 0x10 0x13 0x8000 0x8000 0x7c00 + 0x00 0x2A 0x20 0x23 0x10 0x13 0x7a00 0x8000 0x7c00 + 0x00 0x2B 0x10 0x13 0x0C 0x0F 0x7f80 0x7480 0x6f00 + 0x00 0x2C 0x14 0x17 0x0C 0x0F 0x7f80 0x7900 0x7400 + 0x00 0x2D 0x18 0x1B 0x0C 0x0F 0x7f80 0x7d80 0x7680 + 0x00 0x2E 0x1C 0x1F 0x0C 0x0F 0x8000 0x8000 0x7980 + 0x01 0x00 0x00 0x09 0x32 0x3B 0x8000 0x6D00 0x8000 + 0x02 0x00 0x0A 0x13 0x32 0x3B 0x7A00 0x7100 0x8000 + 0x03 0x00 0x14 0x1D 0x32 0x3B 0x7400 0x7180 0x8000 + 0x04 0x00 0x1E 0x27 0x32 0x3B 0x7100 0x7200 0x8000 + 0x05 0x00 0x28 0x31 0x32 0x3B 0x6C80 0x7180 0x8000 + 0x06 0x00 0x32 0x3B 0x32 0x3B 0x6680 0x7300 0x8000 + 0x07 0x00 0x00 0x09 0x28 0x31 0x8000 0x6B80 0x7080 + 0x08 0x00 0x0A 0x13 0x28 0x31 0x8000 0x7400 0x8000 + 0x09 0x00 0x14 0x1D 0x28 0x31 0x7A00 0x7700 0x8000 + 0x0A 0x00 0x1E 0x27 0x28 0x31 0x7600 0x7780 0x8000 + 0x0B 0x00 0x28 0x31 0x28 0x31 0x6F80 0x7980 0x8000 + 0x0C 0x00 0x32 0x3B 0x28 0x31 0x7080 0x7E80 0x8000 + 0x0D 0x00 0x00 0x09 0x14 0x27 0x8000 0x6B00 0x6D00 + 0x0E 0x00 0x0A 0x13 0x14 0x27 0x8000 0x7380 0x7480 + 0xFF 0x00 0x14 0x27 0x14 0x27 0x8000 0x8000 0x8000 + 0x10 0x00 0x28 0x31 0x14 0x27 0x7500 0x8000 0x7E80 + 0x11 0x00 0x32 0x3B 0x14 0x27 0x7100 0x8000 0x7C80 + 0x12 0x00 0x00 0x09 0x00 0x09 0x8000 0x6900 0x6500 + 0x13 0x00 0x00 0x13 0x0A 0x13 0x8000 0x7300 0x6F00 + 0x13 0x00 0x0A 0x13 0x00 0x09 0x8000 0x7300 0x6F00 + 0x14 0x00 0x14 0x27 0x0A 0x13 0x7F00 0x8000 0x7900 + 0x15 0x00 0x14 0x27 0x00 0x09 0x7E80 0x8000 0x7680 + 0x16 0x00 0x28 0x31 0x0A 0x13 0x7380 0x8000 0x7600 + 0x17 0x00 0x32 0x3B 0x0A 0x13 0x7080 0x8000 0x7900 + 0x18 0x00 0x28 0x31 0x00 0x09 0x7A00 0x8000 0x7580 + 0x19 0x00 0x32 0x3B 0x00 0x09 0x6F00 0x8000 0x7200>; + }; + + dsi_novatek_auo_1080_vid: somc,novatek_auo_1080p_panel { + qcom,mdss-dsi-panel-name = "auo novatek 1080p video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <104>; + qcom,mdss-dsi-h-back-porch = <56>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <46>; + qcom,mdss-dsi-v-front-porch = <6>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 93 06 + 15 01 00 00 00 00 02 94 30 + 15 01 00 00 00 00 02 FF 00 + 15 01 00 00 00 00 02 FF 01 + 15 01 00 00 00 00 02 01 55 + 15 01 00 00 00 00 02 15 0F + 15 01 00 00 00 00 02 16 0F + 15 01 00 00 00 00 02 1B 1B + 15 01 00 00 00 00 02 1C F7 + 15 01 00 00 00 00 02 60 0F + 15 01 00 00 00 00 02 58 82 + 15 01 00 00 00 00 02 59 00 + 15 01 00 00 00 00 02 5A 02 + 15 01 00 00 00 00 02 5B 00 + 15 01 00 00 00 00 02 5C 82 + 15 01 00 00 00 00 02 5D 80 + 15 01 00 00 00 00 02 5E 02 + 15 01 00 00 00 00 02 5F 00 + 15 01 00 00 00 00 02 66 01 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 05 + 15 01 00 00 00 00 02 54 75 + 15 01 00 00 00 00 02 85 05 + 15 01 00 00 00 00 02 A6 04 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF FF + 15 01 00 00 00 00 02 4F 03 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 00 + 15 01 00 00 00 00 02 35 01 + 15 01 00 00 00 00 02 D3 30 + 15 01 00 00 00 00 02 D4 06 + 05 01 00 00 64 00 01 11]; + qcom,mdss-dsi-on-command = [05 01 00 00 64 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 64 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3C 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <1>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <1420000 1594000>; + somc,disp-en-on-post = <20>; + somc,disp-en-off-post = <70>; + somc,pw-on-rst-seq = <1 10>; + somc,pw-off-rst-seq = <0 0>; + + somc,mdss-dsi-pre-uv-command = [15 01 00 00 00 00 02 FF 00]; + somc,mdss-dsi-uv-command = [06 01 00 00 00 00 01 DA + 06 01 00 00 00 00 01 DC]; + somc,mdss-dsi-uv-param-type = <2>; + somc,mdss-dsi-pcc-table-size = <73>; + somc,mdss-dsi-pcc-table = < + 0x00 0x01 0x10 0x13 0x28 0x2B 0x8000 0x7400 0x8000 + 0x00 0x02 0x14 0x17 0x28 0x2B 0x7a80 0x7400 0x7e00 + 0x00 0x03 0x18 0x1B 0x28 0x2B 0x7480 0x7380 0x8000 + 0x00 0x04 0x1C 0x1F 0x28 0x2B 0x7280 0x7380 0x8000 + 0x00 0x05 0x20 0x23 0x28 0x2B 0x6e00 0x7400 0x8000 + 0x00 0x06 0x0C 0x0F 0x24 0x27 0x7f80 0x7200 0x7c00 + 0x00 0x07 0x10 0x13 0x24 0x27 0x8000 0x7400 0x7d80 + 0x00 0x08 0x14 0x17 0x24 0x27 0x7d00 0x7700 0x7e00 + 0x00 0x09 0x18 0x1B 0x24 0x27 0x7700 0x7600 0x8000 + 0x00 0x0A 0x1C 0x1F 0x24 0x27 0x7380 0x7500 0x7c00 + 0x00 0x0B 0x20 0x23 0x24 0x27 0x6f00 0x7500 0x7e80 + 0x00 0x0C 0x0C 0x0F 0x20 0x23 0x7f80 0x7200 0x7900 + 0x00 0x0D 0x10 0x13 0x20 0x23 0x8000 0x7400 0x7b00 + 0x00 0x0E 0x14 0x17 0x20 0x23 0x7a80 0x7400 0x7b00 + 0x00 0x0F 0x18 0x1B 0x20 0x23 0x7800 0x7700 0x7e80 + 0x00 0x10 0x1C 0x1F 0x20 0x23 0x7780 0x7900 0x7f80 + 0x00 0x11 0x20 0x23 0x20 0x23 0x7300 0x7900 0x7f00 + 0x00 0x12 0x24 0x27 0x20 0x23 0x7100 0x7980 0x8000 + 0x00 0x13 0x0C 0x0F 0x1C 0x1F 0x7f80 0x7200 0x7700 + 0x00 0x14 0x10 0x13 0x1C 0x1F 0x7c00 0x7000 0x7580 + 0x00 0x15 0x14 0x17 0x1C 0x1F 0x7f80 0x7900 0x7e00 + 0x00 0x16 0x18 0x1B 0x1C 0x1F 0x7c00 0x7a00 0x7d80 + 0x00 0x17 0x1C 0x1F 0x1C 0x1F 0x7900 0x7a00 0x7e00 + 0x00 0x18 0x20 0x23 0x1C 0x1F 0x7600 0x7c80 0x8000 + 0x00 0x19 0x24 0x27 0x1C 0x1F 0x7300 0x7c00 0x7e80 + 0x00 0x1A 0x0C 0x0F 0x18 0x1B 0x8000 0x7200 0x7300 + 0x00 0x1B 0x10 0x13 0x18 0x1B 0x7e80 0x7200 0x7500 + 0x00 0x1C 0x14 0x17 0x18 0x1B 0x7f00 0x7900 0x7b80 + 0x00 0x1D 0x18 0x1B 0x18 0x1B 0x7f00 0x7d00 0x7e00 + 0x00 0x1E 0x1C 0x1F 0x18 0x1B 0x7d00 0x7d80 0x8000 + 0x00 0x1F 0x20 0x23 0x18 0x1B 0x7900 0x7f00 0x8000 + 0x00 0x20 0x24 0x27 0x18 0x1B 0x7780 0x8000 0x8000 + 0x00 0x21 0x10 0x13 0x14 0x17 0x7f80 0x7380 0x7200 + 0x00 0x22 0x14 0x17 0x14 0x17 0x7f00 0x7900 0x7900 + 0x00 0x23 0x18 0x1B 0x14 0x17 0x7f00 0x7d00 0x7b80 + 0xFF 0x00 0x1C 0x1F 0x14 0x17 0x8000 0x8000 0x8000 + 0x00 0x24 0x20 0x23 0x14 0x17 0x7a00 0x8000 0x7e80 + 0x00 0x25 0x24 0x27 0x14 0x17 0x7780 0x8000 0x7d80 + 0x00 0x26 0x10 0x13 0x10 0x13 0x8000 0x7400 0x7000 + 0x00 0x27 0x14 0x17 0x10 0x13 0x7f80 0x7900 0x7680 + 0x00 0x28 0x18 0x1B 0x10 0x13 0x8000 0x7d80 0x7980 + 0x00 0x29 0x1C 0x1F 0x10 0x13 0x8000 0x8000 0x7c00 + 0x00 0x2A 0x20 0x23 0x10 0x13 0x7a00 0x8000 0x7c00 + 0x00 0x2B 0x10 0x13 0x0C 0x0F 0x7f80 0x7480 0x6f00 + 0x00 0x2C 0x14 0x17 0x0C 0x0F 0x7f80 0x7900 0x7400 + 0x00 0x2D 0x18 0x1B 0x0C 0x0F 0x7f80 0x7d80 0x7680 + 0x00 0x2E 0x1C 0x1F 0x0C 0x0F 0x8000 0x8000 0x7980 + 0x01 0x00 0x00 0x09 0x32 0x3B 0x8000 0x6D00 0x8000 + 0x02 0x00 0x0A 0x13 0x32 0x3B 0x7A00 0x7100 0x8000 + 0x03 0x00 0x14 0x1D 0x32 0x3B 0x7400 0x7180 0x8000 + 0x04 0x00 0x1E 0x27 0x32 0x3B 0x7100 0x7200 0x8000 + 0x05 0x00 0x28 0x31 0x32 0x3B 0x6C80 0x7180 0x8000 + 0x06 0x00 0x32 0x3B 0x32 0x3B 0x6680 0x7300 0x8000 + 0x07 0x00 0x00 0x09 0x28 0x31 0x8000 0x6B80 0x7080 + 0x08 0x00 0x0A 0x13 0x28 0x31 0x8000 0x7400 0x8000 + 0x09 0x00 0x14 0x1D 0x28 0x31 0x7A00 0x7700 0x8000 + 0x0A 0x00 0x1E 0x27 0x28 0x31 0x7600 0x7780 0x8000 + 0x0B 0x00 0x28 0x31 0x28 0x31 0x6F80 0x7980 0x8000 + 0x0C 0x00 0x32 0x3B 0x28 0x31 0x7080 0x7E80 0x8000 + 0x0D 0x00 0x00 0x09 0x14 0x27 0x8000 0x6B00 0x6D00 + 0x0E 0x00 0x0A 0x13 0x14 0x27 0x8000 0x7380 0x7480 + 0xFF 0x00 0x14 0x27 0x14 0x27 0x8000 0x8000 0x8000 + 0x10 0x00 0x28 0x31 0x14 0x27 0x7500 0x8000 0x7E80 + 0x11 0x00 0x32 0x3B 0x14 0x27 0x7100 0x8000 0x7C80 + 0x12 0x00 0x00 0x09 0x00 0x09 0x8000 0x6900 0x6500 + 0x13 0x00 0x00 0x13 0x0A 0x13 0x8000 0x7300 0x6F00 + 0x13 0x00 0x0A 0x13 0x00 0x09 0x8000 0x7300 0x6F00 + 0x14 0x00 0x14 0x27 0x0A 0x13 0x7F00 0x8000 0x7900 + 0x15 0x00 0x14 0x27 0x00 0x09 0x7E80 0x8000 0x7680 + 0x16 0x00 0x28 0x31 0x0A 0x13 0x7380 0x8000 0x7600 + 0x17 0x00 0x32 0x3B 0x0A 0x13 0x7080 0x8000 0x7900 + 0x18 0x00 0x28 0x31 0x00 0x09 0x7A00 0x8000 0x7580 + 0x19 0x00 0x32 0x3B 0x00 0x09 0x6F00 0x8000 0x7200>; + }; + + dsi_default_gpio_0: somc,default_panel_0 { + qcom,mdss-dsi-panel-name = "default renesas video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <128>; + qcom,mdss-dsi-h-back-porch = <76>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <3>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [23 01 00 00 00 00 02 B0 04 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 D6 01 + 29 01 00 00 00 00 03 C0 0F 0F + 29 01 00 00 00 00 03 EC 00 10 + 29 01 00 00 00 00 19 C7 + 05 19 22 2B 38 51 41 50 5C 64 6B 74 + 0F 23 2B 32 3F 52 44 55 61 69 70 77 + 29 01 00 00 00 00 19 C8 + 03 18 21 2B 38 51 42 4F 5D 65 6C 74 + 0D 22 2A 32 3E 52 41 54 5D 66 6D 77 + 29 01 00 00 00 00 19 C9 + 00 15 1E 28 36 50 42 50 5E 66 6D 74 + 0A 1F 27 2F 3D 51 41 55 5E 67 6E 77 + 05 01 00 00 00 00 01 11]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 6E 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + somc,mdss-dsi-cabc-early-on-command = [39 01 00 00 00 00 03 51 0F FF + 15 01 00 00 00 00 02 53 24 + 15 01 00 00 00 00 02 55 02]; + somc,mdss-dsi-cabc-late-off-command = [39 01 00 00 00 00 03 51 00 00 + 15 01 00 00 00 00 02 55 00 + 15 01 00 00 00 00 02 53 20]; + somc,mdss-dsi-cabc-enabled = <0>; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3A 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <0>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-pre = <25>; + somc,pw-on-rst-seq = <0 60>, <1 10>; + somc,disp-en-off-post = <50>; + somc,pw-off-rst-b-seq = <0 10>; + }; + + dsi_default_gpio_1: somc,default_panel_1 { + qcom,mdss-dsi-panel-name = "default renesas video"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-panel-destination = "display_1"; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <1920>; + qcom,mdss-dsi-h-front-porch = <128>; + qcom,mdss-dsi-h-back-porch = <76>; + qcom,mdss-dsi-h-pulse-width = <4>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <3>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + somc,mdss-dsi-init-command = [23 01 00 00 00 00 02 B0 04 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 00 00 + 23 01 00 00 00 00 02 D6 01 + 29 01 00 00 00 00 03 C0 0F 0F + 29 01 00 00 00 00 03 EC 00 10 + 29 01 00 00 00 00 19 C7 + 05 19 22 2B 38 51 41 50 5C 64 6B 74 + 0F 23 2B 32 3F 52 44 55 61 69 70 77 + 29 01 00 00 00 00 19 C8 + 03 18 21 2B 38 51 42 4F 5D 65 6C 74 + 0D 22 2A 32 3E 52 41 54 5D 66 6D 77 + 29 01 00 00 00 00 19 C9 + 00 15 1E 28 36 50 42 50 5E 66 6D 74 + 0A 1F 27 2F 3D 51 41 55 5E 67 6E 77 + 05 01 00 00 00 00 01 11]; + qcom,mdss-dsi-on-command = [05 01 00 00 00 00 01 29]; + qcom,mdss-dsi-off-command = [05 01 00 00 14 00 01 28 + 05 01 00 00 6E 00 01 10]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + + somc,mdss-dsi-cabc-early-on-command = [39 01 00 00 00 00 03 51 0F FF + 15 01 00 00 00 00 02 53 24 + 15 01 00 00 00 00 02 55 02]; + somc,mdss-dsi-cabc-late-off-command = [39 01 00 00 00 00 03 51 00 00 + 15 01 00 00 00 00 02 55 00 + 15 01 00 00 00 00 02 53 20]; + somc,mdss-dsi-cabc-enabled = <0>; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-panel-timings = [E6 38 26 00 68 6C 2A 3A 2C 03 04 00]; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-t-clk-post = <0x02>; + qcom,mdss-dsi-t-clk-pre = <0x2B>; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; + qcom,cont-splash-enabled; + + somc,driver-ic = <0>; + somc,dric-gpio = <&msmgpio 26 0>; + somc,mul-channel-scaling = <3>; + somc,mdss-phy-size-mm = <64 114>; + somc,mdss-dsi-lane-config = [00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 c2 ef 00 00 00 00 01 75 + 00 02 45 00 00 00 00 01 97]; + somc,mdss-dsi-disp-on-in-hs = <1>; + somc,mdss-dsi-wait-time-before-on-cmd = <150>; + somc,lcd-id = <1>; + somc,lcd-id-adc = <0 0x7fffffff>; + somc,disp-en-on-pre = <25>; + somc,pw-on-rst-seq = <0 60>, <1 10>; + somc,disp-en-off-post = <50>; + somc,pw-off-rst-b-seq = <0 10>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm-pm8941.dtsi b/arch/arm/boot/dts/qcom/msm-pm8941.dtsi index b9ce3be6429..c1634e143df 100644 --- a/arch/arm/boot/dts/qcom/msm-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom/msm-pm8941.dtsi @@ -1,4 +1,5 @@ /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications AB. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -60,7 +61,8 @@ qcom,pull-up = <1>; linux,code = <116>; }; - + /* Disable RESIN shutdown here, we set it in boot code */ +/* qcom,pon_2 { qcom,pon-type = <1>; qcom,support-reset = <1>; @@ -71,7 +73,7 @@ linux,code = <114>; qcom,use-bark; }; - +*/ qcom,pon_3 { qcom,pon-type = <3>; qcom,support-reset = <1>; @@ -215,7 +217,6 @@ qcom,chg-vadc = <&pm8941_vadc>; qcom,chg-iadc = <&pm8941_iadc>; qcom,chg-adc_tm = <&pm8941_adc_tm>; - qcom,ibat-calibration-enabled; qcom,chgr@1000 { status = "disabled"; diff --git a/arch/arm/boot/dts/qcom/msm8974-mdss.dtsi b/arch/arm/boot/dts/qcom/msm8974-mdss.dtsi index f45ea6b046c..cdfb358fb95 100644 --- a/arch/arm/boot/dts/qcom/msm8974-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/msm8974-mdss.dtsi @@ -315,7 +315,6 @@ qcom,enable-load = <0 0 300000 0>; qcom,disable-load = <0 0 0 0>; - qcom,hdmi-tx-cec = <&msmgpio 31 0>; qcom,hdmi-tx-ddc-clk = <&msmgpio 32 0>; qcom,hdmi-tx-ddc-data = <&msmgpio 33 0>; qcom,hdmi-tx-hpd = <&msmgpio 34 0>; diff --git a/arch/arm/boot/dts/qcom/msm8974-mtp.dtsi b/arch/arm/boot/dts/qcom/msm8974-mtp.dtsi index 0ed96fc5595..a69f3e7599f 100644 --- a/arch/arm/boot/dts/qcom/msm8974-mtp.dtsi +++ b/arch/arm/boot/dts/qcom/msm8974-mtp.dtsi @@ -1,4 +1,5 @@ /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications AB. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -10,7 +11,7 @@ * GNU General Public License for more details. */ -#include "msm8974-camera-sensor-mtp.dtsi" +/* #include "msm8974-camera-sensor-mtp.dtsi" */ #include "msm8974-leds.dtsi" / { @@ -377,15 +378,16 @@ qcom,otg-capability; }; -/ { - mtp_batterydata: qcom,battery-data { - qcom,rpull-up-kohm = <100>; - qcom,vref-batt-therm = <1800000>; - - #include "batterydata-palladium.dtsi" - #include "batterydata-mtp-3000mah.dtsi" - }; -}; +/* / { + * mtp_batterydata: qcom,battery-data { + * qcom,rpull-up-kohm = <100>; + * qcom,vref-batt-therm = <1800000>; + * + * #include "batterydata-palladium.dtsi" + * #include "batterydata-mtp-3000mah.dtsi" + * }; + *}; + */ &pm8941_bms { qcom,enable-fcc-learning; @@ -394,13 +396,13 @@ qcom,min-fcc-learning-samples = <5>; qcom,fcc-resolution = <10>; status = "ok"; - qcom,battery-data = <&mtp_batterydata>; + /* qcom,battery-data = <&mtp_batterydata>; */ }; &pm8941_chg { status = "ok"; - qcom,charging-disabled; - qcom,battery-data = <&mtp_batterydata>; + /* qcom,charging-disabled; */ + /* qcom,battery-data = <&mtp_batterydata>; */ qcom,chgr@1000 { status = "ok"; @@ -705,6 +707,7 @@ }; }; +/* &slim_msm { taiko_codec { qcom,cdc-micbias1-ext-cap; @@ -713,6 +716,7 @@ qcom,cdc-micbias4-ext-cap; }; }; +*/ &spi_epm { epm-adc@0 { diff --git a/arch/arm/boot/dts/qcom/msm8974-v2.2.dtsi b/arch/arm/boot/dts/qcom/msm8974-v2.2.dtsi index 275ac4cab72..bfc2c60c145 100644 --- a/arch/arm/boot/dts/qcom/msm8974-v2.2.dtsi +++ b/arch/arm/boot/dts/qcom/msm8974-v2.2.dtsi @@ -96,4 +96,6 @@ &gdsc_venus { qcom,skip-logic-collapse; + qcom,retain-periph; + qcom,retain-mem; }; diff --git a/arch/arm/boot/dts/qcom/msm8974.dtsi b/arch/arm/boot/dts/qcom/msm8974.dtsi index 9e6642863fd..c41e01f810c 100644 --- a/arch/arm/boot/dts/qcom/msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/msm8974.dtsi @@ -1,4 +1,5 @@ /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications AB. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -867,6 +868,9 @@ qcom,cdc-mclk-gpios = <&pm8941_gpios 15 0>; qcom,taiko-mclk-clk-freq = <9600000>; + + qcom,hdmi-audio-rx; + qcom,prim-auxpcm-gpio-clk = <&msmgpio 65 0>; qcom,prim-auxpcm-gpio-sync = <&msmgpio 66 0>; qcom,prim-auxpcm-gpio-din = <&msmgpio 67 0>; @@ -876,6 +880,7 @@ qcom,sec-auxpcm-gpio-sync = <&msmgpio 80 0>; qcom,sec-auxpcm-gpio-din = <&msmgpio 81 0>; qcom,sec-auxpcm-gpio-dout = <&msmgpio 82 0>; + qcom,5-pole-jack; }; spmi_bus: qcom,spmi@fc4c0000 { diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dts b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dts new file mode 100644 index 00000000000..a3ef4ad2cf2 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dts @@ -0,0 +1,31 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dts + * + * Copyright (c) 2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Shougo Watanabe + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ab-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ab-shinano_common.dtsi" +/include/ "msm8974pro-ab-shinano_castor_common.dtsi" +/include/ "msm8974pro-ab-shinano_castor.dtsi" +/include/ "dsi-panel-castor.dtsi" + +/ { + model = "SoMC Castor ROW"; + compatible = "somc,castor-row", "qcom,msm8974"; + qcom,board-id = <8 0>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dtsi new file mode 100644 index 00000000000..e6b957ad912 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dtsi @@ -0,0 +1,145 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor.dtsi + * + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Shougo Watanabe + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; + + /* I2C : BLSP11 */ + i2c@f9967000 { + ad7146@2f { + compatible = "AD,ad7146"; + interrupt-parent = <&spmi_bus>; + reg = <0x2f 0>; + interrupts = <0x0 0xc8 0x0>; /* PM8941 GPIO 9 */ + interrupt-name = "ad7146_irq_gpio"; + prox_vdd-supply = <&pm8941_l19>; + prox_vdd-supply_name = "prox_vdd"; + AD,irq_gpio = <&pm8941_gpios 9 0x00>; + pad,amb_comp_ctrl0 = <0x30FB>; + pad,amb_comp_ctrl1 = <0x01FF>; + pad,amb_comp_ctrl2 = <0x05FF>; + pad,mod_freq_ctrl = <0x0D01>; + pad,stage0-connect1 = <0x3FBF>; + pad,stage0-connect2 = <0x1FDF>; + pad,stage0-afe = <0x0100>; + pad,stage0-sensitivity = <0x5454>; + pad,stage0-offset_l = <0x000A>; + pad,stage0-offset_h = <0x0018>; + pad,stage0-offset_l_clamp = <0x0018>; + pad,stage0-offset_h_clamp = <0x000A>; + pad,stage0-hysterisis = <40>; + pad,stage1-connect1 = <0x37FF>; + pad,stage1-connect2 = <0x1BFF>; + pad,stage1-afe = <0x1200>; + pad,stage1-sensitivity = <0x5454>; + pad,stage1-offset_l = <0x000A>; + pad,stage1-offset_h = <0x0070>; + pad,stage1-offset_l_clamp = <0x0070>; + pad,stage1-offset_h_clamp = <0x000A>; + pad,stage1-hysterisis = <10>; + status = "ok"; + }; + }; + + gpio_keys { + interrupt-parent = <&msmgpio>; + interrupts = <9 0>; + + sim_det { + label = "sim-detection"; + gpios = <&msmgpio 9 0x0>; + linux,input-type = <5>; + linux,code = <7>; + gpio-key,wakeup; + debounce-interval = <10>; + }; + }; + +}; + +&pm8941_lsid0 { + pm8941_iadc: iadc@3600 { + qcom,rsense = <10000000>; + }; +}; + +&sdcc1 { + qcom,bus-speed-mode = "DDR50", "DDR_1p8v"; +}; + +&sdcc2 { + qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50"; + qcom,current-limit = <400>; + qcom,pad-drv-on = <0x7 0x2 0x2>; /* 16mA, 6mA, 6mA */ +}; + +&sdhc_2 { + qcom,vdd-current-level = <400000 400000>; + qcom,pad-drv-on = <0x7 0x2 0x2>; /* 16mA, 6mA, 6mA */ +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,leds@d800 { + status = "disabled"; + qcom,wled_0 { + label = "wled"; + linux,name = "wled:backlight"; + linux,default-trigger = "bkl-trigger"; + qcom,cs-out-en = <1>; + qcom,cabc-en = <0>; + qcom,op-fdbck = <0>; + qcom,default-state = "on"; + qcom,max-current = <20>; + qcom,ctrl-delay-us = <0>; + qcom,boost-curr-lim = <3>; + qcom,cp-sel = <0>; + qcom,switch-freq = <2>; + qcom,ovp-val = <2>; + qcom,num-strings = <2>; + qcom,id = <0>; + }; + }; + }; +}; + +/* Regulator config */ +&pm8941_l9 { + status = "ok"; +}; + +&pm8941_l14 { + status = "ok"; +}; + +&pm8941_l15 { + status = "ok"; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor_common.dtsi new file mode 100644 index 00000000000..7906c517321 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor_common.dtsi @@ -0,0 +1,954 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_castor_common.dtsi + * + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* UART : BLSP7 */ + uart@f995d000 { + interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; + interrupts = <0 1 2>; + interrupt-map = <0 &intc 0 113 0 + 1 &intc 0 239 0 + 2 &msmgpio 42 0>; + }; + + /* UART : BLSP10 */ + serial@f9960000 { + compatible = "qcom,msm-lsuart-v14-irda"; + reg = <0xf9960000 0x1000>; + interrupts = <0 116 0>; + qcom,config-gpio = <1>; + qcom,tx-gpio = <&msmgpio 53 0x00>; + qcom,rx-gpio = <&msmgpio 54 0x00>; + status = "ok"; + }; + + ir-remote@1 { + compatible = "somc,ir-remote-device"; + reg = <0x1>; + ir_remote_en = <&pm8941_mpps 5 0x00>; + status = "ok"; + }; + + /* I2C : BLSP2 */ + i2c@f9924000 { + cell-index = <2>; + qcom,i2c-bus-freq = <355000>; + status = "ok"; + }; + + /* I2C : BLSP8 */ + i2c@f9964000 { + cell-index = <8>; + compatible = "qcom,i2c-qup"; + reg = <0xf9964000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "qup_phys_addr"; + interrupts = <0 102 0>; + interrupt-names = "qup_err_intr"; + qcom,i2c-bus-freq = <355000>; + qcom,i2c-src-freq = <50000000>; + qcom,scl-gpio = <&msmgpio 48 0x00>; + qcom,sda-gpio = <&msmgpio 47 0x00>; + qcom,master-id = <84>; + status = "ok"; + synaptics_clearpad@2c { + compatible = "synaptics,clearpad"; + reg = <0x2c>; + interrupt-parent = <&msmgpio>; + interrupts = <86 0x2>; + touch_vdd-supply = <&pm8941_l22>; + touch_vio-supply = <&pm8941_lvs3>; + synaptics,irq_gpio = <&msmgpio 86 0x00>; + chip_id = <0x37>; + num_sensor_rx = <46>; + num_sensor_tx = <26>; + charger_supported = <1>; + pen_supported = <0>; + glove_supported = <0>; + cover_supported = <0>; + touch_pressure_enabled = <1>; + touch_size_enabled = <0>; + touch_orientation_enabled = <0>; + preset_x_max = <1919>; + preset_y_max = <1199>; + preset_n_fingers = <10>; + por_delay_after = <200>; + wakeup_gesture_supported = <1>; + wakeup_gesture_large_panel = <1>; + wakeup_gesture_lpm_disabled = <0>; + wakeup_gesture_timeout = <2000>; + wakeup_gesture { + double_tap { + gesture_code = <0x0001>; + event_00 { + type = <2>; /* LOG */ + message = "=== DOUBLE TAP ==="; + }; + event_01 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <1>; + }; + event_02 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <0>; + }; + event_03 { + type = <99>; /* END */ + }; + }; + }; + }; + }; + + /* I2C : BLSP11 */ + i2c@f9967000 { + ti_lp855x@2c { + compatible = "Texas Instruments,lp855x"; + reg = <0x2c>; + status = "ok"; + bl_enable = <&msmgpio 69 0>; + linux,name = "lp8556"; + linux,default-trigger = "bkl-trigger"; + mode = "register based"; + chip_name = "lp8556"; + max_br = <0xff>; + init_br = <0x3f>; + cfg3_reg = <0x5e>; + eprom@98 { + addr = <0x98>; + data = <0x16>; + }; + eprom@9e { + addr = <0x9e>; + data = <0x22>; + }; + eprom@a0 { + addr = <0xa0>; + data = <0xff>; + }; + eprom@a1 { + addr = <0xa1>; + data = <0x3f>; + }; + eprom@a2 { + addr = <0xa2>; + data = <0x20>; + }; + eprom@a4 { + addr = <0xa4>; + data = <0x02>; + }; + eprom@a5 { + addr = <0xa5>; + data = <0x04>; + }; + eprom@a6 { + addr = <0xa6>; + data = <0x80>; + }; + eprom@a7 { + addr = <0xa7>; + data = <0xf7>; + }; + eprom@a8 { + addr = <0xa8>; + data = <0x24>; + }; + eprom@a9 { + addr = <0xa9>; + data = <0x80>; + }; + eprom@aa { + addr = <0xaa>; + data = <0x0f>; + }; + eprom@ae { + addr = <0xae>; + data = <0x0f>; + }; + }; + }; + + qcom,cci@fda0C000 { + qcom,cci-master0 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,cci-master1 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,camera@20 { + compatible = "qcom,sony_camera_0"; + reg = <0x20 0x0>; + status = "ok"; + qcom,slave-id = <0x20 0x0 0x0000>; + qcom,csiphy-sd-index = <0>; + qcom,csid-sd-index = <0>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_0"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + cam_vaf-supply = <&pm8941_l23>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio", + "cam_vaf"; + qcom,cam-vreg-type = <0 0 1 0>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-op-mode = <105000 85600 0 300000>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 15 0>, + <&msmgpio 94 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x1F>; + qcom,sensor-position = <0>; + qcom,sensor-mode = <1>; + qcom,cci-master = <0>; + sony,i2c_addr = <0x20>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <2048>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "SOI08BS2"; + default_module_name = "SOI08BS2"; + + GENERIC { + mount_angle = <180>; + sensor_rotation = <180>; + sensor_facing = <0>; + pixel_number_w = <3280>; + pixel_number_h = <2464>; + diagonal_len = "4.595"; + unit_cell_size = "1.12"; + min_f_number = "2.40"; + max_f_number = "2.40"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SOI08BS2 { + mount_angle = <180>; + sensor_rotation = <180>; + sensor_facing = <0>; + pixel_number_w = <3280>; + pixel_number_h = <2464>; + diagonal_len = "4.595"; + unit_cell_size = "1.12"; + min_f_number = "2.40"; + max_f_number = "2.40"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + qcom,camera@6c { + compatible = "qcom,sony_camera_1"; + reg = <0x6c 0x0>; + status = "ok"; + qcom,slave-id = <0x6c 0x0000 0x0000>; + qcom,csiphy-sd-index = <2>; + qcom,csid-sd-index = <2>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_1"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio"; + qcom,cam-vreg-type = <0 0 1>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0>; + qcom,cam-vreg-op-mode = <105000 85600 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 17 0>, + <&msmgpio 18 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x7>; + qcom,sensor-position = <1>; + qcom,sensor-mode = <1>; + qcom,cci-master = <1>; + sony,i2c_addr = <0x6c>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <1024>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "LGI02BN1", + "SEM02BN1"; + default_module_name = "SEM02BN1"; + + GENERIC { + mount_angle = <0>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + LGI02BN1 { + mount_angle = <0>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SEM02BN1 { + mount_angle = <0>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + /* disable Qualcomm camera sensors */ + qcom,camera@6e { + status = "disabled"; + }; + + qcom,camera@90 { + status = "disabled"; + }; + }; + + qcom,ion { + compatible = "qcom,msm-ion"; + + qcom,ion-heap@20 { /* CAMERA HEAP */ + compatible = "qcom,msm-ion-reserve"; + reg = <20>; + qcom,heap-align = <0x1000>; + qcom,memory-reservation-type = "EBI1"; /* reserve EBI memory */ + qcom,memory-reservation-size = <0x6400000>; + qcom,ion-heap-type = "CARVEOUT"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + + vol_dn { + label = "volume_down"; + gpios = <&pm8941_gpios 2 0x1>; + linux,input-type = <1>; + linux,code = <114>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + vol_up { + label = "volume_up"; + gpios = <&pm8941_gpios 5 0x1>; + linux,input-type = <1>; + linux,code = <115>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + }; + + sound { + qcom,audio-routing = + "RX_BIAS", "MCLK", + "LDO_H", "MCLK", + "AMIC5", "MCLK", + "AMIC6", "MCLK", + "Ext Spk Bottom Pos", "LINEOUT1", + "Ext Spk Bottom Neg", "LINEOUT3", + "Ext Spk Top Pos", "LINEOUT2", + "Ext Spk Top Neg", "LINEOUT4", + "AMIC1", "MIC BIAS1 External", + "MIC BIAS1 External", "Secondary Mic", + "AMIC2", "MIC BIAS2 External", + "MIC BIAS2 External", "Headset Mic", + "MIC BIAS2 External", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS3 External", + "MIC BIAS3 External", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1 External", + "MIC BIAS1 External", "Handset Mic"; + qcom,mbhc-audio-jack-type = "5-pole-jack"; + }; + + qcom,msm-pcm-bit { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <2>; + qcom,msm-pcm-bit; + }; + + qcom,msm-pcm-dsee { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <3>; + qcom,msm-pcm-dsee; + }; + + bu520x1nvx { + compatible = "rohm,bu520x1nvx"; + gpios = <&pm8941_gpios 36 0x1>; + }; + + nxp,tfa98xx-codec { + compatible = "nxp,tfa98xx-codec"; + }; +}; + +&pm8941_lsid0 { + pm8941_iadc: iadc@3600 { + qcom,rsense = <10000000>; + }; +}; + +&pm8941_chg { + qcom,vddmax-mv = <4350>; + qcom,vddsafe-mv = <4400>; + qcom,vinmin-mv = <4200>; + qcom,ibatmax-ma = <3000>; + qcom,ibatterm-ma = <300>; + qcom,ibatsafe-ma = <3000>; + qcom,maxinput-dc-ma = <1800>; + qcom,maxinput-dc-mv = <10000>; + qcom,maxinput-usb-ma = <1800>; + qcom,maxinput-usb-mv = <13000>; + qcom,thermal-mitigation = <3000 2500 2000 1500 1100 800 500 300 100 0>; + qcom,cool-bat-mv = <4350>; + qcom,ibatmax-warm-ma = <1800>; + qcom,warm-bat-mv = <4200>; + qcom,ibatmax-cool-ma = <1800>; + qcom,vbatdet-delta-mv = <70>; + qcom,tchg-mins = <512>; + qcom,vbatweak-mv = <3200>; + qcom,step-thresh-soc = <101>; + qcom,ibatmax-ma-under-step = <3000>; +}; + +&pm8941_bms { + qcom,v-cutoff-uv = <3200000>; + qcom,max-voltage-uv = <4350000>; + qcom,r-conn-mohm = <0>; + qcom,low-soc-calculate-soc-threshold = <15>; + qcom,low-soc-calculate-soc-ms = <1000>; + qcom,calculate-soc-ms = <30000>; + qcom,chg-term-ua = <300000>; + qcom,use-external-rsense; + qcom,batt-type = <3>; + qcom,use-ocv-thresholds; + qcom,ocv-voltage-high-threshold-uv = <3830000>; + qcom,ocv-voltage-low-threshold-uv = <3740000>; + qcom,shutdown-soc-valid-limit = <40>; + qcom,enable-fcc-learning; + qcom,min-fcc-learning-soc = <20>; + qcom,min-fcc-ocv-pc = <30>; + qcom,min-fcc-learning-samples = <5>; + qcom,fcc-resolution = <26>; + qcom,clamp-soc-max-count = <2>; +}; + +&pm8941_gpios { + /* GPIO_3: NC */ + gpio@c200 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_4: NC */ + gpio@c300 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_9: P_SENSOR_INT_N */ + gpio@c800 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_19: NC (DISP_RESET_N) */ + gpio@d200 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + /delete-property/ qcom,invert; + /delete-property/ somc,keep_high_at_init; + }; + + /* GPIO_20: LCD_DCDC_EN */ + gpio@d300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + somc,keep_high_at_init; + status = "ok"; + }; + + /* GPIO_25: P_SENSE_CNTL */ + gpio@d800 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <1>; /* OpenDrain NMOS */ + qcom,vin-sel = <0>; /* VPH */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <1>; /* High */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_36: ACC_COVER_OPEN */ + gpio@e300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; +}; + +&pm8941_mpps { + /* MPP_3: TXDAC0_VREF */ + /* Follow QCT */ + + /* MPP_5: IR_REMOTE_EN */ + mpp@a400 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* DOUT */ + qcom,vin-sel = <2>; /* S3 */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,vib@c000 { + status = "okay"; + compatible = "qcom,qpnp-vibrator"; + reg = <0xc000 0x100>; + label = "vibrator"; + qcom,qpnp-vib-vtg-level-mV = <3100>; + }; + + qcom,vibrator@c100 { + status = "disabled"; + }; + + qcom,vibrator@c200 { + status = "disabled"; + }; + + qcom,vibrator@c300 { + status = "disabled"; + }; + + qcom,vibrator@c400 { + status = "disabled"; + }; + + qcom,vibrator@c500 { + status = "disabled"; + }; + + qcom,vibrator@c600 { + status = "disabled"; + }; + + qcom,vibrator@c700 { + status = "disabled"; + }; + }; +}; + +&sdcc3 { + qcom,sup-voltages = <1800 2950>; + somc,use-for-wifi; + status = "ok"; +}; + +&sdhc_1 { + qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>; + qcom,bus-speed-mode = "DDR_1p8v"; + qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ +}; + +&sdhc_2 { + qcom,vdd-current-level = <400000 400000>; + qcom,pad-drv-on = <0x2 0x2 0x2>; /* 6mA, 6mA, 6mA */ +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,leds@d800 { + status = "disabled"; + }; + + qcom,leds@d000 { + status = "okay"; + qcom,rgb_sync = <1>; + + qcom,rgb_0 { + label = "rgb"; + linux,name = "led:rgb_red"; + qcom,mode = "pwm"; + qcom,pwm-channel = <6>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <74>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <3>; + linux,default-trigger = "none"; + }; + + qcom,rgb_1 { + label = "rgb"; + linux,name = "led:rgb_green"; + qcom,mode = "pwm"; + qcom,pwm-channel = <5>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <70>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <4>; + linux,default-trigger = "none"; + }; + + qcom,rgb_2 { + label = "rgb"; + linux,name = "led:rgb_blue"; + qcom,mode = "pwm"; + qcom,pwm-channel = <4>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <40>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <5>; + linux,default-trigger = "none"; + }; + }; + + qcom,leds@d300 { + status = "disabled"; + }; + + qcom,leds@e200 { + status = "disabled"; + }; + }; +}; + +/* Regulator config */ +&pm8941_l9 { + status = "disabled"; +}; + +&pm8941_l11 { + status = "ok"; +}; + +&pm8941_l14 { + status = "disabled"; +}; + +&pm8941_l15 { + status = "disabled"; +}; + +&pm8941_l18 { + regulator-always-on; +}; + +&pm8941_l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + qcom,init-voltage = <2850000>; + status = "ok"; +}; + +&pm8941_lvs1 { + regulator-always-on; +}; + +&usb3 { + current_system_max_limit = <1800>; +}; + +&mdss_fb0 { + qcom,memory-reservation-size = <0x1200000>; /* size 19MB */ +}; + +&mdss_dsi0 { + qcom,dsi-pref-prim-pan = <&dsi_default_gpio_0>; + vdd-supply = <>; + qcom,platform-enable-gpio = <&pm8941_gpios 20 0>; + qcom,platform-lane-config = []; + qcom,platform-supply-entry1 { + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry2 { + qcom,supply-name = "vdda"; + qcom,supply-min-voltage = <1200000>; + qcom,supply-max-voltage = <1200000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_common.dtsi new file mode 100644 index 00000000000..fc51172d628 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_common.dtsi @@ -0,0 +1,803 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_common.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + qcom,hdmi_tx@fd922100 { + status = "ok"; + }; + + /* UART : BLSP2 */ + serial@f991e000 { + status = "ok"; + }; + + /* UART : BLSP7 */ + uart@f995d000 { + compatible = "qcom,msm-hsuart-v14"; + reg = <0xf995d000 0x1000>, + <0xf9944000 0x19000>; + reg-names = "core_mem", "bam_mem"; + interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; + #address-cells = <0>; + interrupt-parent = <&uart7>; + interrupts = <0 1 2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xffffffff>; + interrupt-map = <0 &intc 0 113 0 + 1 &intc 0 239 0 + 2 &msmgpio 42 0>; + qcom,bam-tx-ep-pipe-index = <0>; + qcom,bam-rx-ep-pipe-index = <1>; + status = "ok"; + }; + + bluetooth_bcm: bcm4339 { + compatible = "bcm,bcm4339"; + gpios = <&pm8941_gpios 16 0>, /* BT_REG_ON */ + <&msmgpio 95 0>, /* BT_HOST_WAKE */ + <&msmgpio 96 0>; /* BT_DEV_WAKE */ + }; + + /* I2C : BLSP2 */ + i2c@f9924000 { + status = "disabled"; + synaptics@20 { + status = "disabled"; + }; + atmel_mxt_ts@4a { + status = "disabled"; + }; + }; + + /* I2C : BLSP4 */ + i2c@f9926000 { + cell-index = <4>; + compatible = "qcom,i2c-qup"; + reg = <0xf9926000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "qup_phys_addr"; + interrupts = <0 98 0>; + interrupt-names = "qup_err_intr"; + qcom,i2c-bus-freq = <355000>; + qcom,i2c-src-freq = <50000000>; + qcom,master-id = <86>; + status = "ok"; + }; + + /* I2C : BLSP6 */ + i2c@f9928000 { + cell-index = <6>; + compatible = "qcom,i2c-qup"; + reg = <0xf9928000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "qup_phys_addr"; + interrupts = <0 100 0>; + interrupt-names = "qup_err_intr"; + qcom,i2c-bus-freq = <355000>; + qcom,i2c-src-freq = <50000000>; + qcom,master-id = <86>; + status = "ok"; + }; + + /* I2C : BLSP11 */ + i2c@f9967000 { + cell-index = <11>; + qcom,i2c-bus-freq = <355000>; + qcom,scl-gpio = <&msmgpio 84 0x00>; + qcom,sda-gpio = <&msmgpio 83 0x00>; + status = "ok"; + tfa98xx_top@68 { + compatible = "nxp,tfa98xx_top"; + reg = <0x68>; + }; + tfa98xx_bottom@6A { + compatible = "nxp,tfa98xx_bottom"; + reg = <0x6A>; + }; + sii8620@72 { + compatible = "qcom,mhl-sii8620"; + reg = <0x72>; + interrupt-parent = <&msmgpio>; + mhl-intr-gpio = <&msmgpio 64 0>; + mhl-pwr-gpio = <&msmgpio 23 0>; + mhl-rst-gpio = <&msmgpio 16 0>; + qcom,hdmi-tx-map = <&mdss_hdmi_tx>; + mhl-switch-sel-1-gpio = <&msmgpio 10 0>; + mhl-switch-sel-2-gpio = <&msmgpio 11 0>; + mhl-fw-wake-gpio = <&msmgpio 31 0>; + }; + isa1200@48 { + status = "disabled"; + }; + }; + + /* SPI : BLSP1 */ + spi@f9923000 { + cs-gpios = <&msmgpio 2 0>; + spi-max-frequency = <38400000>; + status = "ok"; + ethernet-switch@2 { + status = "disabled"; + }; + }; + + /* SPI : BLSP10 */ + spi@f9966000 { + status = "disabled"; + epm-adc@0 { + status = "disabled"; + }; + }; + + nxp,tfa98xx-codec { + compatible = "nxp,tfa98xx-codec"; + }; + + qcom,msm-thermal { + qcom,core-control-mask = <0x6>; + qcom,freq-mitigation-value = <422400>; + qcom,freq-mitigation-control-mask = <0x09>; + qcom,limit-temp = <80>; + qcom,core-limit-temp = <85>; + }; + + qcom,smem@fa00000 { + /delete-node/ qcom,smd-wcnss; + /delete-node/ qcom,smsm-wcnss; + }; + + /delete-node/ qcom,iris-fm; + /delete-node/ qcom,pronto@fb21b000; + /delete-node/ qcom,smp2p-wcnss; + /delete-node/ qcom,wcnss-wlan@fb000000; +}; + +&mdss_hdmi_tx { + /* rhine doesn't use hpd-5v */ + qcom,hdmi-tx-supply-names = "hpd-gdsc", "core-vdda", "core-vcc"; + qcom,hdmi-tx-min-voltage-level = <0 1800000 1800000>; + qcom,hdmi-tx-max-voltage-level = <0 1800000 1800000>; + qcom,hdmi-tx-peak-current = <0 300000 0>; +}; + +&pm8941_gpios { + /* GPIO_1: CHG_PATH_PRI */ + gpio@c000 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <5>; /* NP */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_2: VOL_DN */ + gpio@c100 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_3: SNAPSHOT */ + gpio@c200 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_4: FOCUS */ + gpio@c300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_5: VOL_UP */ + gpio@c400 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_6: HW_ID_1 */ + gpio@c500 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <5>; /* NP */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_7: HW_ID_2 */ + gpio@c600 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <5>; /* NP */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_8: RF_LCD_ID_EN */ + gpio@c700 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <3>; /* High */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_9: NC */ + gpio@c800 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_10: NC */ + gpio@c900 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_11: NC */ + gpio@ca00 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_12: RF_ID_EXTENTION */ + gpio@cb00 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <4>; /* PD */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_13: DAMP_RESET */ + gpio@cc00 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_14: HW_ID_3 */ + gpio@cd00 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <5>; /* NP */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_15: DIVCLK1_CODEC */ + /* Follow QCT */ + + /* GPIO_16: BT_REG_ON */ + gpio@cf00 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_17: WL_SLEEP_CLK */ + gpio@d000 { + qcom,src-sel = <3>; /* Alternate function 2 */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_18: WL_REG_ON */ + gpio@d100 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_19: DISP_RESET_N */ + gpio@d200 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + somc,keep_high_at_init; + status = "ok"; + }; + + /* GPIO_20: NC */ + gpio@d300 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_21: BOOST_BYP_EN */ + /* Follow QCT */ + + /* GPIO_22: DAMP_INT */ + gpio@d500 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <5>; /* NP */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_23: NC */ + gpio@d600 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_24: NC */ + gpio@d700 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_25: NC */ + gpio@d800 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_26: NC */ + gpio@d900 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_27: NC */ + gpio@da00 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_28: TX_GTR_THRES */ + /* Follow QCT */ + + /* GPIO_29: DAMP2_RESET */ + gpio@dc00 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_30: DAMP2_INT */ + gpio@dd00 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <5>; /* NP */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_31: BATT_REM_ALERM */ + /* Follow QCT */ + + /* GPIO_32: NC */ + gpio@df00 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_33: NC */ + gpio@e000 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_34: NC */ + gpio@e100 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_35: NFC_CLK_REQ */ + gpio@e200 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <4>; /* PD */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_36: NC */ + gpio@e300 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; +}; + +&pm8941_mpps { + /* MPP_1: SDC_UIM_VBIAS */ + /* Follow QCT */ + + /* MPP_2: NC */ + mpp@a100 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* MPP_3: TXDAC0_VREF */ + /* Follow QCT */ + + /* MPP_4: NC */ + mpp@a300 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* MPP_5: NC */ + mpp@a400 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* MPP_6: LCD_ID_ADC */ + mpp@a500 { + qcom,mode = <4>; /* AIN */ + qcom,ain-route = <1>; /* AMUX 6 */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* MPP_7: RF_ID */ + mpp@a600 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* MPP_8: NC (VBAT_M) */ + mpp@a700 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; +}; + +&pm8841_mpps { + /* MPP_1: NC (DNC_LDO_EN) */ + mpp@a000 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* MPP_2: NC (FLASH_DR_RST_N) */ + mpp@a100 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* MPP_3: NC */ + mpp@a200 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* MPP_4: NC */ + mpp@a300 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; +}; + +/* Regulator config */ +&pm8941_s1 { + status = "ok"; +}; + +&pm8941_s2 { + status = "ok"; +}; + +&pm8941_s3 { + status = "ok"; +}; + +&pm8941_boost { /* VREG_5V */ + regulator-min-microvolt = <5100000>; + regulator-max-microvolt = <5100000>; + status = "ok"; +}; + +&pm8941_l1 { + status = "ok"; +}; + +&pm8941_l2 { + status = "ok"; +}; + +&pm8941_l3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + qcom,init-enable = <0>; + qcom,init-voltage = <1200000>; + status = "ok"; +}; + +&pm8941_l4 { + status = "ok"; +}; + +&pm8941_l5 { + status = "ok"; +}; + +&pm8941_l6 { + status = "ok"; +}; + +&pm8941_l7 { + status = "ok"; +}; + +&pm8941_l8 { + status = "ok"; +}; + +&pm8941_l9 { + status = "ok"; +}; + +&pm8941_l10 { + status = "disabled"; +}; + +&pm8941_l11 { + status = "disabled"; +}; + +&pm8941_l12 { + status = "ok"; +}; + +&pm8941_l13 { + status = "ok"; +}; + +&pm8941_l14 { + status = "ok"; +}; + +&pm8941_l15 { + status = "ok"; +}; + +&pm8941_l16 { + status = "ok"; +}; + +&pm8941_l17 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + qcom,init-enable = <0>; + qcom,init-voltage = <2700000>; + status = "ok"; +}; + +&pm8941_l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + qcom,init-enable = <0>; + qcom,init-voltage = <2850000>; + status = "ok"; +}; + +&pm8941_l19 { + status = "disabled"; +}; + +&pm8941_l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + qcom,init-voltage = <2950000>; + status = "ok"; +}; + +&pm8941_l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + qcom,init-voltage = <2950000>; + status = "ok"; +}; + +&pm8941_l22 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + qcom,init-enable = <0>; + qcom,init-voltage = <3000000>; + status = "ok"; +}; + +&pm8941_l23 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + qcom,init-enable = <0>; + qcom,init-voltage = <2800000>; + status = "ok"; +}; + +&pm8941_l24 { + status = "ok"; +}; + +&pm8941_lvs1 { + qcom,init-enable = <0>; + status = "ok"; +}; + +&pm8941_lvs2 { + qcom,init-enable = <0>; + status = "ok"; +}; + +&pm8941_lvs3 { + qcom,init-enable = <0>; + status = "ok"; +}; + +&pm8941_mvs1 { /* VREG_OTG */ + qcom,pull-down-enable = <1>; + status = "ok"; +}; + +&pm8941_mvs2 { /* VREG_HDMI */ + status = "disabled"; +}; + +&pm8841_s1 { + status = "ok"; +}; + +&pm8841_s2 { + status = "ok"; +}; + +&pm8841_s3 { + status = "ok"; +}; + +&pm8841_s4 { + status = "ok"; +}; + +&krait0_vreg { /* PM8821 VREG_S5 */ + status = "ok"; +}; + +&krait1_vreg { /* PM8821 VREG_S6 */ + status = "ok"; +}; + +&krait2_vreg { /* PM8821 VREG_S7 */ + status = "ok"; +}; + +&krait3_vreg { /* PM8821 VREG_S8 */ + status = "ok"; +}; + +&spi_eth_vreg { + status = "disabled"; +}; + +&slim_msm { + taiko_codec { + qcom,cdc-micbias-ldoh-v = <0x3>; + qcom,cdc-micbias-cfilt1-mv = <2700>; + qcom,cdc-micbias-cfilt2-mv = <2700>; + qcom,cdc-micbias-cfilt3-mv = <2700>; + qcom,cdc-micbias1-cfilt-sel = <0x0>; + qcom,cdc-micbias2-cfilt-sel = <0x1>; + qcom,cdc-micbias3-cfilt-sel = <0x2>; + qcom,cdc-micbias4-cfilt-sel = <0x0>; + }; +}; + +&usb3 { + qcom,dwc-hsphy-init = <0x00D0CC27>; +}; + +&mdss_mdp { + qcom,mdss-pref-prim-intf = "dsi"; +}; + +&mdss_fb0 { + qcom,memory-reservation-size = <0x1000000>; /* size 16MB */ +}; + +&pm8941_vadc { + chan@b4 { + qcom,scale-function = <8>; + }; +}; + +&pm8941_adc_tm { + chan@b4 { + qcom,scale-function = <4>; + }; +}; + +&pm8941_lsid0 { + qcom,power-on@800 { + qcom,s3-debounce = <8>; + }; +}; + +/ { + aliases { + /delete-property/ smd1; + /delete-property/ smd2; + /delete-property/ smd3; + /delete-property/ smd5; + /delete-property/ smd6; + }; +}; + +/delete-node/ &smdtty_apps_fm; +/delete-node/ &smdtty_apps_riva_bt_cmd; +/delete-node/ &smdtty_apps_riva_ant_cmd; +/delete-node/ &smdtty_apps_riva_ant_data; +/delete-node/ &smdtty_apps_riva_bt_acl; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dts b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dts new file mode 100644 index 00000000000..fc352997c1f --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dts @@ -0,0 +1,33 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dts + * + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Shougo Watanabe + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ab-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ab-shinano_common.dtsi" +/include/ "msm8974pro-ab-shinano_sirius_common.dtsi" +/include/ "msm8974pro-ab-shinano_sirius.dtsi" +/include/ "dsi-panel-sirius.dtsi" + +/ { + model = "SoMC Sirius ROW"; + compatible = "somc,sirius-row", "qcom,msm8974"; + qcom,board-id = <8 0>; + somc,space-no = "1276-9754", /* Gina */ + "1278-9570"; /* Rita */ +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dtsi new file mode 100644 index 00000000000..32c984f9e11 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dtsi @@ -0,0 +1,38 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius.dtsi + * + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Shougo Watanabe + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; +}; + +&pm8941_chg { + qcom,maxinput-dc-ma = <1800>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_common.dtsi new file mode 100644 index 00000000000..26dea76828f --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_common.dtsi @@ -0,0 +1,845 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_common.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP8 */ + i2c@f9964000 { + cell-index = <8>; + compatible = "qcom,i2c-qup"; + reg = <0xf9964000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "qup_phys_addr"; + interrupts = <0 102 0>; + interrupt-names = "qup_err_intr"; + qcom,i2c-bus-freq = <355000>; + qcom,i2c-src-freq = <50000000>; + qcom,scl-gpio = <&msmgpio 48 0x00>; + qcom,sda-gpio = <&msmgpio 47 0x00>; + qcom,master-id = <84>; + status = "ok"; + maxim_max1187x_tsc@48 { + compatible = "maxim,max1187x_tsc"; + reg = <0x48>; + interrupt-parent = <&msmgpio>; + interrupts = <86 0x2>; + touch_vdd-supply = <&pm8941_l22>; + touch_vdd-supply_name = "touch_vdd"; + gpio_tirq = <86>; + gpio_reset = <85>; + reset_l2h = <1>; + enable_resume_por = <1>; + defaults_allow = <0>; + default_config_id = <0>; + default_chip_id = <0>; + fw_name = "touch_chip_id_0x%02x_config_id_0x%%04x.bin"; + i2c_words = <128>; + coordinate_settings = <0x4>; + panel_margin_xl = <0>; + lcd_x = <1080>; + panel_margin_xh = <0>; + panel_margin_yl = <0>; + lcd_y = <1920>; + panel_margin_yh = <0>; + num_sensor_x = <20>; + num_sensor_y = <34>; + button_code0 = <0>; + button_code1 = <0>; + button_code2 = <0>; + button_code3 = <0>; + touch_pressure_enabled = <1>; + touch_size_enabled = <0>; + touch_orientation_enabled = <0>; + glove_enabled = <0>; + report_pen_as_finger = <1>; + wakeup_gesture_support = <1>; + wakeup_gesture_timeout = <2000>; + wakeup_gesture { + double_tap { + gesture_code = <0x0102>; + event_00 { + type = <2>; /* LOG */ + message = "=== DOUBLE TAP ==="; + }; + event_01 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <1>; + }; + event_02 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <0>; + }; + event_03 { + type = <99>; /* END */ + }; + }; + }; + }; + }; + + qcom,cci@fda0C000 { + qcom,cci-master0 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,cci-master1 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,camera@20 { + compatible = "qcom,sony_camera_0"; + reg = <0x20 0x0>; + status = "ok"; + qcom,slave-id = <0x20 0x0 0x0000>; + qcom,csiphy-sd-index = <0>; + qcom,csid-sd-index = <0>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_0"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + cam_vaf-supply = <&pm8941_l23>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio", + "cam_vaf"; + qcom,cam-vreg-type = <0 0 1 0>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-op-mode = <105000 85600 0 300000>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 15 0>, + <&msmgpio 94 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x1F>; + qcom,sensor-position = <0>; + qcom,sensor-mode = <1>; + qcom,cci-master = <0>; + sony,i2c_addr = <0x20>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <2048>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "SOI20BS0"; + default_module_name = "SOI20BS0"; + + GENERIC { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <0>; + pixel_number_w = <5248>; + pixel_number_h = <3936>; + diagonal_len = "7.87"; + unit_cell_size = "1.20"; + min_f_number = "2.00"; + max_f_number = "2.00"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <600 318 386 684 318 578 293 388 597 599 318 596 599 474 599 825 578 578>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 10>; + EXIT = <8 0x0 0 0>; + }; + }; + SOI20BS0 { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <0>; + pixel_number_w = <5248>; + pixel_number_h = <3936>; + diagonal_len = "7.87"; + unit_cell_size = "1.20"; + min_f_number = "2.00"; + max_f_number = "2.00"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <600 318 386 684 318 578 293 388 597 599 318 596 599 474 599 825 578 578>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 10>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + qcom,camera@6c { + compatible = "qcom,sony_camera_1"; + reg = <0x6c 0x0>; + status = "ok"; + qcom,slave-id = <0x6c 0x0000 0x0000>; + qcom,csiphy-sd-index = <2>; + qcom,csid-sd-index = <2>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_1"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio"; + qcom,cam-vreg-type = <0 0 1>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0>; + qcom,cam-vreg-op-mode = <105000 85600 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 17 0>, + <&msmgpio 18 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x7>; + qcom,sensor-position = <1>; + qcom,sensor-mode = <1>; + qcom,cci-master = <1>; + sony,i2c_addr = <0x6c>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <1024>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "LGI02BN1", + "SEM02BN1"; + default_module_name = "SEM02BN1"; + + GENERIC { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + LGI02BN1 { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SEM02BN1 { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + /* disable Qualcomm camera sensors */ + qcom,camera@6e { + status = "disabled"; + }; + + qcom,camera@90 { + status = "disabled"; + }; + }; + + qcom,ion { + compatible = "qcom,msm-ion"; + + qcom,ion-heap@20 { /* CAMERA HEAP */ + compatible = "qcom,msm-ion-reserve"; + reg = <20>; + qcom,heap-align = <0x1000>; + qcom,memory-reservation-type = "EBI1"; /* reserve EBI memory */ + qcom,memory-reservation-size = <0x6400000>; + qcom,ion-heap-type = "CARVEOUT"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + interrupt-parent = <&msmgpio>; + interrupts = <9 0>; + + vol_dn { + label = "volume_down"; + gpios = <&pm8941_gpios 2 0x1>; + linux,input-type = <1>; + linux,code = <114>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + camera_snapshot { + label = "camera_snapshot"; + gpios = <&pm8941_gpios 3 0x1>; + linux,input-type = <1>; + linux,code = <0x2fe>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + camera_focus { + label = "camera_focus"; + gpios = <&pm8941_gpios 4 0x1>; + linux,input-type = <1>; + linux,code = <0x210>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + vol_up { + label = "volume_up"; + gpios = <&pm8941_gpios 5 0x1>; + linux,input-type = <1>; + linux,code = <115>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + sim_det { + label = "sim-detection"; + gpios = <&msmgpio 9 0x0>; + linux,input-type = <5>; + linux,code = <7>; + gpio-key,wakeup; + debounce-interval = <10>; + }; + }; + + sound { + qcom,audio-routing = + "RX_BIAS", "MCLK", + "LDO_H", "MCLK", + "AMIC5", "MCLK", + "AMIC6", "MCLK", + "Ext Spk Bottom Pos", "LINEOUT1", + "Ext Spk Bottom Neg", "LINEOUT3", + "Ext Spk Top Pos", "LINEOUT2", + "Ext Spk Top Neg", "LINEOUT4", + "AMIC1", "MIC BIAS1 External", + "MIC BIAS1 External", "Secondary Mic", + "AMIC2", "MIC BIAS2 External", + "MIC BIAS2 External", "Headset Mic", + "MIC BIAS2 External", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS3 External", + "MIC BIAS3 External", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1 External", + "MIC BIAS1 External", "Handset Mic"; + qcom,mbhc-audio-jack-type = "5-pole-jack"; + }; + + qcom,msm-pcm-bit { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-bit; + qcom,msm-pcm-dsp-id = <0x2>; + }; + + qcom,msm-pcm-dsee { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsee; + qcom,msm-pcm-dsp-id = <0x3>; + }; +}; + +&pm8941_chg { + qcom,vddmax-mv = <4350>; + qcom,vddsafe-mv = <4400>; + qcom,vinmin-mv = <4200>; + qcom,ibatmax-ma = <1600>; + qcom,ibatterm-ma = <160>; + qcom,ibatsafe-ma = <1600>; + qcom,maxinput-dc-mv = <10000>; + qcom,maxinput-usb-ma = <1500>; + qcom,maxinput-usb-mv = <6500>; + qcom,thermal-mitigation = <1600 1600 1100 900 700 500 300 200 100 0>; + qcom,cool-bat-mv = <4350>; + qcom,ibatmax-warm-ma = <900>; + qcom,warm-bat-mv = <4200>; + qcom,ibatmax-cool-ma = <900>; + qcom,vbatdet-delta-mv = <70>; + qcom,tchg-mins = <512>; + qcom,vbatweak-mv = <3200>; + qcom,step-thresh-soc = <101>; + qcom,ibatmax-ma-under-step = <1600>; +}; + +&pm8941_bms { + qcom,v-cutoff-uv = <3200000>; + qcom,max-voltage-uv = <4350000>; + qcom,r-conn-mohm = <0>; + qcom,low-soc-calculate-soc-threshold = <15>; + qcom,low-soc-calculate-soc-ms = <1000>; + qcom,calculate-soc-ms = <30000>; + qcom,chg-term-ua = <160000>; + qcom,use-external-rsense; + qcom,batt-type = <3>; + qcom,use-ocv-thresholds; + qcom,ocv-voltage-high-threshold-uv = <3830000>; + qcom,ocv-voltage-low-threshold-uv = <3750000>; + qcom,shutdown-soc-valid-limit = <40>; + qcom,enable-fcc-learning; + qcom,min-fcc-learning-soc = <20>; + qcom,min-fcc-ocv-pc = <30>; + qcom,min-fcc-learning-samples = <5>; + qcom,fcc-resolution = <14>; + qcom,clamp-soc-max-count = <2>; +}; + +&pm8941_lsid0 { + pm8941_iadc: iadc@3600 { + qcom,rsense = <10000000>; + }; +}; + +&pm8941_gpios { + /* GPIO_20: LCD_DCDC_EN */ + gpio@d300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + somc,keep_high_at_init; + status = "ok"; + }; + + /* GPIO_27: FLASH_LED_NOW */ + gpio@da00 { + qcom,src-sel = <2>; /* Alternate function 1 */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <4>; /* PD */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; +}; + +&sdcc1 { + qcom,bus-speed-mode = "DDR50", "DDR_1p8v"; +}; + +&sdcc2 { + qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50"; + qcom,current-limit = <400>; + qcom,pad-drv-on = <0x2 0x2 0x2>; /* 6mA, 6mA, 6mA */ +}; + +&sdcc3 { + interrupts = <0 1>; + interrupt-map = <0 &intc 0 127 0 + 1 &intc 0 223 0>; + interrupt-names = "core_irq", "bam_irq"; + qcom,sup-voltages = <1800 2950>; + somc,use-for-wifi; + status = "ok"; +}; + +&sdhc_1 { + qcom,clk-rates = <400000 20000000 25000000 50000000 100000000>; + qcom,bus-speed-mode = "DDR_1p8v"; + qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ +}; + +&sdhc_2 { + qcom,vdd-current-level = <400000 400000>; + qcom,pad-drv-on = <0x2 0x2 0x2>; /* 6mA, 6mA, 6mA */ +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,vib@c000 { + status = "okay"; + compatible = "qcom,qpnp-vibrator"; + reg = <0xc000 0x100>; + label = "vibrator"; + qcom,qpnp-vib-vtg-level-mV = <2900>; + }; + + qcom,vibrator@c100 { + status = "disabled"; + }; + + qcom,vibrator@c200 { + status = "disabled"; + }; + + qcom,vibrator@c300 { + status = "disabled"; + }; + + qcom,vibrator@c400 { + status = "disabled"; + }; + + qcom,vibrator@c500 { + status = "disabled"; + }; + + qcom,vibrator@c600 { + status = "disabled"; + }; + + qcom,vibrator@c700 { + status = "disabled"; + }; + + qcom,leds@d000 { + status = "okay"; + qcom,rgb_sync = <1>; + + qcom,rgb_0 { + label = "rgb"; + linux,name = "led:rgb_red"; + qcom,mode = "pwm"; + qcom,pwm-channel = <6>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <200>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <3>; + linux,default-trigger = "none"; + }; + + qcom,rgb_1 { + label = "rgb"; + linux,name = "led:rgb_green"; + qcom,mode = "pwm"; + qcom,pwm-channel = <5>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <511>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <4>; + linux,default-trigger = "none"; + }; + + qcom,rgb_2 { + label = "rgb"; + linux,name = "led:rgb_blue"; + qcom,mode = "pwm"; + qcom,pwm-channel = <4>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <341>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <5>; + linux,default-trigger = "none"; + }; + }; + + qcom,leds@d300 { + status = "disabled"; + }; + + qcom,leds@e200 { + status = "disabled"; + }; + + somc,leds@d300 { + status = "okay"; + compatible = "somc,pm8941-flash"; + reg = <0xd300 0x100>; + label = "flash"; + torch-supply = <&pm8941_boost>; + flash-supply = <&pm8941_chg_boost>; + somc,headroom = <2>; + somc,clamp-curr-mA = <13>; + somc,startup-dly = <3>; + somc,hw-strobe-config = <3>; + somc,mask-enable = <1>; + somc,vph-pwr-droop { + somc,enable = <0>; + somc,threshold = <0>; + somc,debounce-time = <2>; + }; + }; + + qcom,leds@d800 { + status = "okay"; + qcom,wled_0 { + label = "wled"; + linux,name = "wled:backlight"; + linux,default-trigger = "bkl-trigger"; + qcom,cs-out-en = <1>; + qcom,cabc-en = <0>; + qcom,op-fdbck = <0>; + qcom,default-state = "on"; + qcom,max-current = <20>; + qcom,ctrl-delay-us = <0>; + qcom,boost-curr-lim = <3>; + qcom,cp-sel = <0>; + qcom,switch-freq = <2>; + qcom,ovp-val = <2>; + qcom,num-strings = <2>; + qcom,id = <0>; + }; + }; + }; +}; + +/* Regulator config */ +&pm8941_l11 { + status = "ok"; +}; + +&mdss_dsi0 { + qcom,dsi-pref-prim-pan = <&dsi_default_gpio_0>; + vdd-supply = <&pm8941_lvs3>; + qcom,platform-enable-gpio = <&pm8941_gpios 20 0>; + qcom,platform-lane-config = []; + qcom,platform-supply-entry1 { + qcom,supply-name = "vdd"; + qcom,supply-min-voltage = <0>; + qcom,supply-max-voltage = <0>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry2 { + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry3 { + qcom,supply-name = "vdda"; + qcom,supply-min-voltage = <1200000>; + qcom,supply-max-voltage = <1200000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dts b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dts new file mode 100644 index 00000000000..ba7ba9ebd41 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dts @@ -0,0 +1,33 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dts + * + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Shougo Watanabe + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ab-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ab-shinano_common.dtsi" +/include/ "msm8974pro-ab-shinano_sirius_common.dtsi" +/include/ "msm8974pro-ab-shinano_sirius_samba.dtsi" +/include/ "dsi-panel-sirius.dtsi" + +/ { + model = "SoMC Sirius SAMBA"; + compatible = "somc,sirius-samba", "qcom,msm8974"; + qcom,board-id = <8 1>; + somc,space-no = "1278-9584", + "1278-9462"; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dtsi new file mode 100644 index 00000000000..329f7321293 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dtsi @@ -0,0 +1,63 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ab-shinano_sirius_samba.dtsi + * + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * Author: Shougo Watanabe + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; + + oneseg_tuner: vj180 { + compatible = "sony,vj180"; + gpios = <&msmgpio 14 0>, /* TUNER_POWER */ + <&msmgpio 13 0>; /* TUNER_RESET */ + }; +}; + +&pm8941_chg { + qcom,maxinput-dc-ma = <1800>; +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,leds@d800 { + qcom,wled_0 { + qcom,full-scale-seg@0 { + threshold = <1023>; + curr = <5>; + coef = <4>; + }; + qcom,full-scale-seg@1 { + threshold = <2047>; + curr = <10>; + coef = <2>; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dts b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dts new file mode 100644 index 00000000000..7edf7734e58 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dts @@ -0,0 +1,39 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dts + * + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ac-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ac-shinano_common.dtsi" +/include/ "msm8974pro-ac-shinano_aries_common.dtsi" +/include/ "msm8974pro-ac-shinano_aries.dtsi" +/include/ "dsi-panel-aries.dtsi" + +/ { + model = "SoMC Aries ROW"; + compatible = "somc,aries-row", "qcom,msm8974"; + qcom,board-id = <8 0>; + qcom,msm-id = <194 0x10000>, + <209 0x10000>, + <210 0x10000>, + <212 0x10000>, + <213 0x10000>, + <215 0x10000>, + <216 0x10000>, + <218 0x10000>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dtsi new file mode 100644 index 00000000000..51b53cffef8 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dtsi @@ -0,0 +1,41 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; +}; + +&pm8941_bms { + qcom,battery-vendor-name = "TDK", "SEND", "SANYO-PANASONIC", "LG", "5TH"; + qcom,battery-vendor-adc-min = <1450 1330 1230 1110 960>; + qcom,battery-vendor-adc-max = <1550 1430 1330 1210 1060>; + qcom,battery-vendor-select = <0 1 0 0 0>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries_common.dtsi new file mode 100644 index 00000000000..be248d3c2e9 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries_common.dtsi @@ -0,0 +1,836 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_aries_common.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP8 */ + i2c@f9964000 { + cell-index = <8>; + compatible = "qcom,i2c-qup"; + reg = <0xf9964000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "qup_phys_addr"; + interrupts = <0 102 0>; + interrupt-names = "qup_err_intr"; + qcom,i2c-bus-freq = <355000>; + qcom,i2c-src-freq = <50000000>; + qcom,scl-gpio = <&msmgpio 48 0x00>; + qcom,sda-gpio = <&msmgpio 47 0x00>; + qcom,master-id = <84>; + status = "ok"; + synaptics_clearpad@2c { + compatible = "synaptics,clearpad"; + reg = <0x2c>; + interrupt-parent = <&msmgpio>; + interrupts = <86 0x2>; + touch_vdd-supply = <&pm8941_l22>; + touch_vio-supply = <&pm8941_s3>; + synaptics,irq_gpio = <&msmgpio 86 0x00>; + gpio_reset = <85>; + reset_l2h = <0>; + chip_id = <0x38>; + num_sensor_rx = <26>; + num_sensor_tx = <16>; + charger_supported = <0>; + pen_supported = <0>; + glove_supported = <1>; + cover_supported = <1>; + touch_pressure_enabled = <1>; + touch_size_enabled = <0>; + touch_orientation_enabled = <0>; + preset_x_max = <719>; + preset_y_max = <1279>; + preset_n_fingers = <10>; + por_delay_after = <200>; + wakeup_gesture_supported = <1>; + wakeup_gesture_lpm_disabled = <1>; + wakeup_gesture_timeout = <2000>; + wakeup_gesture { + double_tap { + gesture_code = <0x0003>; + event_00 { + type = <2>; /* LOG */ + message = "=== DOUBLE TAP ==="; + }; + event_01 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <1>; + }; + event_02 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <0>; + }; + event_03 { + type = <99>; /* END */ + }; + }; + }; + }; + }; + + qcom,cci@fda0C000 { + qcom,cci-master0 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,cci-master1 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,camera@20 { + compatible = "qcom,sony_camera_0"; + reg = <0x20 0x0>; + status = "ok"; + qcom,slave-id = <0x20 0x0 0x0000>; + qcom,csiphy-sd-index = <0>; + qcom,csid-sd-index = <0>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_0"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + cam_vaf-supply = <&pm8941_l23>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio", + "cam_vaf"; + qcom,cam-vreg-type = <0 0 1 0>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-op-mode = <105000 85600 0 300000>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 15 0>, + <&msmgpio 94 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x1F>; + qcom,sensor-position = <0>; + qcom,sensor-mode = <1>; + qcom,cci-master = <0>; + sony,i2c_addr = <0x20>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <2048>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "SOI20BS1"; + default_module_name = "SOI20BS1"; + + GENERIC { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <0>; + pixel_number_w = <5248>; + pixel_number_h = <3936>; + diagonal_len = "7.87"; + unit_cell_size = "1.20"; + min_f_number = "2.00"; + max_f_number = "2.00"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <600 318 386 684 318 578 293 388 597 599 318 596 599 474 599 825 578 578>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 10>; + EXIT = <8 0x0 0 0>; + }; + }; + SOI20BS1 { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <0>; + pixel_number_w = <5248>; + pixel_number_h = <3936>; + diagonal_len = "7.87"; + unit_cell_size = "1.20"; + min_f_number = "2.00"; + max_f_number = "2.00"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <600 318 386 684 318 578 293 388 597 599 318 596 599 474 599 825 578 578>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 10>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + qcom,camera@6c { + compatible = "qcom,sony_camera_1"; + reg = <0x6c 0x0>; + status = "ok"; + qcom,slave-id = <0x6c 0x0000 0x0000>; + qcom,csiphy-sd-index = <2>; + qcom,csid-sd-index = <2>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_1"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio"; + qcom,cam-vreg-type = <0 0 1>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0>; + qcom,cam-vreg-op-mode = <105000 85600 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 17 0>, + <&msmgpio 18 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x7>; + qcom,sensor-position = <1>; + qcom,sensor-mode = <1>; + qcom,cci-master = <1>; + sony,i2c_addr = <0x6c>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <1024>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "LGI02BN1", + "SEM02BN1"; + default_module_name = "SEM02BN1"; + + GENERIC { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + LGI02BN1 { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SEM02BN1 { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + /* disable Qualcomm camera sensors */ + qcom,camera@6e { + status = "disabled"; + }; + + qcom,camera@90 { + status = "disabled"; + }; + }; + + qcom,ion { + compatible = "qcom,msm-ion"; + + qcom,ion-heap@20 { /* CAMERA HEAP */ + compatible = "qcom,msm-ion-reserve"; + reg = <20>; + qcom,heap-align = <0x1000>; + qcom,memory-reservation-type = "EBI1"; /* reserve EBI memory */ + qcom,memory-reservation-size = <0x6400000>; + qcom,ion-heap-type = "CARVEOUT"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + interrupt-parent = <&msmgpio>; + interrupts = <9 0>; + + vol_dn { + label = "volume_down"; + gpios = <&pm8941_gpios 2 0x1>; + linux,input-type = <1>; + linux,code = <114>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + camera_snapshot { + label = "camera_snapshot"; + gpios = <&pm8941_gpios 3 0x1>; + linux,input-type = <1>; + linux,code = <0x2fe>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + camera_focus { + label = "camera_focus"; + gpios = <&pm8941_gpios 4 0x1>; + linux,input-type = <1>; + linux,code = <0x210>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + vol_up { + label = "volume_up"; + gpios = <&pm8941_gpios 5 0x1>; + linux,input-type = <1>; + linux,code = <115>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + sim_det { + label = "sim-detection"; + gpios = <&msmgpio 9 0x0>; + linux,input-type = <5>; + linux,code = <7>; + gpio-key,wakeup; + debounce-interval = <10>; + }; + }; + + sound { + qcom,audio-routing = + "RX_BIAS", "MCLK", + "LDO_H", "MCLK", + "AMIC5", "MCLK", + "AMIC6", "MCLK", + "Ext Spk Bottom Pos", "LINEOUT1", + "Ext Spk Bottom Neg", "LINEOUT3", + "Ext Spk Top Pos", "LINEOUT2", + "Ext Spk Top Neg", "LINEOUT4", + "AMIC1", "MIC BIAS1 External", + "MIC BIAS1 External", "Secondary Mic", + "AMIC2", "MIC BIAS2 External", + "MIC BIAS2 External", "Headset Mic", + "MIC BIAS2 External", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS3 External", + "MIC BIAS3 External", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1 External", + "MIC BIAS1 External", "Handset Mic"; + qcom,mbhc-audio-jack-type = "5-pole-jack"; + }; + + qcom,msm-pcm-bit { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <2>; + qcom,msm-pcm-bit; + }; + + qcom,msm-pcm-dsee { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <3>; + qcom,msm-pcm-dsee; + }; + + bu520x1nvx { + compatible = "rohm,bu520x1nvx"; + gpios = <&pm8941_gpios 36 0x1>; + }; +}; + +&pm8941_chg { + qcom,vddmax-mv = <4350>; + qcom,vddsafe-mv = <4400>; + qcom,vinmin-mv = <4200>; + qcom,ibatmax-ma = <1800>; + qcom,ibatterm-ma = <130>; + qcom,ibatsafe-ma = <2100>; + qcom,maxinput-dc-ma = <1800>; + qcom,maxinput-dc-mv = <10000>; + qcom,maxinput-usb-ma = <1500>; + qcom,maxinput-usb-mv = <13000>; + qcom,thermal-mitigation = <1800 1600 1100 900 700 500 300 200 100 0>; + qcom,cool-bat-mv = <4350>; + qcom,ibatmax-warm-ma = <750>; + qcom,warm-bat-mv = <4200>; + qcom,ibatmax-cool-ma = <750>; + qcom,vbatdet-delta-mv = <70>; + qcom,tchg-mins = <512>; + qcom,vbatweak-mv = <3200>; + qcom,step-thresh-soc = <60>; + qcom,ibatmax-ma-over-step = <1300>; + qcom,ibatmax-ma-under-step = <1800>; +}; + +&pm8941_bms { + qcom,v-cutoff-uv = <3200000>; + qcom,max-voltage-uv = <4350000>; + qcom,r-conn-mohm = <0>; + qcom,low-soc-calculate-soc-threshold = <15>; + qcom,low-soc-calculate-soc-ms = <1000>; + qcom,calculate-soc-ms = <30000>; + qcom,chg-term-ua = <130000>; + qcom,use-external-rsense; + qcom,batt-type = <3>; + qcom,use-ocv-thresholds; + qcom,ocv-voltage-high-threshold-uv = <3830000>; + qcom,ocv-voltage-low-threshold-uv = <3750000>; + qcom,shutdown-soc-valid-limit = <40>; + qcom,enable-fcc-learning; + qcom,min-fcc-learning-soc = <20>; + qcom,min-fcc-ocv-pc = <30>; + qcom,min-fcc-learning-samples = <5>; + qcom,fcc-resolution = <14>; + qcom,clamp-soc-max-count = <2>; +}; + +&pm8941_lsid0 { + pm8941_iadc: iadc@3600 { + qcom,rsense = <10000000>; + }; +}; + +&pm8941_gpios { + /* GPIO_27: FLASH_LED_NOW */ + gpio@da00 { + qcom,src-sel = <2>; /* Alternate function 1 */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <4>; /* PD */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_36: ACC_COVER_OPEN */ + gpio@e300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; +}; + +&sdcc3 { + interrupts = <0 1>; + interrupt-map = <0 &intc 0 127 0 + 1 &intc 0 223 0>; + interrupt-names = "core_irq", "bam_irq"; + qcom,sup-voltages = <1800 2950>; + somc,use-for-wifi; + status = "ok"; +}; + +&sdhc_1 { + qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ + /delete-property/ qcom,vdd-always-on; +}; + +&sdhc_2 { + qcom,vdd-current-level = <400000 400000>; + qcom,pad-drv-on = <0x4 0x2 0x2>; /* 10mA, 6mA, 6mA */ +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,vib@c000 { + status = "okay"; + compatible = "qcom,qpnp-vibrator"; + reg = <0xc000 0x100>; + label = "vibrator"; + qcom,qpnp-vib-vtg-level-mV = <3100>; + }; + + qcom,vibrator@c100 { + status = "disabled"; + }; + + qcom,vibrator@c200 { + status = "disabled"; + }; + + qcom,vibrator@c300 { + status = "disabled"; + }; + + qcom,vibrator@c400 { + status = "disabled"; + }; + + qcom,vibrator@c500 { + status = "disabled"; + }; + + qcom,vibrator@c600 { + status = "disabled"; + }; + + qcom,vibrator@c700 { + status = "disabled"; + }; + + qcom,leds@d000 { + status = "okay"; + qcom,rgb_sync = <1>; + + qcom,rgb_0 { + label = "rgb"; + linux,name = "led:rgb_red"; + qcom,mode = "pwm"; + qcom,pwm-channel = <6>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <255>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <3>; + linux,default-trigger = "none"; + }; + + qcom,rgb_1 { + label = "rgb"; + linux,name = "led:rgb_green"; + qcom,mode = "pwm"; + qcom,pwm-channel = <5>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <511>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <4>; + linux,default-trigger = "none"; + }; + + qcom,rgb_2 { + label = "rgb"; + linux,name = "led:rgb_blue"; + qcom,mode = "pwm"; + qcom,pwm-channel = <4>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <511>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <5>; + linux,default-trigger = "none"; + }; + }; + + qcom,leds@d300 { + status = "disabled"; + }; + + qcom,leds@e200 { + status = "disabled"; + }; + + somc,leds@d300 { + status = "okay"; + compatible = "somc,pm8941-flash"; + reg = <0xd300 0x100>; + label = "flash"; + torch-supply = <&pm8941_boost>; + flash-supply = <&pm8941_chg_boost>; + somc,headroom = <2>; + somc,clamp-curr-mA = <13>; + somc,startup-dly = <3>; + somc,hw-strobe-config = <3>; + somc,mask-enable = <1>; + somc,vph-pwr-droop { + somc,enable = <0>; + somc,threshold = <0>; + somc,debounce-time = <2>; + }; + }; + + qcom,leds@d800 { + status = "okay"; + qcom,wled_0 { + label = "wled"; + linux,name = "wled:backlight"; + linux,default-trigger = "bkl-trigger"; + qcom,cs-out-en = <1>; + qcom,cabc-en = <0>; + qcom,op-fdbck = <0>; + qcom,default-state = "on"; + qcom,max-current = <20>; + qcom,init-br = <1023>; + somc-s1,br-power-save = <163>; + qcom,ctrl-delay-us = <0>; + qcom,boost-curr-lim = <3>; + qcom,cp-sel = <0>; + qcom,switch-freq = <11>; + qcom,ovp-val = <2>; + qcom,num-strings = <2>; + qcom,id = <0>; + qcom,full-scale-seg@0 { + threshold = <1023>; + curr = <5>; + coef = <4>; + }; + qcom,full-scale-seg@1 { + threshold = <2047>; + curr = <10>; + coef = <2>; + }; + }; + }; + }; +}; + +&mdss_dsi0 { + qcom,dsi-pref-prim-pan = <&dsi_default_gpio_0>; + vdd-supply = <&pm8941_lvs3>; + qcom,platform-enable-gpio = <&msmgpio 78 0>; + qcom,platform-lane-config = []; + qcom,platform-supply-entry1 { + qcom,supply-name = "vdd"; + qcom,supply-min-voltage = <0>; + qcom,supply-max-voltage = <0>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry2 { + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry3 { + qcom,supply-name = "vdda"; + qcom,supply-min-voltage = <1200000>; + qcom,supply-max-voltage = <1200000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_common.dtsi new file mode 100644 index 00000000000..7ef9f86983d --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_common.dtsi @@ -0,0 +1,18 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_common.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/include/ "msm8974pro-ab-shinano_common.dtsi" + +&soc { +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dts b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dts new file mode 100644 index 00000000000..83ec0a7bab4 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dts @@ -0,0 +1,43 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dts + * + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ac-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ac-shinano_common.dtsi" +/include/ "msm8974pro-ac-shinano_leo_common.dtsi" +/include/ "msm8974pro-ac-shinano_leo.dtsi" +/include/ "dsi-panel-leo.dtsi" + +/ { + model = "SoMC Leo ROW"; + compatible = "somc,leo-row", "qcom,msm8974"; + qcom,board-id = <8 0>; + qcom,msm-id = <194 0x10000>, + <209 0x10000>, + <210 0x10000>, + <212 0x10000>, + <213 0x10000>, + <215 0x10000>, + <216 0x10000>, + <218 0x10000>; + somc,space-no = "1280-4852", /* Gina */ + "1280-4876", /* Rita */ + "1280-4918", /* Gina-APAC */ + "1282-0073"; /* Katyusha */ +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dtsi new file mode 100644 index 00000000000..ef249cb4b58 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dtsi @@ -0,0 +1,47 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; +}; + +&pm8941_chg { + qcom,step-thresh-soc = <101>; + qcom,ibatmax-ma-under-step = <1550>; +}; + +&pm8941_bms { + qcom,battery-vendor-name = "TDK", "SEND", "SANYO-PANASONIC", "LG", "5TH"; + qcom,battery-vendor-adc-min = <1450 1330 1230 1110 960>; + qcom,battery-vendor-adc-max = <1550 1430 1330 1210 1060>; + qcom,battery-vendor-select = <0 1 0 1 0>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_common.dtsi new file mode 100644 index 00000000000..0836944b661 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_common.dtsi @@ -0,0 +1,846 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_common.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP8 */ + i2c@f9964000 { + cell-index = <8>; + compatible = "qcom,i2c-qup"; + reg = <0xf9964000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "qup_phys_addr"; + interrupts = <0 102 0>; + interrupt-names = "qup_err_intr"; + qcom,i2c-bus-freq = <355000>; + qcom,i2c-src-freq = <50000000>; + qcom,scl-gpio = <&msmgpio 48 0x00>; + qcom,sda-gpio = <&msmgpio 47 0x00>; + qcom,master-id = <84>; + status = "ok"; + synaptics_clearpad@2c { + compatible = "synaptics,clearpad"; + reg = <0x2c>; + interrupt-parent = <&msmgpio>; + interrupts = <86 0x2>; + touch_vdd-supply = <&pm8941_l22>; + touch_vio-supply = <&pm8941_s3>; + synaptics,irq_gpio = <&msmgpio 86 0x00>; + gpio_reset = <85>; + reset_l2h = <0>; + chip_id = <0x38>; + num_sensor_rx = <29>; + num_sensor_tx = <16>; + charger_supported = <0>; + pen_supported = <0>; + glove_supported = <1>; + cover_supported = <1>; + touch_pressure_enabled = <1>; + touch_size_enabled = <0>; + touch_orientation_enabled = <0>; + preset_x_max = <1079>; + preset_y_max = <1919>; + preset_n_fingers = <10>; + por_delay_after = <200>; + wakeup_gesture_supported = <1>; + wakeup_gesture_lpm_disabled = <1>; + wakeup_gesture_timeout = <2000>; + wakeup_gesture { + double_tap { + gesture_code = <0x0003>; + event_00 { + type = <2>; /* LOG */ + message = "=== DOUBLE TAP ==="; + }; + event_01 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <1>; + }; + event_02 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <0>; + }; + event_03 { + type = <99>; /* END */ + }; + }; + }; + }; + }; + + qcom,cci@fda0C000 { + qcom,cci-master0 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,cci-master1 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,camera@20 { + compatible = "qcom,sony_camera_0"; + reg = <0x20 0x0>; + status = "ok"; + qcom,slave-id = <0x20 0x0 0x0000>; + qcom,csiphy-sd-index = <0>; + qcom,csid-sd-index = <0>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_0"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + cam_vaf-supply = <&pm8941_l23>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio", + "cam_vaf"; + qcom,cam-vreg-type = <0 0 1 0>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-op-mode = <105000 85600 0 300000>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 15 0>, + <&msmgpio 94 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x1F>; + qcom,sensor-position = <0>; + qcom,sensor-mode = <1>; + qcom,cci-master = <0>; + sony,i2c_addr = <0x20>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <2048>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "SOI20BS1"; + default_module_name = "SOI20BS1"; + + GENERIC { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <0>; + pixel_number_w = <5248>; + pixel_number_h = <3936>; + diagonal_len = "7.87"; + unit_cell_size = "1.20"; + min_f_number = "2.00"; + max_f_number = "2.00"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <600 318 386 684 318 578 293 388 597 599 318 596 599 474 599 825 578 578>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 10>; + EXIT = <8 0x0 0 0>; + }; + }; + SOI20BS1 { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <0>; + pixel_number_w = <5248>; + pixel_number_h = <3936>; + diagonal_len = "7.87"; + unit_cell_size = "1.20"; + min_f_number = "2.00"; + max_f_number = "2.00"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <600 318 386 684 318 578 293 388 597 599 318 596 599 474 599 825 578 578>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 10>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + qcom,camera@6c { + compatible = "qcom,sony_camera_1"; + reg = <0x6c 0x0>; + status = "ok"; + qcom,slave-id = <0x6c 0x0000 0x0000>; + qcom,csiphy-sd-index = <2>; + qcom,csid-sd-index = <2>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_1"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio"; + qcom,cam-vreg-type = <0 0 1>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0>; + qcom,cam-vreg-op-mode = <105000 85600 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 17 0>, + <&msmgpio 18 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x7>; + qcom,sensor-position = <1>; + qcom,sensor-mode = <1>; + qcom,cci-master = <1>; + sony,i2c_addr = <0x6c>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <1024>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "LGI02BN1", + "SEM02BN1"; + default_module_name = "SEM02BN1"; + + GENERIC { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + LGI02BN1 { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SEM02BN1 { + mount_angle = <90>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + /* disable Qualcomm camera sensors */ + qcom,camera@6e { + status = "disabled"; + }; + + qcom,camera@90 { + status = "disabled"; + }; + }; + + qcom,ion { + compatible = "qcom,msm-ion"; + + qcom,ion-heap@20 { /* CAMERA HEAP */ + compatible = "qcom,msm-ion-reserve"; + reg = <20>; + qcom,heap-align = <0x1000>; + qcom,memory-reservation-type = "EBI1"; /* reserve EBI memory */ + qcom,memory-reservation-size = <0x6400000>; + qcom,ion-heap-type = "CARVEOUT"; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + interrupt-parent = <&msmgpio>; + interrupts = <9 0>; + + vol_dn { + label = "volume_down"; + gpios = <&pm8941_gpios 2 0x1>; + linux,input-type = <1>; + linux,code = <114>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + camera_snapshot { + label = "camera_snapshot"; + gpios = <&pm8941_gpios 3 0x1>; + linux,input-type = <1>; + linux,code = <0x2fe>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + camera_focus { + label = "camera_focus"; + gpios = <&pm8941_gpios 4 0x1>; + linux,input-type = <1>; + linux,code = <0x210>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + vol_up { + label = "volume_up"; + gpios = <&pm8941_gpios 5 0x1>; + linux,input-type = <1>; + linux,code = <115>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + sim_det { + label = "sim-detection"; + gpios = <&msmgpio 9 0x0>; + linux,input-type = <5>; + linux,code = <7>; + gpio-key,wakeup; + debounce-interval = <10>; + }; + }; + + sound { + qcom,audio-routing = + "RX_BIAS", "MCLK", + "LDO_H", "MCLK", + "AMIC5", "MCLK", + "AMIC6", "MCLK", + "Ext Spk Bottom Pos", "LINEOUT1", + "Ext Spk Bottom Neg", "LINEOUT3", + "Ext Spk Top Pos", "LINEOUT2", + "Ext Spk Top Neg", "LINEOUT4", + "AMIC1", "MIC BIAS1 External", + "MIC BIAS1 External", "Secondary Mic", + "AMIC2", "MIC BIAS2 External", + "MIC BIAS2 External", "Headset Mic", + "MIC BIAS2 External", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS3 External", + "MIC BIAS3 External", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1 External", + "MIC BIAS1 External", "Handset Mic"; + qcom,mbhc-audio-jack-type = "5-pole-jack"; + }; + + qcom,msm-pcm-bit { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <2>; + qcom,msm-pcm-bit; + }; + + qcom,msm-pcm-dsee { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <3>; + qcom,msm-pcm-dsee; + }; + + bu520x1nvx { + compatible = "rohm,bu520x1nvx"; + gpios = <&pm8941_gpios 36 0x1>; + }; +}; + +&pm8941_chg { + qcom,vddmax-mv = <4350>; + qcom,vddsafe-mv = <4400>; + qcom,vinmin-mv = <4200>; + qcom,ibatmax-ma = <2150>; + qcom,ibatterm-ma = <155>; + qcom,ibatsafe-ma = <3000>; + qcom,maxinput-dc-ma = <1800>; + qcom,maxinput-dc-mv = <10000>; + qcom,maxinput-usb-ma = <1500>; + qcom,maxinput-usb-mv = <13000>; + qcom,thermal-mitigation = <2150 1600 1100 900 700 500 300 200 100 0>; + qcom,cool-bat-mv = <4350>; + qcom,ibatmax-warm-ma = <900>; + qcom,warm-bat-mv = <4200>; + qcom,ibatmax-cool-ma = <900>; + qcom,vbatdet-delta-mv = <70>; + qcom,tchg-mins = <512>; + qcom,vbatweak-mv = <3200>; +}; + +&pm8941_bms { + qcom,v-cutoff-uv = <3200000>; + qcom,max-voltage-uv = <4350000>; + qcom,r-conn-mohm = <0>; + qcom,low-soc-calculate-soc-threshold = <15>; + qcom,low-soc-calculate-soc-ms = <1000>; + qcom,calculate-soc-ms = <30000>; + qcom,chg-term-ua = <155000>; + qcom,use-external-rsense; + qcom,batt-type = <3>; + qcom,use-ocv-thresholds; + qcom,ocv-voltage-high-threshold-uv = <3830000>; + qcom,ocv-voltage-low-threshold-uv = <3750000>; + qcom,shutdown-soc-valid-limit = <40>; + qcom,enable-fcc-learning; + qcom,min-fcc-learning-soc = <20>; + qcom,min-fcc-ocv-pc = <30>; + qcom,min-fcc-learning-samples = <5>; + qcom,fcc-resolution = <14>; + qcom,clamp-soc-max-count = <2>; +}; + +&pm8941_lsid0 { + pm8941_iadc: iadc@3600 { + qcom,rsense = <10000000>; + }; +}; + +&pm8941_gpios { + /* GPIO_20: LCD_DCDC_EN */ + gpio@d300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + somc,keep_high_at_init; + status = "ok"; + }; + + /* GPIO_27: FLASH_LED_NOW */ + gpio@da00 { + qcom,src-sel = <2>; /* Alternate function 1 */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <4>; /* PD */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; + + /* GPIO_36: ACC_COVER_OPEN */ + gpio@e300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; +}; + +&sdcc3 { + interrupts = <0 1>; + interrupt-map = <0 &intc 0 127 0 + 1 &intc 0 223 0>; + interrupt-names = "core_irq", "bam_irq"; + qcom,sup-voltages = <1800 2950>; + somc,use-for-wifi; + status = "ok"; +}; + +&sdhc_1 { + qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ + /delete-property/ qcom,vdd-always-on; +}; + +&sdhc_2 { + qcom,vdd-current-level = <400000 400000>; + qcom,pad-drv-on = <0x2 0x2 0x2>; /* 6mA, 6mA, 6mA */ +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,vib@c000 { + status = "okay"; + compatible = "qcom,qpnp-vibrator"; + reg = <0xc000 0x100>; + label = "vibrator"; + qcom,qpnp-vib-vtg-level-mV = <2900>; + }; + + qcom,vibrator@c100 { + status = "disabled"; + }; + + qcom,vibrator@c200 { + status = "disabled"; + }; + + qcom,vibrator@c300 { + status = "disabled"; + }; + + qcom,vibrator@c400 { + status = "disabled"; + }; + + qcom,vibrator@c500 { + status = "disabled"; + }; + + qcom,vibrator@c600 { + status = "disabled"; + }; + + qcom,vibrator@c700 { + status = "disabled"; + }; + + qcom,leds@d000 { + status = "okay"; + qcom,rgb_sync = <1>; + + qcom,rgb_0 { + label = "rgb"; + linux,name = "led:rgb_red"; + qcom,mode = "pwm"; + qcom,pwm-channel = <6>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <98>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <3>; + linux,default-trigger = "none"; + }; + + qcom,rgb_1 { + label = "rgb"; + linux,name = "led:rgb_green"; + qcom,mode = "pwm"; + qcom,pwm-channel = <5>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <511>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <4>; + linux,default-trigger = "none"; + }; + + qcom,rgb_2 { + label = "rgb"; + linux,name = "led:rgb_blue"; + qcom,mode = "pwm"; + qcom,pwm-channel = <4>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <420>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <5>; + linux,default-trigger = "none"; + }; + }; + + qcom,leds@d300 { + status = "disabled"; + }; + + qcom,leds@e200 { + status = "disabled"; + }; + + somc,leds@d300 { + status = "okay"; + compatible = "somc,pm8941-flash"; + reg = <0xd300 0x100>; + label = "flash"; + torch-supply = <&pm8941_boost>; + flash-supply = <&pm8941_chg_boost>; + somc,headroom = <2>; + somc,clamp-curr-mA = <13>; + somc,startup-dly = <3>; + somc,hw-strobe-config = <3>; + somc,mask-enable = <1>; + somc,vph-pwr-droop { + somc,enable = <0>; + somc,threshold = <0>; + somc,debounce-time = <2>; + }; + }; + + qcom,leds@d800 { + status = "okay"; + qcom,wled_0 { + label = "wled"; + linux,name = "wled:backlight"; + linux,default-trigger = "bkl-trigger"; + qcom,cs-out-en = <1>; + qcom,cabc-en = <0>; + qcom,op-fdbck = <0>; + qcom,default-state = "on"; + qcom,max-current = <24>; + qcom,init-br = <1706>; + somc-s1,br-power-save = <136>; + qcom,ctrl-delay-us = <0>; + qcom,boost-curr-lim = <3>; + qcom,cp-sel = <0>; + qcom,switch-freq = <11>; + qcom,ovp-val = <2>; + qcom,num-strings = <2>; + qcom,id = <0>; + qcom,full-scale-seg@0 { + threshold = <1023>; + curr = <6>; + coef = <4>; + }; + qcom,full-scale-seg@1 { + threshold = <2047>; + curr = <12>; + coef = <2>; + }; + }; + }; + }; +}; + +&mdss_dsi0 { + qcom,dsi-pref-prim-pan = <&dsi_default_gpio_0>; + vdd-supply = <&pm8941_lvs3>; + qcom,platform-enable-gpio = <&pm8941_gpios 20 0>; + qcom,platform-lane-config = []; + qcom,platform-supply-entry1 { + qcom,supply-name = "vdd"; + qcom,supply-min-voltage = <0>; + qcom,supply-max-voltage = <0>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry2 { + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry3 { + qcom,supply-name = "vdda"; + qcom,supply-min-voltage = <1200000>; + qcom,supply-max-voltage = <1200000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dts b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dts new file mode 100644 index 00000000000..9e2cb25f78f --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dts @@ -0,0 +1,41 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dts + * + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ac-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ac-shinano_common.dtsi" +/include/ "msm8974pro-ac-shinano_leo_common.dtsi" +/include/ "msm8974pro-ac-shinano_leo_samba.dtsi" +/include/ "dsi-panel-leo.dtsi" + +/ { + model = "SoMC Leo SAMBA"; + compatible = "somc,leo-samba", "qcom,msm8974"; + qcom,board-id = <8 1>; + qcom,msm-id = <194 0x10000>, + <209 0x10000>, + <210 0x10000>, + <212 0x10000>, + <213 0x10000>, + <215 0x10000>, + <216 0x10000>, + <218 0x10000>; + somc,space-no = "1280-4897", + "1284-1688"; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dtsi new file mode 100644 index 00000000000..07428de5bd5 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dtsi @@ -0,0 +1,57 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_leo_samba.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; + + oneseg_tuner: vj190 { + compatible = "sony,vj190"; + interrupt-parent = <&msmgpio>; + interrupts = <68 0>; + gpios = + <&msmgpio 14 0>, /* TUNER_POWER */ + <&msmgpio 13 0>, /* TUNER_RESET */ + <&msmgpio 68 0>; /* TUNER_INT */ + }; +}; + +&pm8941_chg { + qcom,step-thresh-soc = <101>; + qcom,ibatmax-ma-under-step = <1550>; +}; + +&pm8941_bms { + qcom,battery-vendor-name = "TDK", "SEND", "SANYO-PANASONIC", "LG", "5TH"; + qcom,battery-vendor-adc-min = <1450 1330 1230 1110 960>; + qcom,battery-vendor-adc-max = <1550 1430 1330 1210 1060>; + qcom,battery-vendor-select = <0 1 0 1 0>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dts b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dts new file mode 100644 index 00000000000..818fd05ef63 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dts @@ -0,0 +1,31 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dts + * + * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +/include/ "msm8974pro-ac-pm8941.dtsi" +/include/ "msm8974-mtp.dtsi" +/include/ "msm8974pro-ac-shinano_common.dtsi" +/include/ "msm8974pro-ac-shinano_scorpion_common.dtsi" +/include/ "msm8974pro-ac-shinano_scorpion.dtsi" +/include/ "dsi-panel-scorpion.dtsi" + +/ { + model = "SoMC Scorpion ROW"; + compatible = "somc,scorpion-row", "qcom,msm8974"; + qcom,board-id = <8 0>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dtsi new file mode 100644 index 00000000000..108526379a4 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dtsi @@ -0,0 +1,58 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP6 */ + i2c@f9928000 { + nfc@28 { + compatible = "nxp,pn547"; + reg = <0x28>; + interrupt-parent = <&msmgpio>; + interrupts = <24 0x1>; + nxp,pvdd_en = <&pm8941_gpios 34 0x01>; + nxp,irq_gpio = <&msmgpio 24 0x00>; + nxp,dwld_en = <&msmgpio 57 0x00>; + nxp,ven = <&pm8941_mpps 2 0x01>; + dynamic_config; + configure_gpio = <&pm8941_gpios 33 0x00>; + configure_mpp = <&pm8941_mpps 2 0x00>; + }; + }; +}; + +&pm8941_gpios { + /* GPIO_9: P_SENSOR_INT_N */ + gpio@c800 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; +}; + +&pm8941_mpps { + /* MPP_3: TXDAC0_VREF */ + /* Follow QCT */ +}; + +&pm8941_bms { + qcom,battery-vendor-name = "TDK", "SEND", "SANYO-PANASONIC", "LG", "5TH"; + qcom,battery-vendor-adc-min = <1450 1330 1230 1110 960>; + qcom,battery-vendor-adc-max = <1550 1430 1330 1210 1060>; + qcom,battery-vendor-select = <0 1 0 0 0>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion_common.dtsi new file mode 100644 index 00000000000..dd8548ef42c --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion_common.dtsi @@ -0,0 +1,1037 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_scorpion_common.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + /* I2C : BLSP8 */ + i2c@f9964000 { + cell-index = <8>; + compatible = "qcom,i2c-qup"; + reg = <0xf9964000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + reg-names = "qup_phys_addr"; + interrupts = <0 102 0>; + interrupt-names = "qup_err_intr"; + qcom,i2c-bus-freq = <355000>; + qcom,i2c-src-freq = <50000000>; + qcom,scl-gpio = <&msmgpio 48 0x00>; + qcom,sda-gpio = <&msmgpio 47 0x00>; + qcom,master-id = <84>; + status = "ok"; + synaptics_clearpad@2c { + compatible = "synaptics,clearpad"; + reg = <0x2c>; + interrupt-parent = <&msmgpio>; + interrupts = <86 0x2>; + touch_vdd-supply = <&pm8941_l22>; + touch_vio-supply = <&pm8941_s3>; + synaptics,irq_gpio = <&msmgpio 86 0x00>; + chip_id = <0x39>; + num_sensor_rx = <41>; + num_sensor_tx = <27>; + charger_supported = <0>; + pen_supported = <0>; + glove_supported = <1>; + cover_supported = <0>; + touch_pressure_enabled = <1>; + touch_size_enabled = <0>; + touch_orientation_enabled = <0>; + preset_x_max = <1199>; + preset_y_max = <1919>; + preset_n_fingers = <10>; + por_delay_after = <200>; + wakeup_gesture_supported = <1>; + wakeup_gesture_large_panel = <1>; + wakeup_gesture_lpm_disabled = <1>; + wakeup_gesture_timeout = <2000>; + wakeup_gesture { + double_tap { + gesture_code = <0x0003>; + event_00 { + type = <2>; /* LOG */ + message = "=== DOUBLE TAP ==="; + }; + event_01 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <1>; + }; + event_02 { + type = <1>; /* KEY */ + code = <531>; /* TOUCHPAD_ON */ + down = <0>; + }; + event_03 { + type = <99>; /* END */ + }; + }; + }; + }; + }; + + /* I2C : BLSP11 */ + i2c@f9967000 { + ti_lp855x@2c { + compatible = "Texas Instruments,lp855x"; + reg = <0x2c>; + status = "ok"; + bl_enable = <&msmgpio 69 0>; + linux,name = "lp8556"; + linux,default-trigger = "bkl-trigger"; + mode = "register based"; + chip_name = "lp8556"; + max_br = <0xff>; + init_br = <0x33>; + cfg3_reg = <0x5e>; + fast_ctrl; + eprom@98 { + addr = <0x98>; + data = <0x16>; + }; + eprom@9e { + addr = <0x9e>; + data = <0x22>; + }; + eprom@a0 { + addr = <0xa0>; + data = <0xff>; + }; + eprom@a1 { + addr = <0xa1>; + data = <0x5f>; + }; + eprom@a2 { + addr = <0xa2>; + data = <0x20>; + }; + eprom@a4 { + addr = <0xa4>; + data = <0x72>; + }; + eprom@a5 { + addr = <0xa5>; + data = <0x34>; + }; + eprom@a6 { + addr = <0xa6>; + data = <0x80>; + }; + eprom@a7 { + addr = <0xa7>; + data = <0xf7>; + }; + eprom@a8 { + addr = <0xa8>; + data = <0x24>; + }; + eprom@a9 { + addr = <0xa9>; + data = <0xa0>; + }; + eprom@aa { + addr = <0xaa>; + data = <0x0f>; + }; + eprom@ae { + addr = <0xae>; + data = <0x0f>; + }; + }; + + ad7146@2f { + compatible = "AD,ad7146"; + interrupt-parent = <&spmi_bus>; + reg = <0x2f 0>; + interrupts = <0x0 0xc8 0x0>; /* PM8941 GPIO 9 */ + interrupt-name = "ad7146_irq_gpio"; + prox_vdd-supply = <&pm8941_l19>; + prox_vdd-supply_name = "prox_vdd"; + AD,irq_gpio = <&pm8941_gpios 9 0x00>; + pad,amb_comp_ctrl0 = <0x00FB>; + pad,amb_comp_ctrl1 = <0x0401>; + pad,amb_comp_ctrl2 = <0x04F0>; + pad,mod_freq_ctrl = <0x0D00>; + pad,stage0-connect1 = <0x3B7F>; + pad,stage0-connect2 = <0x1FFF>; + pad,stage0-afe = <0x0003>; + pad,stage0-sensitivity = <0x5454>; + pad,stage0-offset_l = <0x000A>; + pad,stage0-offset_h = <0x0070>; + pad,stage0-offset_l_clamp = <0x0070>; + pad,stage0-offset_h_clamp = <0x000A>; + pad,stage0-hysterisis = <10>; + pad,stage1-connect1 = <0x3FFF>; + pad,stage1-connect2 = <0x06FF>; + pad,stage1-afe = <0x0500>; + pad,stage1-sensitivity = <0x5454>; + pad,stage1-offset_l = <0x000A>; + pad,stage1-offset_h = <0x0040>; + pad,stage1-offset_l_clamp = <0x0040>; + pad,stage1-offset_h_clamp = <0x000A>; + pad,stage1-hysterisis = <15>; + status = "ok"; + }; + }; + + qcom,cci@fda0C000 { + qcom,cci-master0 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,cci-master1 { + qcom,hw-thigh = <22>; + qcom,hw-tlow = <33>; + }; + + qcom,camera@20 { + compatible = "qcom,sony_camera_0"; + reg = <0x20 0x0>; + status = "ok"; + qcom,slave-id = <0x20 0x0 0x0000>; + qcom,csiphy-sd-index = <0>; + qcom,csid-sd-index = <0>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_0"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + cam_vaf-supply = <&pm8941_l23>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio", + "cam_vaf"; + qcom,cam-vreg-type = <0 0 1 0>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0 2800000>; + qcom,cam-vreg-op-mode = <105000 85600 0 300000>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 15 0>, + <&msmgpio 94 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x1F>; + qcom,sensor-position = <0>; + qcom,sensor-mode = <1>; + qcom,cci-master = <0>; + sony,i2c_addr = <0x20>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <2048>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "SOI08BS2", + "SEM08BS2"; + default_module_name = "SEM08BS2"; + + GENERIC { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <0>; + pixel_number_w = <3280>; + pixel_number_h = <2464>; + diagonal_len = "4.595"; + unit_cell_size = "1.12"; + min_f_number = "2.40"; + max_f_number = "2.40"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SOI08BS2 { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <0>; + pixel_number_w = <3280>; + pixel_number_h = <2464>; + diagonal_len = "4.595"; + unit_cell_size = "1.12"; + min_f_number = "2.40"; + max_f_number = "2.40"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SEM08BS2 { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <0>; + pixel_number_w = <3280>; + pixel_number_h = <2464>; + diagonal_len = "4.595"; + unit_cell_size = "1.12"; + min_f_number = "2.40"; + max_f_number = "2.40"; + has_focus_actuator = <1>; + has_3a = <0>; + pll_num = <18>; + pll = <674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674 674>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 1>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + CAM_VAF = <3 0xFFFFFFFF 0 99>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "CAM_VAF", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + CAM_VAF = <3 2800 106500 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + qcom,camera@6c { + compatible = "qcom,sony_camera_1"; + reg = <0x6c 0x0>; + status = "ok"; + qcom,slave-id = <0x6c 0x0000 0x0000>; + qcom,csiphy-sd-index = <2>; + qcom,csid-sd-index = <2>; + qcom,mount-angle = <270>; + qcom,sensor-name = "sony_camera_1"; + cam_vdig-supply = <&pm8941_l3>; + cam_vana-supply = <&pm8941_l17>; + cam_vio-supply = <&pm8941_lvs2>; + qcom,cam-vreg-name = "cam_vdig", "cam_vana", "cam_vio"; + qcom,cam-vreg-type = <0 0 1>; + qcom,cam-vreg-min-voltage = <1200000 2700000 0>; + qcom,cam-vreg-max-voltage = <1200000 2700000 0>; + qcom,cam-vreg-op-mode = <105000 85600 0>; + qcom,gpio-no-mux = <0>; + gpios = <&msmgpio 17 0>, + <&msmgpio 18 0>; + qcom,gpio-reset = <1>; + qcom,gpio-req-tbl-num = <0 1>; + qcom,gpio-req-tbl-flags = <1 0>; + qcom,gpio-req-tbl-label = "CAMIF_MCLK", + "CAM_RESET1"; + qcom,gpio-set-tbl-num = <1 1>; + qcom,gpio-set-tbl-flags = <0 2>; + qcom,gpio-set-tbl-delay = <1 1000>; + qcom,csi-lane-assign = <0x4320>; + qcom,csi-lane-mask = <0x7>; + qcom,sensor-position = <1>; + qcom,sensor-mode = <1>; + qcom,cci-master = <1>; + sony,i2c_addr = <0x6c>; + sony,eeprom_addr = <0xA0>; + sony,eeprom_type = <0>; + sony,eeprom_max_len = <1024>; + sony,gpio_af = <0>; + sony,subdev_code = <0x3007>; + + sony,camera_modules { + module_names = "GENERIC", "LGI02BN1", + "SEM02BN1"; + default_module_name = "SEM02BN1"; + + GENERIC { + mount_angle = <270>; + sensor_rotation = <0>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + LGI02BN1 { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + SEM02BN1 { + mount_angle = <270>; + sensor_rotation = <180>; + sensor_facing = <1>; + pixel_number_w = <1976>; + pixel_number_h = <1200>; + diagonal_len = "2.59"; + unit_cell_size = "1.12"; + min_f_number = "2.80"; + max_f_number = "2.80"; + has_focus_actuator = <0>; + has_3a = <0>; + pll_num = <18>; + pll = <104 104 104 104 104 104 104 101 104 104 104 104 104 104 104 104 104 104>; + power_off { + commands = + "I2C_WRITE", + "GPIO_RESET", + "CAM_CLK", + "CAM_VANA", + "CAM_VIO", + "CAM_VDIG", + "EXIT"; + CAM_VDIG = + <0 0xFFFFFFFF 0 98>; + CAM_VIO = <1 0xFFFFFFFF 0 1>; + CAM_VANA = + <2 0xFFFFFFFF 0 1>; + GPIO_RESET = <5 0x0 0 1>; + CAM_CLK = <6 0xFFFFFFFF 0 1>; + I2C_WRITE = <7 0x0100 0 100>; + EXIT = <8 0x0 0 0>; + }; + power_on { + commands = + "CAM_VDIG", + "CAM_VIO", + "CAM_VANA", + "GPIO_RESET", + "CAM_CLK", + "EXIT"; + CAM_VDIG = <0 1200 85000 1>; + CAM_VIO = <1 0 0 1>; + CAM_VANA = <2 2700 103000 1>; + GPIO_RESET = <5 1 0 1>; + CAM_CLK = <6 0 0 1>; + EXIT = <8 0x0 0 0>; + }; + }; + }; + }; + + /* disable Qualcomm camera sensors */ + qcom,camera@6e { + status = "disabled"; + }; + + qcom,camera@90 { + status = "disabled"; + }; + }; + + qcom,ion { + compatible = "qcom,msm-ion"; + + qcom,ion-heap@20 { /* CAMERA HEAP */ + compatible = "qcom,msm-ion-reserve"; + reg = <20>; + qcom,heap-align = <0x1000>; + qcom,memory-reservation-type = "EBI1"; /* reserve EBI memory */ + qcom,memory-reservation-size = <0x6400000>; + qcom,ion-heap-type = "CARVEOUT"; + }; + }; + + sound { + qcom,audio-routing = + "RX_BIAS", "MCLK", + "LDO_H", "MCLK", + "AMIC5", "MCLK", + "AMIC6", "MCLK", + "Ext Spk Bottom Pos", "LINEOUT1", + "Ext Spk Bottom Neg", "LINEOUT3", + "Ext Spk Top Pos", "LINEOUT2", + "Ext Spk Top Neg", "LINEOUT4", + "AMIC1", "MIC BIAS1 External", + "MIC BIAS1 External", "Secondary Mic", + "AMIC2", "MIC BIAS2 External", + "MIC BIAS2 External", "Headset Mic", + "MIC BIAS2 External", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS3 External", + "MIC BIAS3 External", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1 External", + "MIC BIAS1 External", "Handset Mic"; + qcom,mbhc-audio-jack-type = "5-pole-jack"; + }; + + qcom,msm-pcm-bit { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <2>; + qcom,msm-pcm-bit; + }; + + qcom,msm-pcm-dsee { + compatible = "qcom,msm-pcm-dsp"; + qcom,msm-pcm-dsp-id = <3>; + qcom,msm-pcm-dsee; + }; + + gpio_keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + interrupt-parent = <&msmgpio>; + interrupts = <9 0>; + + vol_dn { + label = "volume_down"; + gpios = <&pm8941_gpios 2 0x1>; + linux,input-type = <1>; + linux,code = <114>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + vol_up { + label = "volume_up"; + gpios = <&pm8941_gpios 5 0x1>; + linux,input-type = <1>; + linux,code = <115>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + + sim_det { + label = "sim-detection"; + gpios = <&msmgpio 9 0x0>; + linux,input-type = <5>; + linux,code = <7>; + gpio-key,wakeup; + debounce-interval = <10>; + }; + }; + + bu520x1nvx { + compatible = "rohm,bu520x1nvx"; + gpios = <&pm8941_gpios 36 0x1>; + }; +}; + +&pm8941_chg { + qcom,vddmax-mv = <4350>; + qcom,vddsafe-mv = <4400>; + qcom,vinmin-mv = <4200>; + qcom,ibatmax-ma = <3000>; + qcom,ibatterm-ma = <225>; + qcom,ibatsafe-ma = <3000>; + qcom,maxinput-dc-ma = <1800>; + qcom,maxinput-dc-mv = <10000>; + qcom,maxinput-usb-ma = <1800>; + qcom,maxinput-usb-mv = <13000>; + qcom,thermal-mitigation = <3000 2500 2000 1500 1100 800 500 300 100 0>; + qcom,cool-bat-mv = <4350>; + qcom,ibatmax-warm-ma = <2300>; + qcom,warm-bat-mv = <4200>; + qcom,ibatmax-cool-ma = <2300>; + qcom,vbatdet-delta-mv = <70>; + qcom,tchg-mins = <512>; + qcom,vbatweak-mv = <3200>; + qcom,step-thresh-soc = <101>; + qcom,ibatmax-ma-under-step = <3000>; +}; + +&pm8941_bms { + qcom,v-cutoff-uv = <3200000>; + qcom,max-voltage-uv = <4350000>; + qcom,r-conn-mohm = <0>; + qcom,low-soc-calculate-soc-threshold = <15>; + qcom,low-soc-calculate-soc-ms = <1000>; + qcom,calculate-soc-ms = <30000>; + qcom,chg-term-ua = <225000>; + qcom,use-external-rsense; + qcom,batt-type = <3>; + qcom,use-ocv-thresholds; + qcom,ocv-voltage-high-threshold-uv = <3830000>; + qcom,ocv-voltage-low-threshold-uv = <3750000>; + qcom,shutdown-soc-valid-limit = <40>; + qcom,enable-fcc-learning; + qcom,min-fcc-learning-soc = <20>; + qcom,min-fcc-ocv-pc = <30>; + qcom,min-fcc-learning-samples = <5>; + qcom,fcc-resolution = <20>; + qcom,clamp-soc-max-count = <2>; +}; + +&pm8941_lsid0 { + pm8941_iadc: iadc@3600 { + qcom,rsense = <10000000>; + }; +}; + +&pm8941_gpios { + /* GPIO_3: NC */ + gpio@c200 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_4: NC */ + gpio@c300 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_20: LCD_DCDC_EN */ + gpio@d300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <1>; /* Out */ + qcom,output-type = <0>; /* CMOS */ + qcom,vin-sel = <2>; /* S3 */ + qcom,out-strength = <1>; /* Low */ + qcom,invert = <0>; /* Low */ + qcom,master-en = <1>; /* Enable */ + somc,keep_high_at_init; + status = "ok"; + }; + + /* GPIO_27: NC */ + gpio@da00 { + qcom,master-en = <0>; /* Disable */ + status = "ok"; + }; + + /* GPIO_36: ACC_COVER_OPEN */ + gpio@e300 { + qcom,src-sel = <0>; /* GPIO */ + qcom,mode = <0>; /* In */ + qcom,vin-sel = <2>; /* S3 */ + qcom,pull = <0>; /* PU */ + qcom,master-en = <1>; /* Enable */ + status = "ok"; + }; +}; + +&sdcc2 { + interrupts = <0 1>; + interrupt-map = <0 &intc 0 125 0 + 1 &intc 0 220 0>; + interrupt-names = "core_irq", "bam_irq"; + + qcom,sup-voltages = <1800 2950>; + vdd-io-supply = <&pm8941_s3>; + qcom,vdd-io-voltage-level = <1800000 1800000>; + qcom,vdd-io-current-level = <6 22000>; + somc,use-for-wifi; + + /delete-property/ vdd-supply; + /delete-property/ qcom,vdd-voltage-level; + /delete-property/ qcom,vdd-current-level; + /delete-property/ cd-gpios; + /delete-property/ qcom,dat1-mpm-int; + + status = "ok"; +}; + +&sdhc_1 { + qcom,pad-drv-on = <0x7 0x4 0x4>; /* 16mA, 10mA, 10mA */ + qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */ + qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; /* no-pull, pull-up, pull-up, pull-down */ + /delete-property/ qcom,vdd-always-on; +}; + +&sdhc_2 { + status = "disabled"; +}; + +&sdhc_3 { + #address-cells = <0>; + interrupt-parent = <&sdhc_3>; + interrupts = <0 1 2>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xffffffff>; + interrupt-map = <0 &intc 0 127 0 + 1 &intc 0 224 0 + 2 &msmgpio 62 0x3>; + interrupt-names = "hc_irq", "pwr_irq", "status_irq"; + cd-gpios = <&msmgpio 62 0x1>; + + vdd-supply = <&pm8941_l21>; + vdd-io-supply = <&pm8941_l13>; + + qcom,vdd-voltage-level = <2950000 2950000>; + qcom,vdd-current-level = <9000 800000>; + + qcom,vdd-io-voltage-level = <1800000 2950000>; + qcom,vdd-io-current-level = <6 22000>; + + qcom,clk-rates = <400000 20000000 25000000 40000000 50000000 100000000>; + qcom,msm-bus,num-cases = <9>; + qcom,msm-bus,vectors-KBps = <79 512 0 0>, /* No vote */ + <79 512 1600 3200>, /* 400 KB/s*/ + <79 512 80000 160000>, /* 20 MB/s */ + <79 512 100000 200000>, /* 25 MB/s */ + <79 512 160000 320000>, /* 40 MB/s */ + <79 512 200000 400000>, /* 50 MB/s */ + <79 512 400000 800000>, /* 100 MB/s */ + <79 512 800000 1600000>, /* 200 MB/s */ + <79 512 2048000 4096000>; /* Max. bandwidth */ + qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 40000000 50000000 100000000 200000000 4294967295>; + + status = "ok"; +}; + +&spmi_bus { + qcom,pm8941@1 { + qcom,vib@c000 { + status = "okay"; + compatible = "qcom,qpnp-vibrator"; + reg = <0xc000 0x100>; + label = "vibrator"; + qcom,qpnp-vib-vtg-level-mV = <3100>; + }; + + qcom,vibrator@c100 { + status = "disabled"; + }; + + qcom,vibrator@c200 { + status = "disabled"; + }; + + qcom,vibrator@c300 { + status = "disabled"; + }; + + qcom,vibrator@c400 { + status = "disabled"; + }; + + qcom,vibrator@c500 { + status = "disabled"; + }; + + qcom,vibrator@c600 { + status = "disabled"; + }; + + qcom,vibrator@c700 { + status = "disabled"; + }; + + qcom,leds@d800 { + status = "disabled"; + qcom,wled_0 { + label = "wled"; + linux,name = "wled:backlight"; + linux,default-trigger = "bkl-trigger"; + qcom,cs-out-en = <1>; + qcom,cabc-en = <0>; + qcom,op-fdbck = <0>; + qcom,default-state = "on"; + qcom,max-current = <20>; + qcom,ctrl-delay-us = <0>; + qcom,boost-curr-lim = <3>; + qcom,cp-sel = <0>; + qcom,switch-freq = <2>; + qcom,ovp-val = <2>; + qcom,num-strings = <2>; + qcom,id = <0>; + }; + }; + + qcom,leds@d000 { + status = "okay"; + qcom,rgb_sync = <1>; + + qcom,rgb_0 { + label = "rgb"; + linux,name = "led:rgb_red"; + qcom,mode = "pwm"; + qcom,pwm-channel = <6>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <160>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <3>; + linux,default-trigger = "none"; + }; + + qcom,rgb_1 { + label = "rgb"; + linux,name = "led:rgb_green"; + qcom,mode = "pwm"; + qcom,pwm-channel = <5>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <270>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <4>; + linux,default-trigger = "none"; + }; + + qcom,rgb_2 { + label = "rgb"; + linux,name = "led:rgb_blue"; + qcom,mode = "pwm"; + qcom,pwm-channel = <4>; + qcom,pwm-us = <1000>; + qcom,pwm-max-value = <220>; + qcom,max-current = <12>; + qcom,default-state = "off"; + qcom,id = <5>; + linux,default-trigger = "none"; + }; + }; + + qcom,leds@d300 { + status = "disabled"; + }; + + qcom,leds@e200 { + status = "disabled"; + }; + }; +}; + +/* +/delete-node/ &sdcc3; +*/ + +&pm8941_l13 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; +}; + +&pm8941_l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + qcom,init-voltage = <2850000>; + status = "ok"; +}; + +&mdss_fb0 { + qcom,memory-reservation-size = <0x1200000>; /* size 19MB */ +}; + +&mdss_dsi0 { + qcom,dsi-pref-prim-pan = <&dsi_default_gpio_0>; + vdd-supply = <&pm8941_lvs3>; + qcom,platform-enable-gpio = <&pm8941_gpios 20 0>; + qcom,platform-lane-config = []; + qcom,platform-supply-entry1 { + qcom,supply-name = "vdd"; + qcom,supply-min-voltage = <0>; + qcom,supply-max-voltage = <0>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry2 { + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; + qcom,platform-supply-entry3 { + qcom,supply-name = "vdda"; + qcom,supply-min-voltage = <1200000>; + qcom,supply-max-voltage = <1200000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-post-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-off-sleep = <0>; + }; +}; + +&usb3 { + current_system_max_limit = <1800>; +}; diff --git a/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_sirius_common.dtsi b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_sirius_common.dtsi new file mode 100644 index 00000000000..d8f4214e476 --- /dev/null +++ b/arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_sirius_common.dtsi @@ -0,0 +1,15 @@ +/* arch/arm/boot/dts/qcom/msm8974pro-ac-shinano_sirius_common.dtsi + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/include/ "msm8974pro-ab-shinano_sirius_common.dtsi" diff --git a/arch/arm/boot/dts/qcom/msm8974pro.dtsi b/arch/arm/boot/dts/qcom/msm8974pro.dtsi index 868b968f0da..4eebfd183de 100644 --- a/arch/arm/boot/dts/qcom/msm8974pro.dtsi +++ b/arch/arm/boot/dts/qcom/msm8974pro.dtsi @@ -1,4 +1,5 @@ /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications AB. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -1616,7 +1617,6 @@ /* Updated chip ID */ qcom,chipid = <0x03030002>; qcom,msm-bus,num-cases = <15>; - qcom,bus-control; qcom,initial-pwrlevel = <3>; /* Updated bus bandwidth requirements */ @@ -1831,4 +1831,6 @@ &gdsc_venus { qcom,skip-logic-collapse; + qcom,retain-periph; + qcom,retain-mem; }; diff --git a/arch/arm/configs/aosp_shinano_aries_defconfig b/arch/arm/configs/aosp_shinano_aries_defconfig new file mode 100644 index 00000000000..1697ca297de --- /dev/null +++ b/arch/arm/configs/aosp_shinano_aries_defconfig @@ -0,0 +1,524 @@ +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_EXPERIMENTAL=y +CONFIG_LOCALVERSION="-perf" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_IKCONFIG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_IOSCHED_TEST=y +CONFIG_DEFAULT_ROW=y +CONFIG_ARCH_MSM=y +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_MACH_SONY_ARIES=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_SMP2P=y +CONFIG_MSM_SMP2P_TEST=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +CONFIG_MSM_IPC_ROUTER_SECURITY=y +CONFIG_MSM_QMI_INTERFACE=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL_LPASS_QDSP6V5=y +CONFIG_MSM_PIL_MSS_QDSP6V5=y +CONFIG_MSM_PIL_VENUS=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_WATCHDOG_V2=y +CONFIG_MSM_MEMORY_DUMP=y +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_ADSP_LOADER=y +CONFIG_MSM_OCMEM=y +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y +CONFIG_MSM_OCMEM_DEBUG=y +CONFIG_SENSORS_ADSP=y +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_MSM_MODEM_SUBSYSTEM_RESTART_MONITOR=y +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_ENABLE_VMALLOC_SAVING=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y +CONFIG_CP_ACCESS=y +CONFIG_USE_OF=y +CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XFRM_RFC_4868_TRUNCATION=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +# CONFIG_MSM_BT_POWER is not set +CONFIG_BT_BCM4339=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_RFKILL=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +CONFIG_CMA=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_UID_STAT=y +CONFIG_TSPP=m +CONFIG_PM8941_FLASH=y +CONFIG_QPNP_VIBRATOR=y +CONFIG_QSEECOM=y +CONFIG_QPNP_MISC=y +CONFIG_NFC_PN547=y +CONFIG_NFC_PN547_PMC8974_CLK_REQ=y +CONFIG_SCSI=y +CONFIG_SCSI_TGT=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_KS8851=m +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_SLIP=y +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_CDCETHER is not set +CONFIG_USB_NET_CDC_EEM=y +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_NET_GL620A=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=y +CONFIG_USB_NET_KALMIA=y +CONFIG_USB_NET_INT51X1=y +CONFIG_USB_SIERRA_NET=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_CLEARPAD=y +CONFIG_TOUCHSCREEN_CLEARPAD_I2C=y +CONFIG_TOUCHSCREEN_CLEARPAD_RMI_DEV=y +CONFIG_TOUCHSCREEN_GEN_VKEYS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_BU520X1NVX=y +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +CONFIG_DIAG_CHAR=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MSM_QPNP_INT=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_QPNP_PIN=y +CONFIG_GPIO_QPNP_PIN_DEBUG=y +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_BQ28400=y +CONFIG_QPNP_CHARGER=y +CONFIG_BATTERY_BCL=y +CONFIG_QPNP_BMS=y +CONFIG_SENSORS_EPM_ADC=y +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y +CONFIG_SENSORS_QPNP_ADC_CURRENT=y +CONFIG_THERMAL=y +CONFIG_THERMAL_TSENS8974=y +CONFIG_THERMAL_MONITOR=y +CONFIG_THERMAL_QPNP=y +CONFIG_THERMAL_QPNP_ADC_TM=y +CONFIG_WCD9320_CODEC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_STUB=y +CONFIG_REGULATOR_QPNP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_CORE=m +# CONFIG_MSM_CAMERA is not set +CONFIG_MSMB_CAMERA=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_CPP=y +CONFIG_MSM_CCI=y +CONFIG_MSM_CSI30_HEADER=y +CONFIG_MSM_CSIPHY=y +CONFIG_MSM_CSID=y +CONFIG_MSM_EEPROM=y +CONFIG_MSM_ISPIF=y +CONFIG_SONY_CAM_V4L2=y +CONFIG_MSMB_JPEG=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_WFD=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_VIDEOBUF2_MSM_MEM=y +# CONFIG_V4L_USB_DRIVERS is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y +CONFIG_FB=y +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_MDSS=y +CONFIG_FB_MSM_MDSS_WRITEBACK=y +CONFIG_FB_MSM_MDSS_SPECIFIC_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_MHL_SII8620_8061=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_MSM8974=y +CONFIG_SND_SOC_APQ8074=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_SONY=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_HOST_EXTRA_NOTIFICATION=y +CONFIG_USB_STORAGE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_G_ANDROID=y +CONFIG_USB_MIRRORLINK=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_CACHE_FEATURE=y +CONFIG_MMC_AWAKE_HS200=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_DEV_DRV_STR_TYPE4=y +CONFIG_MMC_DISABLE_STOP_REQUEST_SKHYNIX=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_BLOCK_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_MSM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_MSM_SPS_SUPPORT=y +CONFIG_LEDS_QPNP=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_MSM is not set +CONFIG_RTC_DRV_QPNP=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_SPS=y +CONFIG_USB_BAM=y +CONFIG_SPS_SUPPORT_BAMDMA=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_QPNP_PWM=y +CONFIG_QPNP_POWER_ON=y +CONFIG_QPNP_CLKDIV=y +CONFIG_QPNP_REVID=y +CONFIG_QPNP_COINCELL=y +CONFIG_POWERKEY_FORCECRASH=y +CONFIG_MSM_IOMMU_V1=y +CONFIG_IOMMU_PGTABLES_L2=y +CONFIG_MSM_IOMMU_VBIF_CHECK=y +CONFIG_MOBICORE_SUPPORT=m +CONFIG_MOBICORE_API=m +CONFIG_BIF=y +CONFIG_BIF_QPNP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_VFAT_FS_NO_DUALNAMES=y +CONFIG_TMPFS=y +CONFIG_ECRYPT_FS=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SYSRQ_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STRICT_DEVMEM=y +CONFIG_PID_IN_CONTEXTIDR=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCEDEV=y diff --git a/arch/arm/configs/aosp_shinano_castor_defconfig b/arch/arm/configs/aosp_shinano_castor_defconfig new file mode 100644 index 00000000000..b56dd1c4a69 --- /dev/null +++ b/arch/arm/configs/aosp_shinano_castor_defconfig @@ -0,0 +1,522 @@ +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_EXPERIMENTAL=y +CONFIG_LOCALVERSION="-perf" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_IKCONFIG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_IOSCHED_TEST=y +CONFIG_DEFAULT_ROW=y +CONFIG_ARCH_MSM=y +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_MACH_SONY_CASTOR=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_SMP2P=y +CONFIG_MSM_SMP2P_TEST=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +CONFIG_MSM_IPC_ROUTER_SECURITY=y +CONFIG_MSM_QMI_INTERFACE=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL_LPASS_QDSP6V5=y +CONFIG_MSM_PIL_MSS_QDSP6V5=y +CONFIG_MSM_PIL_VENUS=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_WATCHDOG_V2=y +CONFIG_MSM_MEMORY_DUMP=y +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_ADSP_LOADER=y +CONFIG_MSM_OCMEM=y +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y +CONFIG_MSM_OCMEM_DEBUG=y +CONFIG_SENSORS_ADSP=y +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_MSM_MODEM_SUBSYSTEM_RESTART_MONITOR=y +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_ENABLE_VMALLOC_SAVING=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y +CONFIG_CP_ACCESS=y +CONFIG_USE_OF=y +CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XFRM_RFC_4868_TRUNCATION=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +# CONFIG_MSM_BT_POWER is not set +CONFIG_BT_BCM4339=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_RFKILL=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +CONFIG_CMA=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_UID_STAT=y +CONFIG_TSPP=m +CONFIG_QPNP_VIBRATOR=y +CONFIG_QSEECOM=y +CONFIG_QPNP_MISC=y +CONFIG_NFC_PN547=y +CONFIG_NFC_PN547_PMC8974_CLK_REQ=y +CONFIG_IR_REMOTE=y +CONFIG_AD7146=y +CONFIG_SCSI=y +CONFIG_SCSI_TGT=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_KS8851=m +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_SLIP=y +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_CDCETHER is not set +CONFIG_USB_NET_CDC_EEM=y +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_NET_GL620A=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=y +CONFIG_USB_NET_KALMIA=y +CONFIG_USB_NET_INT51X1=y +CONFIG_USB_SIERRA_NET=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_CLEARPAD=y +CONFIG_TOUCHSCREEN_CLEARPAD_I2C=y +CONFIG_TOUCHSCREEN_CLEARPAD_RMI_DEV=y +CONFIG_TOUCHSCREEN_GEN_VKEYS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_BU520X1NVX=y +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +CONFIG_DIAG_CHAR=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MSM_QPNP_INT=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_QPNP_PIN=y +CONFIG_GPIO_QPNP_PIN_DEBUG=y +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_BQ28400=y +CONFIG_QPNP_CHARGER=y +CONFIG_BATTERY_BCL=y +CONFIG_QPNP_BMS=y +CONFIG_SENSORS_EPM_ADC=y +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y +CONFIG_SENSORS_QPNP_ADC_CURRENT=y +CONFIG_THERMAL=y +CONFIG_THERMAL_TSENS8974=y +CONFIG_THERMAL_MONITOR=y +CONFIG_THERMAL_QPNP=y +CONFIG_THERMAL_QPNP_ADC_TM=y +CONFIG_WCD9320_CODEC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_STUB=y +CONFIG_REGULATOR_QPNP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_CORE=m +# CONFIG_MSM_CAMERA is not set +CONFIG_MSMB_CAMERA=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_CPP=y +CONFIG_MSM_CCI=y +CONFIG_MSM_CSI30_HEADER=y +CONFIG_MSM_CSIPHY=y +CONFIG_MSM_CSID=y +CONFIG_MSM_EEPROM=y +CONFIG_MSM_ISPIF=y +CONFIG_SONY_CAM_V4L2=y +CONFIG_MSMB_JPEG=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_WFD=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_VIDEOBUF2_MSM_MEM=y +# CONFIG_V4L_USB_DRIVERS is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y +CONFIG_FB=y +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_MDSS=y +CONFIG_FB_MSM_MDSS_WRITEBACK=y +CONFIG_FB_MSM_MDSS_SPECIFIC_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_MHL_SII8620_8061=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_MSM8974=y +CONFIG_SND_SOC_APQ8074=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_SONY=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_HOST_EXTRA_NOTIFICATION=y +CONFIG_USB_STORAGE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_G_ANDROID=y +CONFIG_USB_MIRRORLINK=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_BLOCK_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_MSM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_MSM_SPS_SUPPORT=y +CONFIG_LEDS_LP855X=y +CONFIG_LEDS_QPNP=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_MSM is not set +CONFIG_RTC_DRV_QPNP=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_SPS=y +CONFIG_USB_BAM=y +CONFIG_SPS_SUPPORT_BAMDMA=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_QPNP_PWM=y +CONFIG_QPNP_POWER_ON=y +CONFIG_QPNP_CLKDIV=y +CONFIG_QPNP_REVID=y +CONFIG_QPNP_COINCELL=y +CONFIG_POWERKEY_FORCECRASH=y +CONFIG_MSM_IOMMU_V1=y +CONFIG_IOMMU_PGTABLES_L2=y +CONFIG_MSM_IOMMU_VBIF_CHECK=y +CONFIG_MOBICORE_SUPPORT=m +CONFIG_MOBICORE_API=m +CONFIG_BIF=y +CONFIG_BIF_QPNP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_VFAT_FS_NO_DUALNAMES=y +CONFIG_TMPFS=y +CONFIG_ECRYPT_FS=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SYSRQ_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STRICT_DEVMEM=y +CONFIG_PID_IN_CONTEXTIDR=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCEDEV=y diff --git a/arch/arm/configs/aosp_shinano_castor_windy_defconfig b/arch/arm/configs/aosp_shinano_castor_windy_defconfig new file mode 100644 index 00000000000..e62d9a533b9 --- /dev/null +++ b/arch/arm/configs/aosp_shinano_castor_windy_defconfig @@ -0,0 +1,525 @@ +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_EXPERIMENTAL=y +CONFIG_LOCALVERSION="-perf" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_IKCONFIG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_IOSCHED_TEST=y +CONFIG_DEFAULT_ROW=y +CONFIG_ARCH_MSM=y +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_MACH_SONY_CASTOR_WINDY=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_SMP2P=y +CONFIG_MSM_SMP2P_TEST=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +CONFIG_MSM_IPC_ROUTER_SECURITY=y +CONFIG_MSM_QMI_INTERFACE=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL_LPASS_QDSP6V5=y +CONFIG_MSM_PIL_MSS_QDSP6V5=y +CONFIG_MSM_PIL_VENUS=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_WATCHDOG_V2=y +CONFIG_MSM_MEMORY_DUMP=y +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_ADSP_LOADER=y +CONFIG_MSM_OCMEM=y +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y +CONFIG_MSM_OCMEM_DEBUG=y +CONFIG_SENSORS_ADSP=y +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_MSM_MODEM_SUBSYSTEM_RESTART_MONITOR=y +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_ENABLE_VMALLOC_SAVING=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y +CONFIG_CP_ACCESS=y +CONFIG_USE_OF=y +CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XFRM_RFC_4868_TRUNCATION=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +# CONFIG_MSM_BT_POWER is not set +CONFIG_BT_BCM4339=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_RFKILL=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +CONFIG_CMA=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_UID_STAT=y +CONFIG_TSPP=m +CONFIG_QPNP_VIBRATOR=y +CONFIG_QSEECOM=y +CONFIG_QPNP_MISC=y +CONFIG_NFC_PN547=y +CONFIG_NFC_PN547_PMC8974_CLK_REQ=y +CONFIG_IR_REMOTE=y +CONFIG_SCSI=y +CONFIG_SCSI_TGT=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_KS8851=m +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_SLIP=y +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_CDCETHER is not set +CONFIG_USB_NET_CDC_EEM=y +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_NET_GL620A=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=y +CONFIG_USB_NET_KALMIA=y +CONFIG_USB_NET_INT51X1=y +CONFIG_USB_SIERRA_NET=y +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_CLEARPAD=y +CONFIG_TOUCHSCREEN_CLEARPAD_I2C=y +CONFIG_TOUCHSCREEN_CLEARPAD_RMI_DEV=y +CONFIG_TOUCHSCREEN_GEN_VKEYS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_BU520X1NVX=y +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +CONFIG_DIAG_CHAR=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MSM_QPNP_INT=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_QPNP_PIN=y +CONFIG_GPIO_QPNP_PIN_DEBUG=y +CONFIG_POWER_SUPPLY=y +CONFIG_SMB350_CHARGER=y +CONFIG_BATTERY_BQ28400=y +CONFIG_QPNP_CHARGER=y +CONFIG_BATTERY_BCL=y +CONFIG_QPNP_BMS=y +CONFIG_SENSORS_EPM_ADC=y +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y +CONFIG_SENSORS_QPNP_ADC_CURRENT=y +CONFIG_THERMAL=y +CONFIG_THERMAL_TSENS8974=y +CONFIG_THERMAL_MONITOR=y +CONFIG_THERMAL_QPNP=y +CONFIG_THERMAL_QPNP_ADC_TM=y +CONFIG_WCD9320_CODEC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_STUB=y +CONFIG_REGULATOR_QPNP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_CORE=m +# CONFIG_MSM_CAMERA is not set +CONFIG_MSMB_CAMERA=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_CPP=y +CONFIG_MSM_CCI=y +CONFIG_MSM_CSI30_HEADER=y +CONFIG_MSM_CSIPHY=y +CONFIG_MSM_CSID=y +CONFIG_MSM_EEPROM=y +CONFIG_MSM_ISPIF=y +CONFIG_SONY_CAM_V4L2=y +CONFIG_MSMB_JPEG=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_WFD=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_VIDEOBUF2_MSM_MEM=y +# CONFIG_V4L_USB_DRIVERS is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y +CONFIG_FB=y +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_MDSS=y +CONFIG_FB_MSM_MDSS_WRITEBACK=y +CONFIG_FB_MSM_MDSS_SPECIFIC_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_MHL_SII8620_8061=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_MSM8974=y +CONFIG_SND_SOC_APQ8074=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_SONY=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_HOST_EXTRA_NOTIFICATION=y +CONFIG_USB_STORAGE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_G_ANDROID=y +CONFIG_USB_MIRRORLINK=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_BLOCK_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_MSM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_MSM_SPS_SUPPORT=y +CONFIG_LEDS_LP855X=y +CONFIG_LEDS_QPNP=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_MSM is not set +CONFIG_RTC_DRV_QPNP=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_SPS=y +CONFIG_USB_BAM=y +CONFIG_SPS_SUPPORT_BAMDMA=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_QPNP_PWM=y +CONFIG_QPNP_POWER_ON=y +CONFIG_QPNP_CLKDIV=y +CONFIG_QPNP_REVID=y +CONFIG_QPNP_COINCELL=y +CONFIG_POWERKEY_FORCECRASH=y +CONFIG_MSM_IOMMU_V1=y +CONFIG_IOMMU_PGTABLES_L2=y +CONFIG_MSM_IOMMU_VBIF_CHECK=y +CONFIG_MOBICORE_SUPPORT=m +CONFIG_MOBICORE_API=m +CONFIG_BIF=y +CONFIG_BIF_QPNP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_VFAT_FS_NO_DUALNAMES=y +CONFIG_TMPFS=y +CONFIG_ECRYPT_FS=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SYSRQ_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STRICT_DEVMEM=y +CONFIG_PID_IN_CONTEXTIDR=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_AVC_EXTRA_INFO=y +CONFIG_SECURITY_SONY_RIC=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCEDEV=y diff --git a/arch/arm/configs/aosp_shinano_leo_defconfig b/arch/arm/configs/aosp_shinano_leo_defconfig new file mode 100644 index 00000000000..974e5f7d017 --- /dev/null +++ b/arch/arm/configs/aosp_shinano_leo_defconfig @@ -0,0 +1,524 @@ +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_EXPERIMENTAL=y +CONFIG_LOCALVERSION="-perf" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_IKCONFIG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_IOSCHED_TEST=y +CONFIG_DEFAULT_ROW=y +CONFIG_ARCH_MSM=y +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_MACH_SONY_LEO=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_SMP2P=y +CONFIG_MSM_SMP2P_TEST=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +CONFIG_MSM_IPC_ROUTER_SECURITY=y +CONFIG_MSM_QMI_INTERFACE=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL_LPASS_QDSP6V5=y +CONFIG_MSM_PIL_MSS_QDSP6V5=y +CONFIG_MSM_PIL_VENUS=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_WATCHDOG_V2=y +CONFIG_MSM_MEMORY_DUMP=y +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_ADSP_LOADER=y +CONFIG_MSM_OCMEM=y +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y +CONFIG_MSM_OCMEM_DEBUG=y +CONFIG_SENSORS_ADSP=y +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_MSM_MODEM_SUBSYSTEM_RESTART_MONITOR=y +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_ENABLE_VMALLOC_SAVING=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y +CONFIG_CP_ACCESS=y +CONFIG_USE_OF=y +CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XFRM_RFC_4868_TRUNCATION=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +# CONFIG_MSM_BT_POWER is not set +CONFIG_BT_BCM4339=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_RFKILL=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +CONFIG_CMA=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_UID_STAT=y +CONFIG_TSPP=m +CONFIG_PM8941_FLASH=y +CONFIG_QPNP_VIBRATOR=y +CONFIG_QSEECOM=y +CONFIG_QPNP_MISC=y +CONFIG_NFC_PN547=y +CONFIG_NFC_PN547_PMC8974_CLK_REQ=y +CONFIG_SCSI=y +CONFIG_SCSI_TGT=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_KS8851=m +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_SLIP=y +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_CDCETHER is not set +CONFIG_USB_NET_CDC_EEM=y +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_NET_GL620A=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=y +CONFIG_USB_NET_KALMIA=y +CONFIG_USB_NET_INT51X1=y +CONFIG_USB_SIERRA_NET=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_CLEARPAD=y +CONFIG_TOUCHSCREEN_CLEARPAD_I2C=y +CONFIG_TOUCHSCREEN_CLEARPAD_RMI_DEV=y +CONFIG_TOUCHSCREEN_GEN_VKEYS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_BU520X1NVX=y +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +CONFIG_DIAG_CHAR=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MSM_QPNP_INT=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_QPNP_PIN=y +CONFIG_GPIO_QPNP_PIN_DEBUG=y +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_BQ28400=y +CONFIG_QPNP_CHARGER=y +CONFIG_BATTERY_BCL=y +CONFIG_QPNP_BMS=y +CONFIG_SENSORS_EPM_ADC=y +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y +CONFIG_SENSORS_QPNP_ADC_CURRENT=y +CONFIG_THERMAL=y +CONFIG_THERMAL_TSENS8974=y +CONFIG_THERMAL_MONITOR=y +CONFIG_THERMAL_QPNP=y +CONFIG_THERMAL_QPNP_ADC_TM=y +CONFIG_WCD9320_CODEC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_STUB=y +CONFIG_REGULATOR_QPNP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_CORE=m +# CONFIG_MSM_CAMERA is not set +CONFIG_MSMB_CAMERA=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_CPP=y +CONFIG_MSM_CCI=y +CONFIG_MSM_CSI30_HEADER=y +CONFIG_MSM_CSIPHY=y +CONFIG_MSM_CSID=y +CONFIG_MSM_EEPROM=y +CONFIG_MSM_ISPIF=y +CONFIG_SONY_CAM_V4L2=y +CONFIG_MSMB_JPEG=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_WFD=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_VIDEOBUF2_MSM_MEM=y +# CONFIG_V4L_USB_DRIVERS is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y +CONFIG_FB=y +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_MDSS=y +CONFIG_FB_MSM_MDSS_WRITEBACK=y +CONFIG_FB_MSM_MDSS_SPECIFIC_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_MHL_SII8620_8061=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_MSM8974=y +CONFIG_SND_SOC_APQ8074=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_SONY=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_HOST_EXTRA_NOTIFICATION=y +CONFIG_USB_STORAGE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_G_ANDROID=y +CONFIG_USB_MIRRORLINK=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_CACHE_FEATURE=y +CONFIG_MMC_AWAKE_HS200=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_DEV_DRV_STR_TYPE4=y +CONFIG_MMC_DISABLE_STOP_REQUEST_SKHYNIX=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_BLOCK_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_MSM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_MSM_SPS_SUPPORT=y +CONFIG_LEDS_QPNP=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_MSM is not set +CONFIG_RTC_DRV_QPNP=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_SPS=y +CONFIG_USB_BAM=y +CONFIG_SPS_SUPPORT_BAMDMA=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_QPNP_PWM=y +CONFIG_QPNP_POWER_ON=y +CONFIG_QPNP_CLKDIV=y +CONFIG_QPNP_REVID=y +CONFIG_QPNP_COINCELL=y +CONFIG_POWERKEY_FORCECRASH=y +CONFIG_MSM_IOMMU_V1=y +CONFIG_IOMMU_PGTABLES_L2=y +CONFIG_MSM_IOMMU_VBIF_CHECK=y +CONFIG_MOBICORE_SUPPORT=m +CONFIG_MOBICORE_API=m +CONFIG_BIF=y +CONFIG_BIF_QPNP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_VFAT_FS_NO_DUALNAMES=y +CONFIG_TMPFS=y +CONFIG_ECRYPT_FS=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SYSRQ_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STRICT_DEVMEM=y +CONFIG_PID_IN_CONTEXTIDR=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCEDEV=y diff --git a/arch/arm/configs/aosp_shinano_scorpion_defconfig b/arch/arm/configs/aosp_shinano_scorpion_defconfig new file mode 100644 index 00000000000..eab84c3467c --- /dev/null +++ b/arch/arm/configs/aosp_shinano_scorpion_defconfig @@ -0,0 +1,527 @@ +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_EXPERIMENTAL=y +CONFIG_LOCALVERSION="-perf" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_IKCONFIG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_IOSCHED_TEST=y +CONFIG_DEFAULT_ROW=y +CONFIG_ARCH_MSM=y +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_MACH_SONY_SCORPION=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_SMP2P=y +CONFIG_MSM_SMP2P_TEST=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +CONFIG_MSM_IPC_ROUTER_SECURITY=y +CONFIG_MSM_QMI_INTERFACE=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL_LPASS_QDSP6V5=y +CONFIG_MSM_PIL_MSS_QDSP6V5=y +CONFIG_MSM_PIL_VENUS=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_WATCHDOG_V2=y +CONFIG_MSM_MEMORY_DUMP=y +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_ADSP_LOADER=y +CONFIG_MSM_OCMEM=y +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y +CONFIG_MSM_OCMEM_DEBUG=y +CONFIG_SENSORS_ADSP=y +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_MSM_MODEM_SUBSYSTEM_RESTART_MONITOR=y +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_ENABLE_VMALLOC_SAVING=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y +CONFIG_CP_ACCESS=y +CONFIG_USE_OF=y +CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XFRM_RFC_4868_TRUNCATION=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +# CONFIG_MSM_BT_POWER is not set +CONFIG_BT_BCM4339=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_RFKILL=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +CONFIG_CMA=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_UID_STAT=y +CONFIG_TSPP=m +CONFIG_QPNP_VIBRATOR=y +CONFIG_QSEECOM=y +CONFIG_QPNP_MISC=y +CONFIG_NFC_PN547=y +CONFIG_NFC_PN547_PMC8974_CLK_REQ=y +CONFIG_AD7146=y +CONFIG_SCSI=y +CONFIG_SCSI_TGT=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_KS8851=m +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_SLIP=y +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_CDCETHER is not set +CONFIG_USB_NET_CDC_EEM=y +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_NET_GL620A=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=y +CONFIG_USB_NET_KALMIA=y +CONFIG_USB_NET_INT51X1=y +CONFIG_USB_SIERRA_NET=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_CLEARPAD=y +CONFIG_TOUCHSCREEN_CLEARPAD_I2C=y +CONFIG_TOUCHSCREEN_CLEARPAD_RMI_DEV=y +CONFIG_TOUCHSCREEN_GEN_VKEYS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_BU520X1NVX=y +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +CONFIG_DIAG_CHAR=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MSM_QPNP_INT=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_QPNP_PIN=y +CONFIG_GPIO_QPNP_PIN_DEBUG=y +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_BQ28400=y +CONFIG_QPNP_CHARGER=y +CONFIG_BATTERY_BCL=y +CONFIG_QPNP_BMS=y +CONFIG_SENSORS_EPM_ADC=y +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y +CONFIG_SENSORS_QPNP_ADC_CURRENT=y +CONFIG_THERMAL=y +CONFIG_THERMAL_TSENS8974=y +CONFIG_THERMAL_MONITOR=y +CONFIG_THERMAL_QPNP=y +CONFIG_THERMAL_QPNP_ADC_TM=y +CONFIG_WCD9320_CODEC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_STUB=y +CONFIG_REGULATOR_QPNP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_CORE=m +# CONFIG_MSM_CAMERA is not set +CONFIG_MSMB_CAMERA=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_CPP=y +CONFIG_MSM_CCI=y +CONFIG_MSM_CSI30_HEADER=y +CONFIG_MSM_CSIPHY=y +CONFIG_MSM_CSID=y +CONFIG_MSM_EEPROM=y +CONFIG_MSM_ISPIF=y +CONFIG_SONY_CAM_V4L2=y +CONFIG_MSMB_JPEG=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_WFD=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_VIDEOBUF2_MSM_MEM=y +# CONFIG_V4L_USB_DRIVERS is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y +CONFIG_FB=y +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_MDSS=y +CONFIG_FB_MSM_MDSS_WRITEBACK=y +CONFIG_FB_MSM_MDSS_SPECIFIC_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_MHL_SII8620_8061=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_MSM8974=y +CONFIG_SND_SOC_APQ8074=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_SONY=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_HOST_EXTRA_NOTIFICATION=y +CONFIG_USB_STORAGE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_G_ANDROID=y +CONFIG_USB_MIRRORLINK=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_CACHE_FEATURE=y +CONFIG_MMC_AWAKE_HS200=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_DEV_DRV_STR_TYPE4=y +CONFIG_MMC_DISABLE_STOP_REQUEST_SKHYNIX=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_BLOCK_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_MSM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_MSM_SPS_SUPPORT=y +CONFIG_MMC_SDHCI_MIMO=y +CONFIG_MMC_SDHCI_PROHIBIT_SD_SPEC3=y +CONFIG_LEDS_LP855X=y +CONFIG_LEDS_QPNP=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_MSM is not set +CONFIG_RTC_DRV_QPNP=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_SPS=y +CONFIG_USB_BAM=y +CONFIG_SPS_SUPPORT_BAMDMA=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_QPNP_PWM=y +CONFIG_QPNP_POWER_ON=y +CONFIG_QPNP_CLKDIV=y +CONFIG_QPNP_REVID=y +CONFIG_QPNP_COINCELL=y +CONFIG_POWERKEY_FORCECRASH=y +CONFIG_MSM_IOMMU_V1=y +CONFIG_IOMMU_PGTABLES_L2=y +CONFIG_MSM_IOMMU_VBIF_CHECK=y +CONFIG_MOBICORE_SUPPORT=m +CONFIG_MOBICORE_API=m +CONFIG_BIF=y +CONFIG_BIF_QPNP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_VFAT_FS_NO_DUALNAMES=y +CONFIG_TMPFS=y +CONFIG_ECRYPT_FS=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SYSRQ_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STRICT_DEVMEM=y +CONFIG_PID_IN_CONTEXTIDR=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCEDEV=y diff --git a/arch/arm/configs/aosp_shinano_scorpion_windy_defconfig b/arch/arm/configs/aosp_shinano_scorpion_windy_defconfig new file mode 100644 index 00000000000..6d4ea6ab4f3 --- /dev/null +++ b/arch/arm/configs/aosp_shinano_scorpion_windy_defconfig @@ -0,0 +1,526 @@ +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_EXPERIMENTAL=y +CONFIG_LOCALVERSION="-perf" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_IKCONFIG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_IOSCHED_TEST=y +CONFIG_DEFAULT_ROW=y +CONFIG_ARCH_MSM=y +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_MACH_SONY_SCORPION_WINDY=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_SMP2P=y +CONFIG_MSM_SMP2P_TEST=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +CONFIG_MSM_IPC_ROUTER_SECURITY=y +CONFIG_MSM_QMI_INTERFACE=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL_LPASS_QDSP6V5=y +CONFIG_MSM_PIL_MSS_QDSP6V5=y +CONFIG_MSM_PIL_VENUS=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_WATCHDOG_V2=y +CONFIG_MSM_MEMORY_DUMP=y +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_ADSP_LOADER=y +CONFIG_MSM_OCMEM=y +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y +CONFIG_MSM_OCMEM_DEBUG=y +CONFIG_SENSORS_ADSP=y +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_MSM_MODEM_SUBSYSTEM_RESTART_MONITOR=y +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_ENABLE_VMALLOC_SAVING=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y +CONFIG_CP_ACCESS=y +CONFIG_USE_OF=y +CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XFRM_RFC_4868_TRUNCATION=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +# CONFIG_MSM_BT_POWER is not set +CONFIG_BT_BCM4339=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_RFKILL=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +CONFIG_CMA=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_UID_STAT=y +CONFIG_TSPP=m +CONFIG_QPNP_VIBRATOR=y +CONFIG_QSEECOM=y +CONFIG_QPNP_MISC=y +CONFIG_NFC_PN547=y +CONFIG_NFC_PN547_PMC8974_CLK_REQ=y +CONFIG_SCSI=y +CONFIG_SCSI_TGT=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_KS8851=m +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_SLIP=y +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_CDCETHER is not set +CONFIG_USB_NET_CDC_EEM=y +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_NET_GL620A=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=y +CONFIG_USB_NET_KALMIA=y +CONFIG_USB_NET_INT51X1=y +CONFIG_USB_SIERRA_NET=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_CLEARPAD=y +CONFIG_TOUCHSCREEN_CLEARPAD_I2C=y +CONFIG_TOUCHSCREEN_CLEARPAD_RMI_DEV=y +CONFIG_TOUCHSCREEN_GEN_VKEYS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_BU520X1NVX=y +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +CONFIG_DIAG_CHAR=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MSM_QPNP_INT=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_QPNP_PIN=y +CONFIG_GPIO_QPNP_PIN_DEBUG=y +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_BQ28400=y +CONFIG_QPNP_CHARGER=y +CONFIG_BATTERY_BCL=y +CONFIG_QPNP_BMS=y +CONFIG_SENSORS_EPM_ADC=y +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y +CONFIG_SENSORS_QPNP_ADC_CURRENT=y +CONFIG_THERMAL=y +CONFIG_THERMAL_TSENS8974=y +CONFIG_THERMAL_MONITOR=y +CONFIG_THERMAL_QPNP=y +CONFIG_THERMAL_QPNP_ADC_TM=y +CONFIG_WCD9320_CODEC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_STUB=y +CONFIG_REGULATOR_QPNP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_CORE=m +# CONFIG_MSM_CAMERA is not set +CONFIG_MSMB_CAMERA=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_CPP=y +CONFIG_MSM_CCI=y +CONFIG_MSM_CSI30_HEADER=y +CONFIG_MSM_CSIPHY=y +CONFIG_MSM_CSID=y +CONFIG_MSM_EEPROM=y +CONFIG_MSM_ISPIF=y +CONFIG_SONY_CAM_V4L2=y +CONFIG_MSMB_JPEG=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_WFD=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_VIDEOBUF2_MSM_MEM=y +# CONFIG_V4L_USB_DRIVERS is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y +CONFIG_FB=y +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_MDSS=y +CONFIG_FB_MSM_MDSS_WRITEBACK=y +CONFIG_FB_MSM_MDSS_SPECIFIC_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_MHL_SII8620_8061=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_MSM8974=y +CONFIG_SND_SOC_APQ8074=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_SONY=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_HOST_EXTRA_NOTIFICATION=y +CONFIG_USB_STORAGE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_G_ANDROID=y +CONFIG_USB_MIRRORLINK=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_CACHE_FEATURE=y +CONFIG_MMC_AWAKE_HS200=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_DEV_DRV_STR_TYPE4=y +CONFIG_MMC_DISABLE_STOP_REQUEST_SKHYNIX=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_BLOCK_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_MSM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_MSM_SPS_SUPPORT=y +CONFIG_MMC_SDHCI_MIMO=y +CONFIG_MMC_SDHCI_PROHIBIT_SD_SPEC3=y +CONFIG_LEDS_LP855X=y +CONFIG_LEDS_QPNP=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_MSM is not set +CONFIG_RTC_DRV_QPNP=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_SPS=y +CONFIG_USB_BAM=y +CONFIG_SPS_SUPPORT_BAMDMA=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_QPNP_PWM=y +CONFIG_QPNP_POWER_ON=y +CONFIG_QPNP_CLKDIV=y +CONFIG_QPNP_REVID=y +CONFIG_QPNP_COINCELL=y +CONFIG_POWERKEY_FORCECRASH=y +CONFIG_MSM_IOMMU_V1=y +CONFIG_IOMMU_PGTABLES_L2=y +CONFIG_MSM_IOMMU_VBIF_CHECK=y +CONFIG_MOBICORE_SUPPORT=m +CONFIG_MOBICORE_API=m +CONFIG_BIF=y +CONFIG_BIF_QPNP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_VFAT_FS_NO_DUALNAMES=y +CONFIG_TMPFS=y +CONFIG_ECRYPT_FS=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SYSRQ_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STRICT_DEVMEM=y +CONFIG_PID_IN_CONTEXTIDR=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCEDEV=y diff --git a/arch/arm/configs/aosp_shinano_sirius_defconfig b/arch/arm/configs/aosp_shinano_sirius_defconfig new file mode 100644 index 00000000000..d805e7953fd --- /dev/null +++ b/arch/arm/configs/aosp_shinano_sirius_defconfig @@ -0,0 +1,517 @@ +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +CONFIG_EXPERIMENTAL=y +CONFIG_LOCALVERSION="-perf" +CONFIG_KERNEL_LZO=y +CONFIG_SYSVIPC=y +CONFIG_TASKSTATS=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_RCU_FAST_NO_HZ=y +CONFIG_IKCONFIG=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_RELAY=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_RD_BZIP2=y +CONFIG_RD_LZMA=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_KALLSYMS_ALL=y +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PROFILING=y +CONFIG_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_IOSCHED_TEST=y +CONFIG_DEFAULT_ROW=y +CONFIG_ARCH_MSM=y +CONFIG_ARCH_MSM8974=y +CONFIG_MSM_KRAIT_TBB_ABORT_HANDLER=y +CONFIG_MACH_SONY_SIRIUS=y +# CONFIG_MSM_STACKED_MEMORY is not set +CONFIG_CPU_HAS_L2_PMU=y +# CONFIG_MSM_FIQ_SUPPORT is not set +# CONFIG_MSM_PROC_COMM is not set +CONFIG_MSM_SMD=y +CONFIG_MSM_SMD_PKG4=y +CONFIG_MSM_BAM_DMUX=y +CONFIG_MSM_SMP2P=y +CONFIG_MSM_SMP2P_TEST=y +CONFIG_MSM_IPC_LOGGING=y +CONFIG_MSM_IPC_ROUTER=y +CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y +CONFIG_MSM_IPC_ROUTER_SECURITY=y +CONFIG_MSM_QMI_INTERFACE=y +CONFIG_MSM_SUBSYSTEM_RESTART=y +CONFIG_MSM_SYSMON_COMM=y +CONFIG_MSM_PIL_LPASS_QDSP6V5=y +CONFIG_MSM_PIL_MSS_QDSP6V5=y +CONFIG_MSM_PIL_VENUS=y +CONFIG_MSM_BUSPM_DEV=m +CONFIG_MSM_TZ_LOG=y +CONFIG_MSM_RPM_RBCPR_STATS_V2_LOG=y +CONFIG_MSM_DIRECT_SCLK_ACCESS=y +CONFIG_MSM_EVENT_TIMER=y +CONFIG_MSM_BUS_SCALING=y +CONFIG_MSM_WATCHDOG_V2=y +CONFIG_MSM_MEMORY_DUMP=y +CONFIG_MSM_DLOAD_MODE=y +CONFIG_MSM_ADSP_LOADER=y +CONFIG_MSM_OCMEM=y +CONFIG_MSM_OCMEM_LOCAL_POWER_CTRL=y +CONFIG_MSM_OCMEM_DEBUG=y +CONFIG_SENSORS_ADSP=y +CONFIG_MSM_RTB=y +CONFIG_MSM_RTB_SEPARATE_CPUS=y +CONFIG_MSM_CACHE_ERP=y +CONFIG_MSM_L1_ERR_PANIC=y +CONFIG_MSM_L1_ERR_LOG=y +CONFIG_MSM_L2_ERP_2BIT_PANIC=y +CONFIG_MSM_ENABLE_WDOG_DEBUG_CONTROL=y +CONFIG_MSM_BOOT_STATS=y +CONFIG_MSM_MODEM_SUBSYSTEM_RESTART_MONITOR=y +CONFIG_STRICT_MEMORY_RWX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_ENABLE_VMALLOC_SAVING=y +CONFIG_CC_STACKPROTECTOR=y +CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y +CONFIG_CP_ACCESS=y +CONFIG_USE_OF=y +CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +CONFIG_PM_AUTOSLEEP=y +CONFIG_PM_WAKELOCKS=y +CONFIG_PM_WAKELOCKS_LIMIT=0 +# CONFIG_PM_WAKELOCKS_GC is not set +CONFIG_PM_RUNTIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_XFRM_RFC_4868_TRUNCATION=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_INET_AH=y +CONFIG_INET_ESP=y +CONFIG_INET_IPCOMP=y +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_LOG=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_NOTRACK=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_DSCP=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_SECURITY=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE_NF_EBTABLES=y +CONFIG_BRIDGE_EBT_BROUTE=y +CONFIG_BRIDGE=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_PRIO=y +CONFIG_NET_CLS_FW=y +CONFIG_NET_CLS_U32=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=y +CONFIG_NET_EMATCH_NBYTE=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_EMATCH_META=y +CONFIG_NET_EMATCH_TEXT=y +CONFIG_NET_CLS_ACT=y +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +# CONFIG_MSM_BT_POWER is not set +CONFIG_BT_BCM4339=y +CONFIG_CFG80211=y +CONFIG_NL80211_TESTMODE=y +CONFIG_RFKILL=y +CONFIG_GENLOCK=y +CONFIG_GENLOCK_MISCDEVICE=y +CONFIG_CMA=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_UID_STAT=y +CONFIG_TSPP=m +CONFIG_PM8941_FLASH=y +CONFIG_QPNP_VIBRATOR=y +CONFIG_QSEECOM=y +CONFIG_QPNP_MISC=y +CONFIG_NFC_PN547=y +CONFIG_NFC_PN547_PMC8974_CLK_REQ=y +CONFIG_SCSI=y +CONFIG_SCSI_TGT=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=y +CONFIG_TUN=y +CONFIG_KS8851=m +# CONFIG_MSM_RMNET is not set +CONFIG_MSM_RMNET_BAM=y +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +CONFIG_PPP_ASYNC=y +CONFIG_SLIP=y +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_USBNET=y +# CONFIG_USB_NET_CDCETHER is not set +CONFIG_USB_NET_CDC_EEM=y +# CONFIG_USB_NET_CDC_NCM is not set +CONFIG_USB_NET_DM9601=y +CONFIG_USB_NET_SMSC75XX=y +CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_NET_GL620A=y +# CONFIG_USB_NET_NET1080 is not set +CONFIG_USB_NET_PLUSB=y +CONFIG_USB_NET_MCS7830=y +# CONFIG_USB_NET_CDC_SUBSET is not set +# CONFIG_USB_NET_ZAURUS is not set +CONFIG_USB_NET_CX82310_ETH=y +CONFIG_USB_NET_KALMIA=y +CONFIG_USB_NET_INT51X1=y +CONFIG_USB_SIERRA_NET=y +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_GPIO=y +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_MAX1187X=y +CONFIG_TOUCHSCREEN_GEN_VKEYS=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_HBTP_INPUT=y +CONFIG_INPUT_UINPUT=y +CONFIG_SERIAL_MSM_HS=y +CONFIG_SERIAL_MSM_HSL=y +CONFIG_SERIAL_MSM_HSL_CONSOLE=y +CONFIG_DIAG_CHAR=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_MSM=y +CONFIG_MSM_ADSPRPC=y +CONFIG_MSM_RDBG=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_QUP=y +CONFIG_SPI=y +CONFIG_SPI_QUP=y +CONFIG_SPI_SPIDEV=m +CONFIG_SPMI=y +CONFIG_SPMI_MSM_PMIC_ARB=y +CONFIG_MSM_QPNP_INT=y +CONFIG_SLIMBUS_MSM_NGD=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_QPNP_PIN=y +CONFIG_GPIO_QPNP_PIN_DEBUG=y +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_BQ28400=y +CONFIG_QPNP_CHARGER=y +CONFIG_BATTERY_BCL=y +CONFIG_QPNP_BMS=y +CONFIG_SENSORS_EPM_ADC=y +CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y +CONFIG_SENSORS_QPNP_ADC_CURRENT=y +CONFIG_THERMAL=y +CONFIG_THERMAL_TSENS8974=y +CONFIG_THERMAL_MONITOR=y +CONFIG_THERMAL_QPNP=y +CONFIG_THERMAL_QPNP_ADC_TM=y +CONFIG_WCD9320_CODEC=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_STUB=y +CONFIG_REGULATOR_QPNP=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y +CONFIG_DVB_CORE=m +# CONFIG_MSM_CAMERA is not set +CONFIG_MSMB_CAMERA=y +CONFIG_MSM_CAMERA_SENSOR=y +CONFIG_MSM_CPP=y +CONFIG_MSM_CCI=y +CONFIG_MSM_CSI30_HEADER=y +CONFIG_MSM_CSIPHY=y +CONFIG_MSM_CSID=y +CONFIG_MSM_EEPROM=y +CONFIG_MSM_ISPIF=y +CONFIG_SONY_CAM_V4L2=y +CONFIG_MSMB_JPEG=y +CONFIG_MSM_VIDC_V4L2=y +CONFIG_MSM_WFD=y +CONFIG_DVB_MPQ=m +CONFIG_DVB_MPQ_DEMUX=m +CONFIG_VIDEOBUF2_MSM_MEM=y +# CONFIG_V4L_USB_DRIVERS is not set +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_ION=y +CONFIG_ION_MSM=y +CONFIG_MSM_KGSL=y +CONFIG_KGSL_PER_PROCESS_PAGE_TABLE=y +CONFIG_FB=y +CONFIG_FB_MSM=y +# CONFIG_FB_MSM_BACKLIGHT is not set +CONFIG_FB_MSM_LOGO=y +CONFIG_FB_MSM_MDSS=y +CONFIG_FB_MSM_MDSS_WRITEBACK=y +CONFIG_FB_MSM_MDSS_SPECIFIC_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_PANEL=y +CONFIG_FB_MSM_MDSS_HDMI_MHL_SII8620_8061=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_MSM8974=y +CONFIG_SND_SOC_APQ8074=y +CONFIG_HIDRAW=y +CONFIG_UHID=y +CONFIG_HID_APPLE=y +CONFIG_HID_ELECOM=y +CONFIG_HID_LOGITECH=y +# CONFIG_HID_LOGITECH_DJ is not set +CONFIG_HID_MAGICMOUSE=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_SONY=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_EHSET=y +CONFIG_USB_EHCI_MSM=y +CONFIG_USB_HOST_EXTRA_NOTIFICATION=y +CONFIG_USB_STORAGE=y +CONFIG_USB_EHSET_TEST_FIXTURE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_DWC3_MSM=y +CONFIG_USB_G_ANDROID=y +CONFIG_USB_MIRRORLINK=y +CONFIG_MMC=y +CONFIG_MMC_PERF_PROFILING=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_CLKGATE=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_MMC_BLOCK_MINORS=32 +# CONFIG_MMC_BLOCK_BOUNCE is not set +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +CONFIG_MMC_TEST=m +CONFIG_MMC_BLOCK_TEST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_MSM=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_MSM_SPS_SUPPORT=y +CONFIG_LEDS_QPNP=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_SWITCH=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_MSM is not set +CONFIG_RTC_DRV_QPNP=y +CONFIG_UIO=y +CONFIG_UIO_MSM_SHAREDMEM=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ASHMEM=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +CONFIG_SPS=y +CONFIG_USB_BAM=y +CONFIG_SPS_SUPPORT_BAMDMA=y +CONFIG_SPS_SUPPORT_NDP_BAM=y +CONFIG_QPNP_PWM=y +CONFIG_QPNP_POWER_ON=y +CONFIG_QPNP_CLKDIV=y +CONFIG_QPNP_REVID=y +CONFIG_QPNP_COINCELL=y +CONFIG_POWERKEY_FORCECRASH=y +CONFIG_MSM_IOMMU_V1=y +CONFIG_IOMMU_PGTABLES_L2=y +CONFIG_MSM_IOMMU_VBIF_CHECK=y +CONFIG_MOBICORE_SUPPORT=m +CONFIG_MOBICORE_API=m +CONFIG_BIF=y +CONFIG_BIF_QPNP=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_VFAT_FS_NO_DUALNAMES=y +CONFIG_TMPFS=y +CONFIG_ECRYPT_FS=y +CONFIG_CIFS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_SYSRQ_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_STRICT_DEVMEM=y +CONFIG_PID_IN_CONTEXTIDR=y +CONFIG_DEBUG_SET_MODULE_RONX=y +CONFIG_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_LSM_MMAP_MIN_ADDR=4096 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_XCBC=y +CONFIG_CRYPTO_TWOFISH=y +CONFIG_CRYPTO_DEV_QCRYPTO=m +CONFIG_CRYPTO_DEV_QCE=y +CONFIG_CRYPTO_DEV_QCEDEV=y diff --git a/arch/arm/include/asm/nmi.h b/arch/arm/include/asm/nmi.h new file mode 100644 index 00000000000..552e99bfb24 --- /dev/null +++ b/arch/arm/include/asm/nmi.h @@ -0,0 +1,3 @@ +#ifndef _ASM_NMI_H +#define _ASM_NMI_H +#endif diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index d238005511c..ff5a9c19ee6 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -35,6 +35,7 @@ config ARCH_MSM8974 select USB_ARCH_HAS_XHCI select ENABLE_VMALLOC_SAVINGS select MSM_IRQ + select HAVE_NMI_WATCHDOG if MSM_WATCHDOG_V2 config ARCH_APQ8084 bool "APQ8084" @@ -388,6 +389,69 @@ config MSM_REMOTE_SPINLOCK_LDREX config MSM_REMOTE_SPINLOCK_SFPB bool +config MACH_SONY_SIRIUS + depends on ARCH_MSM8974 + bool "Sony Mobile Sirius" + help + Support for the SONY Mobile Sirius device. + It is based on QCOM MSM8974 AB chipset. + If you enable this config, + Please use SONY Mobile source tree. + +config MACH_SONY_CASTOR + depends on ARCH_MSM8974 + bool "Sony Mobile Castor" + help + Support for the SONY Mobile Castor device. + It is based on QCOM MSM8974 AB chipset. + If you enable this config, + Please use SONY Mobile source tree. + +config MACH_SONY_CASTOR_WINDY + depends on ARCH_MSM8974 + bool "Sony Mobile Castor Windy" + help + Support for the SONY Mobile Castor Windy device. + It is based on QCOM APQ8074 AB chipset. + If you enable this config, + Please use SONY Mobile source tree. + +config MACH_SONY_LEO + depends on ARCH_MSM8974 + bool "Sony Mobile Leo" + help + Support for the SONY Mobile Leo device. + It is based on QCOM MSM8974 AC chipset. + If you enable this config, + Please use SONY Mobile source tree. + +config MACH_SONY_ARIES + depends on ARCH_MSM8974 + bool "Sony Mobile Aries" + help + Support for the SONY Mobile Aries device. + It is based on QCOM MSM8974 AC chipset. + If you enable this config, + Please use SONY Mobile source tree. + +config MACH_SONY_SCORPION + depends on ARCH_MSM8974 + bool "Sony Mobile Scorpion" + help + Support for the SONY Mobile Scorpion device. + It is based on QCOM MSM8974 AC chipset. + If you enable this config, + Please use SONY Mobile source tree. + +config MACH_SONY_SCORPION_WINDY + depends on ARCH_MSM8974 + bool "Sony Mobile Scorpion Windy" + help + Support for the SONY Mobile Scorpion Windy device. + It is based on QCOM APQ8074 AC chipset. + If you enable this config, + Please use SONY Mobile source tree. + config MSM_STACKED_MEMORY bool "Stacked Memory" default y diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile index e83b6ddb2f7..fef547478cb 100644 --- a/arch/arm/mach-msm/Makefile +++ b/arch/arm/mach-msm/Makefile @@ -58,10 +58,11 @@ obj-$(CONFIG_ARCH_FSM9900) += board-fsm9900.o board-fsm9900-gpiomux.o obj-$(CONFIG_ARCH_FSM9900) += clock-fsm9900.o obj-$(CONFIG_ARCH_FSM9900) += rfic-fsm9900.o bbif-fsm9900.o obj-$(CONFIG_QPNP_BMS) += bms-batterydata.o bms-batterydata-desay.o -obj-$(CONFIG_QPNP_BMS) += bms-batterydata-oem.o bms-batterydata-qrd-4v35-2000mah.o bms-batterydata-qrd-4v2-1300mah.o +obj-$(CONFIG_QPNP_BMS) += bms-batterydata-qrd-4v35-2000mah.o bms-batterydata-qrd-4v2-1300mah.o obj-$(CONFIG_ARCH_APQ8084) += board-8084.o board-8084-gpiomux.o obj-$(CONFIG_ARCH_APQ8084) += clock-8084.o clock-mdss-8974.o -obj-$(CONFIG_ARCH_MSM8974) += board-8974.o board-8974-gpiomux.o +obj-$(CONFIG_ARCH_MSM8974) += board-8974.o +obj-$(CONFIG_ARCH_MSM8974) += board-8974-console.o obj-$(CONFIG_ARCH_MSM8974) += clock-rpm-8974.o clock-gcc-8974.o clock-mmss-8974.o clock-lpass-8974.o clock-mdss-8974.o obj-$(CONFIG_KRAIT_REGULATOR) += krait-regulator.o krait-regulator-pmic.o obj-$(CONFIG_ARCH_MDM9630) += board-9630.o board-9630-gpiomux.o @@ -80,6 +81,26 @@ obj-$(CONFIG_ARCH_MDM9630) += clock-9630.o obj-$(CONFIG_MSM_PM) += msm-pm.o pm-data.o lpm_levels.o +ifdef CONFIG_MACH_SONY_SIRIUS + obj-$(CONFIG_MACH_SONY_SIRIUS) += board-sony_sirius-gpiomux.o board-sony_sirius_samba-gpiomux-diff.o board-sony_shinano-nfc.o bms-batterydata-gouf.o +else ifdef CONFIG_MACH_SONY_CASTOR + obj-$(CONFIG_MACH_SONY_CASTOR) += board-sony_castor-gpiomux.o board-sony_shinano-nfc.o bms-batterydata-vega.o +else ifdef CONFIG_MACH_SONY_CASTOR_WINDY + obj-$(CONFIG_MACH_SONY_CASTOR_WINDY) += board-sony_castor_windy-gpiomux.o board-sony_shinano-nfc.o bms-batterydata-vega.o +else ifdef CONFIG_MACH_SONY_LEO + obj-$(CONFIG_MACH_SONY_LEO) += board-sony_leo-gpiomux.o board-sony_leo_samba-gpiomux-diff.o bms-batterydata-leo.o board-sony_shinano-nfc.o +else ifdef CONFIG_MACH_SONY_ARIES + obj-$(CONFIG_MACH_SONY_ARIES) += board-sony_aries-gpiomux.o bms-batterydata-aries.o board-sony_shinano-nfc.o +else ifdef CONFIG_MACH_SONY_SCORPION + obj-$(CONFIG_MACH_SONY_SCORPION) += board-sony_scorpion-gpiomux.o bms-batterydata-scorpion.o board-sony_shinano-nfc.o +else ifdef CONFIG_MACH_SONY_SCORPION_WINDY + obj-$(CONFIG_MACH_SONY_SCORPION_WINDY) += board-sony_scorpion_windy-gpiomux.o bms-batterydata-scorpion.o board-sony_shinano-nfc.o +else + obj-$(CONFIG_ARCH_MSM8974) += board-8974-gpiomux.o board-sony_shinano-nfc.o bms-batterydata-oem.o +endif +obj-$(CONFIG_ARCH_MSM8974) += board-sony_shinano-wifi.o +obj-$(CONFIG_ARCH_MSM8974) += board-sony_shinano-hw.o sony_gpiomux.o board-sony_shinano-gpiomux-ref.o + CFLAGS_msm_vibrator.o += -Idrivers/staging/android obj-$(CONFIG_MSM_LPM_TEST) += test-lpm.o diff --git a/arch/arm/mach-msm/Makefile.rej b/arch/arm/mach-msm/Makefile.rej new file mode 100644 index 00000000000..6485c835fc7 --- /dev/null +++ b/arch/arm/mach-msm/Makefile.rej @@ -0,0 +1,17 @@ +--- arch/arm/mach-msm/Makefile ++++ arch/arm/mach-msm/Makefile +@@ -58,11 +58,12 @@ + obj-$(CONFIG_ARCH_FSM9900) += clock-fsm9900.o + obj-$(CONFIG_ARCH_FSM9900) += rfic-fsm9900.o bbif-fsm9900.o + obj-$(CONFIG_QPNP_BMS) += bms-batterydata.o bms-batterydata-desay.o +-obj-$(CONFIG_QPNP_BMS) += bms-batterydata-oem.o bms-batterydata-qrd-4v35-2000mah.o bms-batterydata-qrd-4v2-1300mah.o ++obj-$(CONFIG_QPNP_BMS) += bms-batterydata-qrd-4v35-2000mah.o bms-batterydata-qrd-4v2-1300mah.o + obj-$(CONFIG_ARCH_APQ8084) += board-8084.o board-8084-gpiomux.o + obj-$(CONFIG_BCM4356) += board-msm-bcm4356.o + obj-$(CONFIG_ARCH_APQ8084) += clock-8084.o clock-mdss-8974.o +-obj-$(CONFIG_ARCH_MSM8974) += board-8974.o board-8974-gpiomux.o ++obj-$(CONFIG_ARCH_MSM8974) += board-8974.o ++obj-$(CONFIG_ARCH_MSM8974) += board-8974-console.o + obj-$(CONFIG_ARCH_MSM8974) += clock-rpm-8974.o clock-gcc-8974.o clock-mmss-8974.o clock-lpass-8974.o clock-mdss-8974.o + obj-$(CONFIG_KRAIT_REGULATOR) += krait-regulator.o krait-regulator-pmic.o + obj-$(CONFIG_ARCH_MDM9630) += board-9630.o board-9630-gpiomux.o diff --git a/arch/arm/mach-msm/bms-batterydata-aries.c b/arch/arm/mach-msm/bms-batterydata-aries.c new file mode 100644 index 00000000000..94855e0c485 --- /dev/null +++ b/arch/arm/mach-msm/bms-batterydata-aries.c @@ -0,0 +1,131 @@ +/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static struct single_row_lut fcc_temp = { + .x = {-10, 5, 25, 50, 65}, + .y = {2450, 2540, 2660, 2670, 2650}, + .cols = 5 +}; + +static struct pc_temp_ocv_lut pc_temp_ocv = { + .rows = 29, + .cols = 5, + .temp = {-10, 5, 25, 50, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .ocv = { + {4280, 4280, 4280, 4280, 4280}, + {4236, 4252, 4249, 4256, 4249}, + {4171, 4195, 4193, 4200, 4194}, + {4113, 4140, 4139, 4147, 4142}, + {4055, 4085, 4088, 4096, 4091}, + {4003, 4033, 4040, 4048, 4045}, + {3958, 3986, 3994, 4004, 4001}, + {3915, 3943, 3947, 3962, 3961}, + {3876, 3905, 3905, 3916, 3917}, + {3843, 3873, 3870, 3876, 3875}, + {3813, 3845, 3844, 3847, 3846}, + {3789, 3822, 3823, 3824, 3822}, + {3769, 3802, 3804, 3805, 3803}, + {3751, 3784, 3789, 3783, 3780}, + {3735, 3770, 3773, 3769, 3760}, + {3717, 3757, 3755, 3744, 3728}, + {3700, 3741, 3734, 3722, 3706}, + {3679, 3718, 3706, 3697, 3680}, + {3649, 3690, 3671, 3668, 3654}, + {3634, 3679, 3669, 3663, 3648}, + {3623, 3673, 3660, 3658, 3644}, + {3605, 3666, 3653, 3650, 3633}, + {3590, 3654, 3633, 3623, 3602}, + {3567, 3630, 3603, 3582, 3559}, + {3542, 3602, 3570, 3548, 3524}, + {3490, 3542, 3510, 3494, 3472}, + {3452, 3474, 3440, 3422, 3401}, + {3367, 3346, 3310, 3311, 3289}, + {3000, 3000, 3000, 3000, 3000}, + } +}; + +static struct sf_lut rbatt_sf = { + .rows = 29, + .cols = 5, + /* row_entries are temperature */ + .row_entries = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .sf = { + {450, 238, 113, 105, 105}, + {450, 238, 113, 105, 105}, + {450, 238, 113, 105, 105}, + {450, 238, 114, 105, 105}, + {450, 238, 115, 106, 105}, + {451, 238, 115, 106, 105}, + {451, 239, 115, 106, 105}, + {457, 245, 115, 106, 105}, + {467, 247, 115, 106, 105}, + {475, 253, 116, 107, 105}, + {484, 256, 116, 107, 106}, + {493, 263, 117, 107, 106}, + {501, 267, 117, 107, 106}, + {515, 276, 118, 107, 106}, + {523, 279, 119, 108, 107}, + {529, 286, 119, 108, 107}, + {538, 289, 119, 108, 107}, + {552, 299, 120, 109, 107}, + {572, 303, 121, 109, 108}, + {576, 309, 121, 109, 108}, + {594, 316, 121, 109, 108}, + {600, 318, 121, 110, 108}, + {610, 321, 122, 111, 108}, + {621, 329, 122, 111, 109}, + {633, 337, 123, 111, 109}, + {651, 346, 125, 112, 110}, + {684, 375, 127, 113, 111}, + {754, 429, 130, 116, 113}, + {894, 485, 157, 144, 133}, + } +}; + +struct bms_battery_data oem_batt_data_somc[BATT_VENDOR_NUM] = { + /* BATT_VENDOR_TDK */ + { + }, + /* BATT_VENDOR_SEND */ + { + .fcc = 2660, + .fcc_temp_lut = &fcc_temp, + .pc_temp_ocv_lut = &pc_temp_ocv, + .rbatt_sf_lut = &rbatt_sf, + .default_rbatt_mohm = 100, + .flat_ocv_threshold_uv = 3800000, + .r_sense_uohm = 10000, + .ocv_high_threshold_uv = 3810000, + .ocv_low_threshold_uv = 3740000, + }, + /* BATT_VENDOR_SANYO */ + { + }, + /* BATT_VENDOR_LG */ + { + }, + /* BATT_VENDOR_5TH */ + { + }, +}; + +struct bms_battery_data *bms_batt_data = &oem_batt_data_somc[0]; +int bms_batt_data_num = BATT_VENDOR_NUM; diff --git a/arch/arm/mach-msm/bms-batterydata-gouf.c b/arch/arm/mach-msm/bms-batterydata-gouf.c new file mode 100644 index 00000000000..c33905dd95a --- /dev/null +++ b/arch/arm/mach-msm/bms-batterydata-gouf.c @@ -0,0 +1,113 @@ +/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static struct single_row_lut fcc_temp = { + .x = {-10, 0, 25, 50, 65}, + .y = {3230, 3260, 3380, 3410, 3360}, + .cols = 5 +}; + +static struct pc_temp_ocv_lut pc_temp_ocv = { + .rows = 29, + .cols = 5, + .temp = {-10, 0, 25, 50, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, + 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, + 5, 4, 3, 2, 1, 0}, + .ocv = { + {4305, 4305, 4303, 4299, 4295}, + {4277, 4257, 4255, 4251, 4231}, + {4218, 4198, 4197, 4192, 4172}, + {4159, 4139, 4145, 4140, 4120}, + {4101, 4081, 4092, 4089, 4069}, + {4048, 4028, 4044, 4042, 4022}, + {4004, 3984, 4001, 3998, 3978}, + {3962, 3942, 3955, 3956, 3936}, + {3921, 3901, 3909, 3916, 3896}, + {3883, 3863, 3874, 3879, 3859}, + {3855, 3835, 3844, 3843, 3823}, + {3831, 3811, 3823, 3818, 3798}, + {3819, 3799, 3804, 3800, 3780}, + {3806, 3786, 3790, 3784, 3764}, + {3789, 3769, 3777, 3766, 3746}, + {3772, 3752, 3756, 3745, 3725}, + {3748, 3728, 3729, 3725, 3705}, + {3724, 3704, 3702, 3699, 3679}, + {3703, 3683, 3673, 3670, 3650}, + {3694, 3674, 3667, 3664, 3644}, + {3685, 3665, 3660, 3659, 3639}, + {3675, 3655, 3652, 3655, 3635}, + {3669, 3649, 3638, 3640, 3620}, + {3646, 3626, 3618, 3612, 3592}, + {3608, 3588, 3568, 3564, 3544}, + {3551, 3531, 3505, 3502, 3482}, + {3473, 3453, 3430, 3425, 3405}, + {3387, 3367, 3304, 3282, 3262}, + {3000, 3000, 3000, 3000, 3000}, + } +}; + +static struct sf_lut rbatt_sf = { + .rows = 29, + .cols = 5, + /* row_entries are temperature */ + .row_entries = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .sf = { + {400, 214, 119, 110, 109}, + {400, 214, 119, 111, 109}, + {400, 214, 119, 111, 109}, + {403, 214, 119, 111, 109}, + {403, 214, 119, 111, 109}, + {404, 214, 119, 111, 109}, + {406, 215, 120, 111, 110}, + {407, 218, 120, 111, 111}, + {415, 220, 121, 112, 111}, + {426, 224, 121, 112, 111}, + {427, 229, 122, 112, 112}, + {443, 234, 122, 112, 112}, + {460, 238, 122, 113, 112}, + {473, 243, 123, 113, 112}, + {469, 247, 124, 114, 112}, + {495, 253, 124, 114, 113}, + {507, 259, 124, 114, 113}, + {508, 259, 125, 115, 113}, + {509, 267, 126, 115, 113}, + {518, 274, 126, 115, 114}, + {518, 278, 127, 115, 114}, + {522, 283, 127, 115, 114}, + {528, 290, 127, 115, 115}, + {557, 296, 129, 116, 115}, + {562, 302, 129, 117, 116}, + {567, 321, 131, 118, 116}, + {571, 352, 132, 118, 117}, + {589, 381, 136, 121, 120}, + {633, 451, 207, 140, 151}, + } +}; + +struct bms_battery_data oem_batt_data = { + .fcc = 3380, + .fcc_temp_lut = &fcc_temp, + .pc_temp_ocv_lut = &pc_temp_ocv, + .rbatt_sf_lut = &rbatt_sf, + .default_rbatt_mohm = 100, + .flat_ocv_threshold_uv = 3800000, +}; + +struct bms_battery_data *bms_batt_data = &oem_batt_data; +int bms_batt_data_num = 1; diff --git a/arch/arm/mach-msm/bms-batterydata-leo.c b/arch/arm/mach-msm/bms-batterydata-leo.c new file mode 100644 index 00000000000..70fd8580c7d --- /dev/null +++ b/arch/arm/mach-msm/bms-batterydata-leo.c @@ -0,0 +1,227 @@ +/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static struct single_row_lut fcc_temp = { + .x = {-10, 0, 25, 50, 65}, + .y = {2820, 2900, 3140, 3170, 3150}, + .cols = 5 +}; + +static struct single_row_lut fcc_temp_lg = { + .x = {-10, 0, 25, 50, 65}, + .y = {2774, 2790, 3090, 3110, 3095}, + .cols = 5 +}; + +static struct pc_temp_ocv_lut pc_temp_ocv = { + .rows = 29, + .cols = 5, + .temp = {-10, 0, 25, 50, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, + 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, + 5, 4, 3, 2, 1, 0}, + .ocv = { + {4290, 4290, 4290, 4290, 4290}, + {4223, 4249, 4256, 4250, 4243}, + {4171, 4203, 4200, 4193, 4187}, + {4108, 4143, 4146, 4140, 4134}, + {4052, 4088, 4096, 4089, 4084}, + {4008, 4044, 4047, 4041, 4037}, + {3962, 3996, 4002, 3998, 3995}, + {3916, 3951, 3951, 3958, 3957}, + {3875, 3910, 3903, 3917, 3917}, + {3843, 3880, 3869, 3876, 3875}, + {3814, 3852, 3841, 3844, 3842}, + {3786, 3826, 3818, 3819, 3817}, + {3768, 3807, 3799, 3799, 3797}, + {3748, 3788, 3784, 3779, 3777}, + {3727, 3770, 3769, 3758, 3747}, + {3707, 3754, 3753, 3736, 3720}, + {3687, 3740, 3729, 3714, 3697}, + {3665, 3727, 3698, 3690, 3672}, + {3634, 3700, 3669, 3669, 3651}, + {3623, 3690, 3662, 3663, 3651}, + {3611, 3679, 3659, 3660, 3645}, + {3592, 3664, 3647, 3650, 3632}, + {3573, 3649, 3634, 3637, 3615}, + {3545, 3623, 3597, 3602, 3576}, + {3513, 3588, 3564, 3556, 3528}, + {3473, 3541, 3502, 3492, 3466}, + {3412, 3471, 3420, 3409, 3383}, + {3304, 3353, 3292, 3296, 3265}, + {3000, 3000, 3000, 3000, 3000}, + } +}; + +static struct pc_temp_ocv_lut pc_temp_ocv_lg = { + .rows = 29, + .cols = 5, + .temp = {-10, 0, 25, 50, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, + 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, + 5, 4, 3, 2, 1, 0}, + .ocv = { + {4280, 4280, 4280, 4280, 4280}, + {4240, 4259, 4247, 4231, 4223}, + {4191, 4215, 4191, 4175, 4171}, + {4141, 4168, 4137, 4122, 4124}, + {4090, 4120, 4086, 4071, 4075}, + {4039, 4074, 4038, 4025, 4030}, + {3997, 4027, 3993, 3982, 3990}, + {3956, 3981, 3953, 3944, 3957}, + {3919, 3940, 3908, 3900, 3914}, + {3882, 3903, 3863, 3855, 3864}, + {3857, 3872, 3835, 3827, 3833}, + {3835, 3848, 3813, 3807, 3814}, + {3817, 3829, 3796, 3791, 3796}, + {3797, 3811, 3782, 3776, 3781}, + {3782, 3798, 3768, 3757, 3765}, + {3765, 3781, 3751, 3736, 3741}, + {3747, 3763, 3727, 3710, 3711}, + {3726, 3739, 3696, 3680, 3675}, + {3695, 3714, 3673, 3659, 3653}, + {3688, 3705, 3668, 3653, 3649}, + {3675, 3695, 3657, 3647, 3642}, + {3664, 3684, 3645, 3631, 3632}, + {3655, 3672, 3631, 3607, 3621}, + {3636, 3654, 3606, 3559, 3583}, + {3604, 3609, 3559, 3518, 3533}, + {3564, 3553, 3497, 3478, 3471}, + {3473, 3450, 3418, 3408, 3388}, + {3336, 3331, 3290, 3275, 3253}, + {3000, 3000, 3000, 3000, 3000}, + } +}; + +static struct sf_lut rbatt_sf = { + .rows = 29, + .cols = 5, + /* row_entries are temperature */ + .row_entries = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .sf = { + {414, 208, 105, 95, 94}, + {416, 208, 105, 95, 94}, + {418, 208, 105, 95, 94}, + {421, 208, 105, 96, 94}, + {423, 209, 105, 96, 94}, + {426, 209, 106, 96, 94}, + {429, 211, 106, 96, 95}, + {432, 213, 106, 96, 95}, + {435, 217, 106, 96, 95}, + {439, 222, 107, 96, 95}, + {443, 226, 108, 97, 96}, + {447, 233, 108, 97, 96}, + {452, 240, 109, 98, 97}, + {457, 247, 110, 98, 97}, + {464, 254, 111, 99, 97}, + {471, 256, 112, 99, 98}, + {480, 261, 112, 99, 98}, + {492, 268, 112, 99, 98}, + {509, 275, 113, 100, 98}, + {513, 281, 113, 100, 99}, + {518, 285, 114, 101, 99}, + {524, 289, 114, 101, 99}, + {530, 292, 114, 101, 99}, + {538, 296, 115, 101, 100}, + {547, 301, 116, 102, 100}, + {559, 310, 119, 103, 101}, + {575, 329, 121, 103, 101}, + {604, 345, 124, 105, 103}, + {724, 401, 172, 198, 111}, + } +}; + +static struct sf_lut rbatt_sf_lg = { + .rows = 29, + .cols = 5, + /* row_entries are temperature */ + .row_entries = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .sf = { + {605, 318, 119, 107, 104}, + {605, 318, 119, 108, 104}, + {605, 318, 120, 108, 105}, + {605, 319, 120, 108, 105}, + {605, 321, 121, 108, 105}, + {606, 326, 122, 109, 106}, + {609, 332, 122, 109, 106}, + {613, 341, 123, 109, 106}, + {620, 351, 124, 110, 106}, + {628, 364, 125, 110, 106}, + {639, 378, 126, 111, 106}, + {651, 394, 127, 111, 106}, + {666, 413, 129, 112, 106}, + {682, 433, 131, 113, 107}, + {700, 455, 136, 114, 107}, + {721, 479, 141, 116, 107}, + {743, 505, 145, 118, 108}, + {767, 533, 149, 117, 108}, + {793, 564, 157, 120, 110}, + {799, 570, 159, 121, 110}, + {804, 576, 160, 122, 110}, + {810, 583, 162, 123, 110}, + {815, 589, 166, 125, 111}, + {821, 596, 171, 126, 112}, + {827, 602, 176, 127, 113}, + {833, 609, 182, 129, 114}, + {839, 616, 191, 132, 116}, + {845, 623, 203, 137, 119}, + {851, 630, 228, 173, 128}, + } +}; + +struct bms_battery_data oem_batt_data_somc[BATT_VENDOR_NUM] = { + /* BATT_VENDOR_TDK */ + { + }, + /* BATT_VENDOR_SEND */ + { + .fcc = 3140, + .fcc_temp_lut = &fcc_temp, + .pc_temp_ocv_lut = &pc_temp_ocv, + .rbatt_sf_lut = &rbatt_sf, + .default_rbatt_mohm = 100, + .flat_ocv_threshold_uv = 3800000, + .r_sense_uohm = 10000, + .ocv_high_threshold_uv = 3810000, + .ocv_low_threshold_uv = 3740000, + }, + /* BATT_VENDOR_SANYO */ + { + }, + /* BATT_VENDOR_LG */ + { + .fcc = 3090, + .fcc_temp_lut = &fcc_temp_lg, + .pc_temp_ocv_lut = &pc_temp_ocv_lg, + .rbatt_sf_lut = &rbatt_sf_lg, + .default_rbatt_mohm = 100, + .flat_ocv_threshold_uv = 3800000, + .r_sense_uohm = 10000, + .ocv_high_threshold_uv = 3810000, + .ocv_low_threshold_uv = 3740000, + }, + /* BATT_VENDOR_5TH */ + { + }, +}; + +struct bms_battery_data *bms_batt_data = &oem_batt_data_somc[0]; +int bms_batt_data_num = BATT_VENDOR_NUM; diff --git a/arch/arm/mach-msm/bms-batterydata-oem.c b/arch/arm/mach-msm/bms-batterydata-oem.c index e940610eb02..20011871f07 100644 --- a/arch/arm/mach-msm/bms-batterydata-oem.c +++ b/arch/arm/mach-msm/bms-batterydata-oem.c @@ -1,4 +1,5 @@ /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -108,3 +109,6 @@ struct bms_battery_data oem_batt_data = { .flat_ocv_threshold_uv = 3800000, .battery_type = "oem_batt_data", }; + +struct bms_battery_data *bms_batt_data = &oem_batt_data; +int bms_batt_data_num = 1; diff --git a/arch/arm/mach-msm/bms-batterydata-scorpion.c b/arch/arm/mach-msm/bms-batterydata-scorpion.c new file mode 100644 index 00000000000..90b9905bf58 --- /dev/null +++ b/arch/arm/mach-msm/bms-batterydata-scorpion.c @@ -0,0 +1,131 @@ +/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static struct single_row_lut fcc_temp = { + .x = {-10, 0, 25, 40, 65}, + .y = {4195, 4443, 4633, 4624, 4590}, + .cols = 5 +}; + +static struct pc_temp_ocv_lut pc_temp_ocv = { + .rows = 29, + .cols = 5, + .temp = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, + 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, + 5, 4, 3, 2, 1, 0}, + .ocv = { + {4315, 4313, 4311, 4300, 4291}, + {4224, 4239, 4242, 4238, 4231}, + {4158, 4179, 4184, 4182, 4176}, + {4108, 4122, 4130, 4129, 4124}, + {4055, 4065, 4079, 4079, 4074}, + {4006, 4010, 4031, 4033, 4029}, + {3961, 3961, 3986, 3990, 3987}, + {3921, 3927, 3941, 3949, 3948}, + {3885, 3889, 3897, 3904, 3907}, + {3851, 3860, 3861, 3865, 3863}, + {3823, 3832, 3835, 3838, 3836}, + {3799, 3808, 3814, 3816, 3815}, + {3779, 3790, 3797, 3799, 3797}, + {3762, 3774, 3782, 3785, 3782}, + {3745, 3760, 3768, 3769, 3763}, + {3728, 3747, 3750, 3745, 3731}, + {3715, 3728, 3731, 3726, 3710}, + {3682, 3701, 3702, 3699, 3684}, + {3670, 3672, 3671, 3668, 3654}, + {3663, 3648, 3667, 3665, 3651}, + {3657, 3640, 3662, 3660, 3647}, + {3649, 3629, 3655, 3654, 3641}, + {3639, 3613, 3643, 3640, 3623}, + {3628, 3591, 3611, 3610, 3587}, + {3617, 3557, 3563, 3562, 3543}, + {3603, 3498, 3502, 3500, 3486}, + {3585, 3411, 3421, 3417, 3407}, + {3560, 3426, 3297, 3296, 3295}, + {3000, 3000, 3000, 3000, 3000}, + } +}; + +static struct sf_lut rbatt_sf = { + .rows = 29, + .cols = 5, + /* row_entries are temperature */ + .row_entries = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .sf = { + {289, 158, 83, 78, 78}, + {289, 158, 83, 78, 78}, + {289, 158, 83, 78, 78}, + {289, 158, 84, 78, 78}, + {289, 158, 84, 78, 78}, + {289, 159, 84, 78, 78}, + {290, 160, 84, 78, 78}, + {292, 162, 84, 78, 79}, + {294, 165, 85, 78, 79}, + {300, 169, 85, 79, 79}, + {306, 173, 85, 79, 79}, + {310, 177, 86, 79, 79}, + {318, 183, 86, 79, 79}, + {325, 187, 87, 79, 79}, + {331, 190, 87, 80, 80}, + {340, 194, 88, 80, 80}, + {347, 200, 88, 80, 80}, + {354, 205, 89, 80, 80}, + {357, 211, 89, 81, 80}, + {362, 219, 90, 81, 81}, + {365, 224, 90, 81, 81}, + {369, 225, 90, 81, 81}, + {371, 232, 91, 81, 81}, + {378, 233, 91, 82, 81}, + {379, 246, 92, 82, 81}, + {383, 260, 93, 83, 82}, + {389, 273, 94, 84, 82}, + {396, 352, 98, 86, 83}, + {775, 475, 131, 106, 98}, + } +}; + +struct bms_battery_data oem_batt_data_somc[BATT_VENDOR_NUM] = { + /* BATT_VENDOR_TDK */ + { + }, + /* BATT_VENDOR_SEND */ + { + .fcc = 4633, + .fcc_temp_lut = &fcc_temp, + .pc_temp_ocv_lut = &pc_temp_ocv, + .rbatt_sf_lut = &rbatt_sf, + .default_rbatt_mohm = 100, + .flat_ocv_threshold_uv = 3800000, + .r_sense_uohm = 10000, + .ocv_high_threshold_uv = 3850000, + .ocv_low_threshold_uv = 3750000, + }, + /* BATT_VENDOR_SANYO */ + { + }, + /* BATT_VENDOR_LG */ + { + }, + /* BATT_VENDOR_5TH */ + { + }, +}; + +struct bms_battery_data *bms_batt_data = &oem_batt_data_somc[0]; +int bms_batt_data_num = BATT_VENDOR_NUM; diff --git a/arch/arm/mach-msm/bms-batterydata-vega.c b/arch/arm/mach-msm/bms-batterydata-vega.c new file mode 100644 index 00000000000..baab66800c1 --- /dev/null +++ b/arch/arm/mach-msm/bms-batterydata-vega.c @@ -0,0 +1,113 @@ +/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static struct single_row_lut fcc_temp = { + .x = {-10, 0, 25, 50, 65}, + .y = {6010, 6070, 6680, 6780, 6670}, + .cols = 5 +}; + +static struct pc_temp_ocv_lut pc_temp_ocv = { + .rows = 29, + .cols = 5, + .temp = {-10, 0, 25, 50, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, + 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, + 5, 4, 3, 2, 1, 0}, + .ocv = { + {4288, 4288, 4306, 4315, 4315}, + {4261, 4241, 4259, 4266, 4246}, + {4201, 4181, 4201, 4207, 4187}, + {4153, 4133, 4150, 4155, 4135}, + {4105, 4085, 4100, 4104, 4084}, + {4058, 4038, 4052, 4058, 4038}, + {4012, 3992, 4004, 4014, 3994}, + {3970, 3950, 3959, 3971, 3951}, + {3931, 3911, 3915, 3927, 3907}, + {3899, 3879, 3880, 3884, 3864}, + {3873, 3853, 3851, 3853, 3833}, + {3848, 3828, 3827, 3829, 3809}, + {3829, 3809, 3808, 3809, 3789}, + {3815, 3795, 3791, 3791, 3771}, + {3801, 3781, 3775, 3772, 3752}, + {3785, 3765, 3751, 3746, 3726}, + {3767, 3747, 3727, 3719, 3699}, + {3750, 3730, 3702, 3692, 3672}, + {3728, 3708, 3680, 3672, 3652}, + {3720, 3700, 3676, 3665, 3645}, + {3712, 3692, 3670, 3660, 3645}, + {3695, 3675, 3658, 3648, 3633}, + {3662, 3647, 3629, 3620, 3610}, + {3620, 3605, 3589, 3580, 3570}, + {3562, 3552, 3538, 3529, 3519}, + {3490, 3480, 3474, 3470, 3465}, + {3403, 3398, 3388, 3380, 3375}, + {3320, 3300, 3255, 3221, 3206}, + {3000, 3000, 3000, 3000, 3000}, + } +}; + +static struct sf_lut rbatt_sf = { + .rows = 29, + .cols = 5, + /* row_entries are temperature */ + .row_entries = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .sf = { + {270, 175, 86, 77, 77}, + {271, 175, 86, 77, 77}, + {273, 175, 85, 77, 77}, + {276, 175, 85, 77, 77}, + {278, 176, 85, 77, 77}, + {282, 177, 86, 77, 77}, + {285, 178, 86, 77, 77}, + {289, 180, 86, 77, 77}, + {293, 183, 86, 77, 78}, + {298, 186, 87, 78, 78}, + {303, 190, 87, 78, 78}, + {308, 194, 88, 79, 78}, + {314, 199, 89, 79, 79}, + {320, 204, 89, 79, 79}, + {327, 210, 90, 80, 79}, + {333, 216, 91, 80, 79}, + {341, 224, 91, 80, 80}, + {348, 231, 92, 80, 80}, + {356, 239, 93, 81, 80}, + {358, 241, 93, 81, 80}, + {360, 243, 93, 81, 80}, + {361, 245, 94, 81, 80}, + {363, 246, 94, 82, 80}, + {365, 248, 95, 82, 80}, + {366, 250, 95, 82, 81}, + {368, 252, 96, 83, 81}, + {370, 254, 97, 83, 81}, + {372, 272, 98, 84, 82}, + {375, 286, 99, 85, 83}, + } +}; + +struct bms_battery_data oem_batt_data = { + .fcc = 6680, + .fcc_temp_lut = &fcc_temp, + .pc_temp_ocv_lut = &pc_temp_ocv, + .rbatt_sf_lut = &rbatt_sf, + .default_rbatt_mohm = 100, + .flat_ocv_threshold_uv = 3800000, +}; + +struct bms_battery_data *bms_batt_data = &oem_batt_data; +int bms_batt_data_num = 1; diff --git a/arch/arm/mach-msm/bms-batterydata-zock.c b/arch/arm/mach-msm/bms-batterydata-zock.c new file mode 100644 index 00000000000..56c368d56a9 --- /dev/null +++ b/arch/arm/mach-msm/bms-batterydata-zock.c @@ -0,0 +1,113 @@ +/* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static struct single_row_lut fcc_temp = { + .x = {-10, 0, 25, 50, 65}, + .y = {2810, 2840, 3090, 3120, 3070}, + .cols = 5 +}; + +static struct pc_temp_ocv_lut pc_temp_ocv = { + .rows = 29, + .cols = 5, + .temp = {-10, 0, 25, 50, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, + 40, 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, + 5, 4, 3, 2, 1, 0}, + .ocv = { + {4306, 4306, 4307, 4298, 4298}, + {4282, 4262, 4260, 4254, 4234}, + {4227, 4207, 4206, 4200, 4180}, + {4171, 4151, 4153, 4150, 4130}, + {4116, 4096, 4105, 4101, 4081}, + {4067, 4047, 4058, 4056, 4036}, + {4023, 4003, 4014, 4012, 3992}, + {3982, 3962, 3969, 3969, 3949}, + {3945, 3925, 3926, 3927, 3907}, + {3909, 3889, 3889, 3891, 3871}, + {3884, 3864, 3857, 3857, 3837}, + {3859, 3839, 3835, 3833, 3813}, + {3837, 3817, 3815, 3812, 3792}, + {3817, 3797, 3799, 3793, 3773}, + {3803, 3783, 3782, 3774, 3754}, + {3791, 3771, 3763, 3751, 3731}, + {3775, 3755, 3744, 3728, 3708}, + {3755, 3735, 3723, 3704, 3684}, + {3732, 3712, 3697, 3680, 3660}, + {3728, 3708, 3690, 3675, 3655}, + {3722, 3702, 3683, 3665, 3645}, + {3709, 3689, 3674, 3655, 3635}, + {3695, 3675, 3654, 3631, 3611}, + {3669, 3649, 3616, 3597, 3577}, + {3619, 3599, 3564, 3547, 3527}, + {3556, 3536, 3495, 3487, 3467}, + {3469, 3449, 3416, 3406, 3386}, + {3378, 3358, 3290, 3263, 3243}, + {3000, 3000, 3000, 3000, 3000}, + } +}; + +static struct sf_lut rbatt_sf = { + .rows = 29, + .cols = 5, + /* row_entries are temperature */ + .row_entries = {-10, 0, 25, 40, 65}, + .percent = {100, 95, 90, 85, 80, 75, 70, 65, 60, 55, 50, 45, 40, + 35, 30, 25, 20, 15, 10, 9, 8, 7, 6, 5, + 4, 3, 2, 1, 0}, + .sf = { + {399, 224, 114, 104, 103}, + {399, 224, 114, 104, 103}, + {400, 224, 114, 104, 103}, + {402, 225, 114, 104, 103}, + {405, 226, 114, 104, 103}, + {409, 228, 115, 104, 103}, + {407, 234, 115, 105, 104}, + {409, 237, 115, 105, 104}, + {418, 240, 116, 105, 104}, + {429, 244, 117, 105, 105}, + {435, 253, 117, 106, 105}, + {446, 261, 119, 106, 105}, + {457, 263, 120, 107, 105}, + {460, 274, 120, 107, 106}, + {468, 279, 122, 108, 106}, + {475, 286, 122, 108, 106}, + {486, 293, 123, 108, 107}, + {498, 298, 124, 109, 107}, + {529, 305, 125, 109, 108}, + {525, 319, 125, 110, 108}, + {531, 325, 126, 110, 108}, + {539, 327, 126, 110, 108}, + {548, 332, 127, 110, 108}, + {559, 341, 128, 110, 109}, + {571, 351, 129, 111, 109}, + {585, 346, 130, 112, 110}, + {601, 356, 133, 113, 111}, + {620, 391, 136, 116, 112}, + {641, 420, 159, 132, 129}, + } +}; + +struct bms_battery_data oem_batt_data = { + .fcc = 3090, + .fcc_temp_lut = &fcc_temp, + .pc_temp_ocv_lut = &pc_temp_ocv, + .rbatt_sf_lut = &rbatt_sf, + .default_rbatt_mohm = 100, + .flat_ocv_threshold_uv = 3800000, +}; + +struct bms_battery_data *bms_batt_data = &oem_batt_data; +int bms_batt_data_num = 1; diff --git a/arch/arm/mach-msm/board-8974-console.c b/arch/arm/mach-msm/board-8974-console.c new file mode 100644 index 00000000000..70cb5a1a588 --- /dev/null +++ b/arch/arm/mach-msm/board-8974-console.c @@ -0,0 +1,35 @@ +/* arch/arm/mach-msm/board-8974-console.c + * + * Copyright (C) 2013 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include + +#define CONSOLE_NAME "ttyHSL" +#define CONSOLE_IX 0 +#define CONSOLE_OPTIONS "115200,n8" + +static int __init setup_serial_console(char *console_flag) +{ + if (console_flag && + strnlen(console_flag, COMMAND_LINE_SIZE) >= 2 && + (console_flag[0] != '0' || console_flag[1] != '0')) + add_preferred_console(CONSOLE_NAME, + CONSOLE_IX, + CONSOLE_OPTIONS); + return 1; +} + +/* +* The S1 Boot configuration TA unit can specify that the serial console +* enable flag will be passed as Kernel boot arg with tag babe09A9. +*/ +__setup("oemandroidboot.babe09a9=", setup_serial_console); diff --git a/arch/arm/mach-msm/board-sony_aries-gpiomux.c b/arch/arm/mach-msm/board-sony_aries-gpiomux.c new file mode 100644 index 00000000000..73de4c97c0e --- /dev/null +++ b/arch/arm/mach-msm/board-sony_aries-gpiomux.c @@ -0,0 +1,1117 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include "sony_gpiomux.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_up_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_FOLLOW_QCT, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting gpio_2ma_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting mhl_spi = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_tx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_rx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting cam_mclk = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting cam_i2c = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting nfc_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_clk_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_clk_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_tx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_rx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_cts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_rts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting ts_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting damp_i2s = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_pcm = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting peripheral_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sensors_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting mdp_vsync_p = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct msm_gpiomux_config lcd_config __initdata = { + .gpio = 78, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, +}; + +static struct msm_gpiomux_config touch_config __initdata = { + .gpio = 85, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, +}; + +static struct msm_gpiomux_config shinano_all_configs[] __initdata = { + { /* MHL_SPI_MOSI */ + .gpio = 0, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_MISO */ + .gpio = 1, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CS_N */ + .gpio = 2, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* UART_TX_DFMS */ + .gpio = 4, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_tx, + [GPIOMUX_SUSPENDED] = &debug_uart_tx, + }, + }, + { /* UART_RX_DTMS */ + .gpio = 5, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_rx, + [GPIOMUX_SUSPENDED] = &debug_uart_rx, + }, + }, + { /* NC */ + .gpio = 6, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 7, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_SERVICE */ + .gpio = 8, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* UIM1_DETECT */ + .gpio = 9, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* MHL_SWITCH_SEL_1 */ + .gpio = 10, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_SWITCH_SEL_2 */ + .gpio = 11, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MDP_VSYNC_P */ + .gpio = 12, + .settings = { + [GPIOMUX_ACTIVE] = &mdp_vsync_p, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 13, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 14, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CAM0_MCLK0 */ + .gpio = 15, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_RST_N */ + .gpio = 16, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM1_MCLK2 */ + .gpio = 17, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CHATCAM_RESET_N */ + .gpio = 18, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM0_I2C_SDA0 */ + .gpio = 19, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM0_I2C_SCL0 */ + .gpio = 20, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SDA1 */ + .gpio = 21, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SCL1 */ + .gpio = 22, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* MHL_PWR_EN */ + .gpio = 23, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_IRQ_FELICA_INT_N */ + .gpio = 24, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PON_VOLTAGE_SEL */ + .gpio = 25, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* NC(LCD_ID) */ + .gpio = 26, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC */ + .gpio = 27, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 28, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NFC_I2C_SDA */ + .gpio = 29, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* NFC_I2C_SCL */ + .gpio = 30, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* MHL_FW_WAKE */ + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* HDMI_DDC_CLK */ + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_DDC_DATA */ + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_HOT_PLUG_DET */ + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WLAN_SDIO_DATA_3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_clk_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_clk_suspend, + }, + }, + { /* BT_UART_TX */ + .gpio = 41, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_tx, + [GPIOMUX_SUSPENDED] = &bt_uart_tx, + }, + }, + { /* BT_UART_RX */ + .gpio = 42, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rx, + [GPIOMUX_SUSPENDED] = &bt_uart_rx, + }, + }, + { /* BT_UART_CTS_N */ + .gpio = 43, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_cts, + [GPIOMUX_SUSPENDED] = &bt_uart_cts, + }, + }, + { /* BT_UART_RTS_N */ + .gpio = 44, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rts, + [GPIOMUX_SUSPENDED] = &bt_uart_rts, + }, + }, + { /* NC */ + .gpio = 45, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 46, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_I2C_SDA */ + .gpio = 47, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* TS_I2C_SCL */ + .gpio = 48, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* NC(UIM2_DATA) */ + .gpio = 49, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_CLK) */ + .gpio = 50, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_RST) */ + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_DETECT) */ + .gpio = 52, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 53, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 54, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* DEBUG_GPIO0 */ + .gpio = 55, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DEBUG_GPIO1 */ + .gpio = 56, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* FELICA_PON_OR_NFC_DWLD_EN */ + .gpio = 57, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DAMP_I2S_CLK */ + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_WS */ + .gpio = 59, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D0 */ + .gpio = 60, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D1 */ + .gpio = 61, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* SD_CARD_DET_N */ + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* CODEC_RESET_N */ + .gpio = 63, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MHL_INT */ + .gpio = 64, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* ACCEL_INT2 */ + .gpio = 65, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* GYRO_INT1 */ + .gpio = 66, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WL_HOST_WAKE */ + .gpio = 67, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 68, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 69, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SLIMBUS_CLK */ + .gpio = 70, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* SLIMBUS_DATA */ + .gpio = 71, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CODEC_INT1 */ + .gpio = 72, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* ACCEL_INT1 */ + .gpio = 73, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PROX_ALS_INT_N */ + .gpio = 74, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* GYRO_INT2 */ + .gpio = 75, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 76, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 77, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* BT_PCM_SCLK */ + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_SYNC */ + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DIN */ + .gpio = 81, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DOUT */ + .gpio = 82, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* PERIPHERAL_I2C_SDA */ + .gpio = 83, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* PERIPHERAL_I2C_SCL */ + .gpio = 84, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* TS_INT_N */ + .gpio = 86, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* SENSORS_I2C_SDA */ + .gpio = 87, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* SENSORS_I2C_SCL */ + .gpio = 88, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* NC */ + .gpio = 89, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 90, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 91, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 92, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CODEC_INT2 */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CAM0_RST_N */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* BT_HOST_WAKE */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BT_DEV_WAKE */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* UIM1_DATA */ + .gpio = 97, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_CLK */ + .gpio = 98, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_RST */ + .gpio = 99, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(UIM1_DETECT) */ + .gpio = 100, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BATT_REM_ALARM */ + .gpio = 101, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* MHL_SPI_DVLD */ + .gpio = 102, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* FORCED_USB_BOOT */ + .gpio = 103, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 104, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* MAIN_TERM_SW_SEL2 */ + .gpio = 105, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC */ + .gpio = 106, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 107, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_TX_LB4 */ + .gpio = 108, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MAIN_TERM_SW_SEL */ + .gpio = 109, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 110, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 111, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GRFC8 [WDOG_DISABLE] */ + .gpio = 112, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(BOOT_CONFIG_1) */ + .gpio = 113, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_2]) */ + .gpio = 114, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_3]) */ + .gpio = 115, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TX_GTR_THRES [BOOT_CONFIG_4] */ + .gpio = 116, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(Reserved for ANT_TUNE0) */ + .gpio = 117, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_WB_CPL */ + .gpio = 118, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 119, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_PRX_LB3 */ + .gpio = 120, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* SW_PRX_LB41 */ + .gpio = 121, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 122, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 123, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 124, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 125, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 126, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 127, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* EXT_GPS_LNA_EN */ + .gpio = 128, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 129, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* LTE_ACTIVE */ + .gpio = 130, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* LTE_TX_COEX_WCN */ + .gpio = 131, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* WCN_TX_COEX_LTE */ + .gpio = 132, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WTR0_SSBI1_TX_GPS */ + .gpio = 133, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WTR0_SSBI2_PRX_DRX */ + .gpio = 134, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 135, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 136, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 137, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GSM_TX_PHASE_D1 */ + .gpio = 138, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* GSM_TX_PHASE_D0 */ + .gpio = 139, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_CLK */ + .gpio = 140, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_DATA */ + .gpio = 141, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_CLK */ + .gpio = 142, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_DATA */ + .gpio = 143, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* (NC)HSIC_STROBE */ + .gpio = 144, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* (NC)HSIC_DATA */ + .gpio = 145, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, +}; + +void __init msm_8974_init_gpiomux(void) +{ + int rc; + + rc = sony_init_gpiomux(shinano_all_configs, + ARRAY_SIZE(shinano_all_configs)); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return; + } + + msm_gpiomux_install_nowrite(&lcd_config, 1); + msm_gpiomux_install_nowrite(&touch_config, 1); +} diff --git a/arch/arm/mach-msm/board-sony_castor-gpiomux.c b/arch/arm/mach-msm/board-sony_castor-gpiomux.c new file mode 100644 index 00000000000..288f27591f0 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_castor-gpiomux.c @@ -0,0 +1,1126 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include "sony_gpiomux.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_up_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_FOLLOW_QCT, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting gpio_2ma_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting mhl_spi = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_tx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_rx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting cam_mclk = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting cam_i2c = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting nfc_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_clk_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_clk_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_tx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_rx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_cts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_rts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting ts_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting damp_i2s = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_pcm = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting peripheral_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sensors_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting hsic = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct msm_gpiomux_config bl_config __initdata = { + .gpio = 69, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, +}; + +static struct msm_gpiomux_config shinano_all_configs[] __initdata = { + { /* MHL_SPI_MOSI */ + .gpio = 0, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_MISO */ + .gpio = 1, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CS_N */ + .gpio = 2, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* UART_TX_DFMS */ + .gpio = 4, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_tx, + [GPIOMUX_SUSPENDED] = &debug_uart_tx, + }, + }, + { /* UART_RX_DTMS */ + .gpio = 5, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_rx, + [GPIOMUX_SUSPENDED] = &debug_uart_rx, + }, + }, + { /* LCD_I2C_SDA */ + .gpio = 6, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, + }, + { /* LCD_I2C_SCL */ + .gpio = 7, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, + }, + { /* SW_SERVICE */ + .gpio = 8, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* UIM1_DETECT */ + .gpio = 9, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* MHL_SWITCH_SEL_1 */ + .gpio = 10, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_SWITCH_SEL_2 */ + .gpio = 11, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC(MDP_VSYNC_P) */ + .gpio = 12, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TUNER_RST_N) */ + .gpio = 13, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TUNER_PWR_EN) */ + .gpio = 14, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CAM0_MCLK0 */ + .gpio = 15, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_RST_N */ + .gpio = 16, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM1_MCLK2 */ + .gpio = 17, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CHATCAM_RESET_N */ + .gpio = 18, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM0_I2C_SDA0 */ + .gpio = 19, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM0_I2C_SCL0 */ + .gpio = 20, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SDA1 */ + .gpio = 21, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SCL1 */ + .gpio = 22, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* MHL_PWR_EN */ + .gpio = 23, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_IRQ_FELICA_INT_N */ + .gpio = 24, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PON_VOLTAGE_SEL */ + .gpio = 25, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* LCD_ID */ + .gpio = 26, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC(FELICA_UART_TX) */ + .gpio = 27, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(FELICA_UART_RX) */ + .gpio = 28, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NFC_I2C_SDA */ + .gpio = 29, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* NFC_I2C_SCL */ + .gpio = 30, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* MHL_FW_WAKE */ + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* HDMI_DDC_CLK */ + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_DDC_DATA */ + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_HOT_PLUG_DET */ + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WLAN_SDIO_DATA_3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_clk_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_clk_suspend, + }, + }, + { /* BT_UART_TX */ + .gpio = 41, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_tx, + [GPIOMUX_SUSPENDED] = &bt_uart_tx, + }, + }, + { /* BT_UART_RX */ + .gpio = 42, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rx, + [GPIOMUX_SUSPENDED] = &bt_uart_rx, + }, + }, + { /* BT_UART_CTS_N */ + .gpio = 43, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_cts, + [GPIOMUX_SUSPENDED] = &bt_uart_cts, + }, + }, + { /* BT_UART_RTS_N */ + .gpio = 44, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rts, + [GPIOMUX_SUSPENDED] = &bt_uart_rts, + }, + }, + { /* NC */ + .gpio = 45, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 46, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_I2C_SDA */ + .gpio = 47, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* TS_I2C_SCL */ + .gpio = 48, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* NC(UIM2_DATA) */ + .gpio = 49, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_CLK) */ + .gpio = 50, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_RST) */ + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_DETECT) */ + .gpio = 52, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* UART_TX_IR */ + .gpio = 53, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* UART_RX_IR */ + .gpio = 54, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* DEBUG_GPIO0 */ + .gpio = 55, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DEBUG_GPIO1 */ + .gpio = 56, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_DWLD_EN */ + .gpio = 57, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DAMP_I2S_SCLK */ + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_WS */ + .gpio = 59, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D0 */ + .gpio = 60, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D1 */ + .gpio = 61, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* SD_CARD_DET_N */ + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* CODEC_RESET_N */ + .gpio = 63, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MHL_INT */ + .gpio = 64, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* ACCEL_INT2 */ + .gpio = 65, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* GYRO_INT1 */ + .gpio = 66, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WL_HOST_WAKE */ + .gpio = 67, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(TUNER_INT) */ + .gpio = 68, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SLIMBUS_CLK */ + .gpio = 70, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* SLIMBUS_DATA */ + .gpio = 71, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CODEC_INT1 */ + .gpio = 72, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* ACCEL_INT1 */ + .gpio = 73, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* NC(PROX_ALS_INT_N) */ + .gpio = 74, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GYRO_INT2 */ + .gpio = 75, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(KOTO_PWR_OFF) */ + .gpio = 76, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(FELICA_RFS) */ + .gpio = 77, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(LCD_PWR_EN) */ + .gpio = 78, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* BT_PCM_SCLK */ + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_SYNC */ + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DIN */ + .gpio = 81, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DOUT */ + .gpio = 82, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* PERIPHERAL_I2C_SDA */ + .gpio = 83, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* PERIPHERAL_I2C_SCL */ + .gpio = 84, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* NC(TP_PWR_EN) */ + .gpio = 85, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_INT_N */ + .gpio = 86, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* SENSORS_I2C_SDA */ + .gpio = 87, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* SENSORS_I2C_SCL */ + .gpio = 88, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* NC(TSIF_CLK) */ + .gpio = 89, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TSIF_EN) */ + .gpio = 90, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TSIF_DATA) */ + .gpio = 91, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TSIF_SYNC) */ + .gpio = 92, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CODEC_INT2 */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CAM0_RST_N */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* BT_HOST_WAKE */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BT_DEV_WAKE */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* UIM1_DATA */ + .gpio = 97, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_CLK */ + .gpio = 98, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_RST */ + .gpio = 99, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(UIM_HOT_SWAP) */ + .gpio = 100, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BATT_REM_ALARM */ + .gpio = 101, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* MHL_SPI_DVLD */ + .gpio = 102, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* FORCED_USB_BOOT */ + .gpio = 103, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(DRX_MODE_SEL0) */ + .gpio = 104, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(DRX_MODE_SEL1) */ + .gpio = 105, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(PA_ON2) */ + .gpio = 106, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(PA_ON3) */ + .gpio = 107, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_TX_LB4 */ + .gpio = 108, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MAIN_TERM_SW_SEL */ + .gpio = 109, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC(WTR0_RX_ON0) */ + .gpio = 110, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(WTR0_RF_ON0) */ + .gpio = 111, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GRFC8(PA0_R0/ANT_SW_SEL4) [WDOG_DISABLE] */ + .gpio = 112, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(BOOT_CONFIG_1) */ + .gpio = 113, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(BOOT_CONFIG_2) */ + .gpio = 114, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(DIV_TERM_SW_SEL) [BOOT_CONFIG_3] */ + .gpio = 115, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TX_GTR_THRES [BOOT_CONFIG_4] */ + .gpio = 116, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(Reserved for ANT_TUNE0) */ + .gpio = 117, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_WB_CPL */ + .gpio = 118, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(PA1_R1) [RPM_BOOT_FROM_ROM] */ + .gpio = 119, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_PRX_LB3 */ + .gpio = 120, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* SW_PRX_LB41 */ + .gpio = 121, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(ANT_TUNE_SW_SEL0) [PK_HASH_INDEX_SRC] */ + .gpio = 122, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(ANT_TUNE_SW_SEL1) [ALL_USE_SERIAL_NUMBER] */ + .gpio = 123, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(WTR1_RX_ON1) */ + .gpio = 124, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(PRX_SW_SEL0) */ + .gpio = 125, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(GEMINI_SW_SEL0) [MSA_PK_HASH_IN_FUSE] */ + .gpio = 126, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(GEMINI_SW_SEL1) [MSA_AUTH_EN] */ + .gpio = 127, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* EXT_GPS_LNA_EN */ + .gpio = 128, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 129, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* LTE_ACTIVE */ + .gpio = 130, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* LTE_TX_COEX_WCN */ + .gpio = 131, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* WCN_TX_COEX_LTE */ + .gpio = 132, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WTR_SSBI1_TX_GPS */ + .gpio = 133, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WTR_SSBI2_PRX_DRX */ + .gpio = 134, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(WTR1_SSBI1_TX_GPS) */ + .gpio = 135, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* WFR_SSBI */ + .gpio = 136, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(GRFC26(GSM_TX_PHASE_D2/RF_SW_SEL0)) */ + .gpio = 137, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GSM_TX_PHASE_D1 */ + .gpio = 138, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* GSM_TX_PHASE_D0 [FORCE_MSA_AUTH_EN] */ + .gpio = 139, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_CLK */ + .gpio = 140, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_DATA */ + .gpio = 141, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_CLK */ + .gpio = 142, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_DATA */ + .gpio = 143, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HSIC_STROBE */ + .gpio = 144, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, + { /* HSIC_DATA */ + .gpio = 145, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, +}; + +void __init msm_8974_init_gpiomux(void) +{ + int rc; + + rc = sony_init_gpiomux(shinano_all_configs, + ARRAY_SIZE(shinano_all_configs)); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return; + } + + /* Let backlight GPIO be untouched until driver requests it. Needed + * if backlight is turned on before kernel (in boot) */ + msm_gpiomux_install_nowrite(&bl_config, 1); +} diff --git a/arch/arm/mach-msm/board-sony_castor_windy-gpiomux.c b/arch/arm/mach-msm/board-sony_castor_windy-gpiomux.c new file mode 100644 index 00000000000..ae7ac6853d5 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_castor_windy-gpiomux.c @@ -0,0 +1,1090 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include "sony_gpiomux.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_up_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_FOLLOW_QCT, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting gpio_2ma_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting mhl_spi = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_tx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_rx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting cam_mclk = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting cam_i2c = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting nfc_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_clk_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_clk_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_tx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_rx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_cts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_rts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting ts_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting damp_i2s = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_pcm = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting peripheral_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sensors_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting hsic = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct msm_gpiomux_config bl_config __initdata = { + .gpio = 69, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, +}; + +static struct msm_gpiomux_config shinano_all_configs[] __initdata = { + { /* MHL_SPI_MOSI */ + .gpio = 0, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_MISO */ + .gpio = 1, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CS_N */ + .gpio = 2, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* UART_TX_DFMS */ + .gpio = 4, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_tx, + [GPIOMUX_SUSPENDED] = &debug_uart_tx, + }, + }, + { /* UART_RX_DTMS */ + .gpio = 5, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_rx, + [GPIOMUX_SUSPENDED] = &debug_uart_rx, + }, + }, + { /* LCD_I2C_SDA */ + .gpio = 6, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, + }, + { /* LCD_I2C_SCL */ + .gpio = 7, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, + }, + { /* SW_SERVICE */ + .gpio = 8, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC(UIM1_DETECT) */ + .gpio = 9, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* MHL_SWITCH_SEL_1 */ + .gpio = 10, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_SWITCH_SEL_2 */ + .gpio = 11, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC(MDP_VSYNC_P) */ + .gpio = 12, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TUNER_RST_N) */ + .gpio = 13, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TUNER_PWR_EN) */ + .gpio = 14, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CAM0_MCLK0 */ + .gpio = 15, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_RST_N */ + .gpio = 16, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM1_MCLK2 */ + .gpio = 17, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CHATCAM_RESET_N */ + .gpio = 18, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM0_I2C_SDA0 */ + .gpio = 19, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM0_I2C_SCL0 */ + .gpio = 20, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SDA1 */ + .gpio = 21, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SCL1 */ + .gpio = 22, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* MHL_PWR_EN */ + .gpio = 23, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_IRQ_FELICA_INT_N */ + .gpio = 24, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PON_VOLTAGE_SEL */ + .gpio = 25, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* LCD_ID */ + .gpio = 26, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC(FELICA_UART_TX) */ + .gpio = 27, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(FELICA_UART_RX) */ + .gpio = 28, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NFC_I2C_SDA */ + .gpio = 29, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* NFC_I2C_SCL */ + .gpio = 30, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* MHL_FW_WAKE */ + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* HDMI_DDC_CLK */ + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_DDC_DATA */ + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_HOT_PLUG_DET */ + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WLAN_SDIO_DATA_3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_clk_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_clk_suspend, + }, + }, + { /* BT_UART_TX */ + .gpio = 41, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_tx, + [GPIOMUX_SUSPENDED] = &bt_uart_tx, + }, + }, + { /* BT_UART_RX */ + .gpio = 42, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rx, + [GPIOMUX_SUSPENDED] = &bt_uart_rx, + }, + }, + { /* BT_UART_CTS_N */ + .gpio = 43, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_cts, + [GPIOMUX_SUSPENDED] = &bt_uart_cts, + }, + }, + { /* BT_UART_RTS_N */ + .gpio = 44, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rts, + [GPIOMUX_SUSPENDED] = &bt_uart_rts, + }, + }, + { /* NC */ + .gpio = 45, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 46, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_I2C_SDA */ + .gpio = 47, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* TS_I2C_SCL */ + .gpio = 48, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* NC(UIM2_DATA) */ + .gpio = 49, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_CLK) */ + .gpio = 50, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_RST) */ + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_DETECT) */ + .gpio = 52, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* UART_TX_IR */ + .gpio = 53, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* UART_RX_IR */ + .gpio = 54, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* DEBUG_GPIO0 */ + .gpio = 55, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DEBUG_GPIO1 */ + .gpio = 56, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_DWLD_EN */ + .gpio = 57, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DAMP_I2S_SCLK */ + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_WS */ + .gpio = 59, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D0 */ + .gpio = 60, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D1 */ + .gpio = 61, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* SD_CARD_DET_N */ + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* CODEC_RESET_N */ + .gpio = 63, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MHL_INT */ + .gpio = 64, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* ACCEL_INT2 */ + .gpio = 65, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* GYRO_INT1 */ + .gpio = 66, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WL_HOST_WAKE */ + .gpio = 67, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(TUNER_INT) */ + .gpio = 68, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SLIMBUS_CLK */ + .gpio = 70, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* SLIMBUS_DATA */ + .gpio = 71, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CODEC_INT1 */ + .gpio = 72, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* ACCEL_INT1 */ + .gpio = 73, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* NC(PROX_ALS_INT_N) */ + .gpio = 74, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GYRO_INT2 */ + .gpio = 75, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(KOTO_PWR_OFF) */ + .gpio = 76, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(FELICA_RFS) */ + .gpio = 77, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(LCD_PWR_EN) */ + .gpio = 78, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* BT_PCM_SCLK */ + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_SYNC */ + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DIN */ + .gpio = 81, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DOUT */ + .gpio = 82, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* PERIPHERAL_I2C_SDA */ + .gpio = 83, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* PERIPHERAL_I2C_SCL */ + .gpio = 84, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* NC(TP_PWR_EN) */ + .gpio = 85, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_INT_N */ + .gpio = 86, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* SENSORS_I2C_SDA */ + .gpio = 87, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* SENSORS_I2C_SCL */ + .gpio = 88, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* NC(TSIF_CLK) */ + .gpio = 89, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TSIF_EN) */ + .gpio = 90, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TSIF_DATA) */ + .gpio = 91, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(TSIF_SYNC) */ + .gpio = 92, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CODEC_INT2 */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CAM0_RST_N */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* BT_HOST_WAKE */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BT_DEV_WAKE */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC(UIM1_DATA) */ + .gpio = 97, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM1_CLK) */ + .gpio = 98, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM1_RST) */ + .gpio = 99, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM_HOT_SWAP) */ + .gpio = 100, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BATT_REM_ALARM */ + .gpio = 101, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* MHL_SPI_DVLD */ + .gpio = 102, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* FORCED_USB_BOOT */ + .gpio = 103, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(DRX_MODE_SEL0) */ + .gpio = 104, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(DRX_MODE_SEL1) */ + .gpio = 105, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(PA_ON2) */ + .gpio = 106, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(PA_ON3) */ + .gpio = 107, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(SW_TX_LB4) */ + .gpio = 108, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* MAIN_TERM_SW_SEL */ + .gpio = 109, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC(WTR0_RX_ON0) */ + .gpio = 110, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(WTR0_RF_ON0) */ + .gpio = 111, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GRFC8(PA0_R0/ANT_SW_SEL4) [WDOG_DISABLE] */ + .gpio = 112, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(BOOT_CONFIG_1) */ + .gpio = 113, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(BOOT_CONFIG_2) */ + .gpio = 114, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(DIV_TERM_SW_SEL) [BOOT_CONFIG_3] */ + .gpio = 115, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TX_GTR_THRES [BOOT_CONFIG_4] */ + .gpio = 116, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(Reserved for ANT_TUNE0) */ + .gpio = 117, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(SW_WB_CPL) */ + .gpio = 118, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(PA1_R1) [RPM_BOOT_FROM_ROM] */ + .gpio = 119, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(SW_PRX_LB3) */ + .gpio = 120, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(SW_PRX_LB41) */ + .gpio = 121, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(ANT_TUNE_SW_SEL0) [PK_HASH_INDEX_SRC] */ + .gpio = 122, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(ANT_TUNE_SW_SEL1) [ALL_USE_SERIAL_NUMBER] */ + .gpio = 123, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(WTR1_RX_ON1) */ + .gpio = 124, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(PRX_SW_SEL0) */ + .gpio = 125, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(GEMINI_SW_SEL0) [MSA_PK_HASH_IN_FUSE] */ + .gpio = 126, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(GEMINI_SW_SEL1) [MSA_AUTH_EN] */ + .gpio = 127, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* EXT_GPS_LNA_EN */ + .gpio = 128, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 129, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* LTE_ACTIVE */ + .gpio = 130, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* LTE_TX_COEX_WCN */ + .gpio = 131, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* WCN_TX_COEX_LTE */ + .gpio = 132, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(WTR_SSBI1_TX_GPS) */ + .gpio = 133, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(WTR_SSBI2_PRX_DRX) */ + .gpio = 134, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* WGR_SSBI1_TX_GPS */ + .gpio = 135, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(WFR_SSBI) */ + .gpio = 136, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(GRFC26(GSM_TX_PHASE_D2/RF_SW_SEL0)) */ + .gpio = 137, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(GSM_TX_PHASE_D1) */ + .gpio = 138, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(GSM_TX_PHASE_D0) [FORCE_MSA_AUTH_EN] */ + .gpio = 139, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(RFFE1_CLK) */ + .gpio = 140, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(RFFE1_DATA) */ + .gpio = 141, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(RFFE2_CLK) */ + .gpio = 142, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(RFFE2_DATA) */ + .gpio = 143, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* HSIC_STROBE */ + .gpio = 144, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, + { /* HSIC_DATA */ + .gpio = 145, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, +}; + +void __init msm_8974_init_gpiomux(void) +{ + int rc; + + rc = sony_init_gpiomux(shinano_all_configs, + ARRAY_SIZE(shinano_all_configs)); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return; + } + + /* Let backlight GPIO be untouched until driver requests it. Needed + * if backlight is turned on before kernel (in boot) */ + msm_gpiomux_install_nowrite(&bl_config, 1); +} diff --git a/arch/arm/mach-msm/board-sony_leo-gpiomux-diff.h b/arch/arm/mach-msm/board-sony_leo-gpiomux-diff.h new file mode 100644 index 00000000000..66cee989eb4 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_leo-gpiomux-diff.h @@ -0,0 +1,20 @@ +/* arch/arm/mach-msm/board-sony_leo-gpiomux-diff.h + * + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _ARCH_ARM_MACH_MSM_BOARD_SONY_LEO_GPIOMUX_DIFF_H +#define _ARCH_ARM_MACH_MSM_BOARD_SONY_LEO_GPIOMUX_DIFF_H + +extern struct msm_gpiomux_configs leo_samba_gpiomux_cfgs __initdata; + +#endif /* _ARCH_ARM_MACH_MSM_BOARD_SONY_LEO_GPIOMUX_DIFF_H */ diff --git a/arch/arm/mach-msm/board-sony_leo-gpiomux.c b/arch/arm/mach-msm/board-sony_leo-gpiomux.c new file mode 100644 index 00000000000..105f5ed8444 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_leo-gpiomux.c @@ -0,0 +1,1129 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include "board-sony_shinano-hw.h" +#include "board-sony_leo-gpiomux-diff.h" +#include "sony_gpiomux.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_up_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_FOLLOW_QCT, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting gpio_2ma_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting mhl_spi = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_tx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_rx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting cam_mclk = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting cam_i2c = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting nfc_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_10MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_clk_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_10MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_clk_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_tx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_rx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_cts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_rts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting ts_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting damp_i2s = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_pcm = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting peripheral_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sensors_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting hsic = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting mdp_vsync_p = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct msm_gpiomux_config touch_config __initdata = { + .gpio = 85, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, +}; + +static struct msm_gpiomux_config shinano_all_configs[] __initdata = { + { /* MHL_SPI_MOSI */ + .gpio = 0, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_MISO */ + .gpio = 1, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CS_N */ + .gpio = 2, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* UART_TX_DFMS */ + .gpio = 4, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_tx, + [GPIOMUX_SUSPENDED] = &debug_uart_tx, + }, + }, + { /* UART_RX_DTMS */ + .gpio = 5, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_rx, + [GPIOMUX_SUSPENDED] = &debug_uart_rx, + }, + }, + { /* NC */ + .gpio = 6, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 7, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_SERVICE */ + .gpio = 8, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* UIM_DETECT */ + .gpio = 9, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* MHL_SWITCH_SEL_1 */ + .gpio = 10, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_SWITCH_SEL_2 */ + .gpio = 11, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MDP_VSYNC_P */ + .gpio = 12, + .settings = { + [GPIOMUX_ACTIVE] = &mdp_vsync_p, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 13, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 14, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CAM0_MCLK0 */ + .gpio = 15, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_RST_N */ + .gpio = 16, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM1_MCLK2 */ + .gpio = 17, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CHATCAM_RESET_N */ + .gpio = 18, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM0_I2C_SDA0 */ + .gpio = 19, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM0_I2C_SCL0 */ + .gpio = 20, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SDA1 */ + .gpio = 21, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SCL1 */ + .gpio = 22, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* MHL_PWR_EN */ + .gpio = 23, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_IRQ_FELICA_INT_N */ + .gpio = 24, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PON_VOLTAGE_SEL */ + .gpio = 25, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* LCD_ID */ + .gpio = 26, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC */ + .gpio = 27, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 28, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NFC_I2C_SDA */ + .gpio = 29, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* NFC_I2C_SCL */ + .gpio = 30, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* MHL_FW_WAKE */ + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* HDMI_DDC_CLK */ + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_DDC_DATA */ + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_HOT_PLUG_DET */ + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WLAN_SDIO_DATA_3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_clk_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_clk_suspend, + }, + }, + { /* BT_UART_TX */ + .gpio = 41, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_tx, + [GPIOMUX_SUSPENDED] = &bt_uart_tx, + }, + }, + { /* BT_UART_RX */ + .gpio = 42, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rx, + [GPIOMUX_SUSPENDED] = &bt_uart_rx, + }, + }, + { /* BT_UART_CTS_N */ + .gpio = 43, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_cts, + [GPIOMUX_SUSPENDED] = &bt_uart_cts, + }, + }, + { /* BT_UART_RTS_N */ + .gpio = 44, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rts, + [GPIOMUX_SUSPENDED] = &bt_uart_rts, + }, + }, + { /* NC */ + .gpio = 45, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 46, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_I2C_SDA */ + .gpio = 47, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* TS_I2C_SCL */ + .gpio = 48, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* NC(UIM2_DATA) */ + .gpio = 49, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_CLK) */ + .gpio = 50, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_RST) */ + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_DETECT) */ + .gpio = 52, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 53, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 54, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* DEBUG_GPIO0 */ + .gpio = 55, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DEBUG_GPIO1 */ + .gpio = 56, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* FELICA_PON_OR_NFC_DWLD_EN */ + .gpio = 57, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DAMP_I2S_CLK */ + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_WS */ + .gpio = 59, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D0 */ + .gpio = 60, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D1 */ + .gpio = 61, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* SD_CARD_DET_N */ + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* CODEC_RESET_N */ + .gpio = 63, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MHL_INT */ + .gpio = 64, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* ACCEL_INT2 */ + .gpio = 65, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* GYRO_INT1 */ + .gpio = 66, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WL_HOST_WAKE */ + .gpio = 67, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 68, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 69, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SLIMBUS_CLK */ + .gpio = 70, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* SLIMBUS_DATA */ + .gpio = 71, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CODEC_INT1 */ + .gpio = 72, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* ACCEL_INT1 */ + .gpio = 73, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PROX_ALS_INT_N */ + .gpio = 74, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* GYRO_INT2 */ + .gpio = 75, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 76, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 77, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 78, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* BT_PCM_SCLK */ + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_SYNC */ + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DIN */ + .gpio = 81, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DOUT */ + .gpio = 82, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* PERIPHERAL_I2C_SDA */ + .gpio = 83, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* PERIPHERAL_I2C_SCL */ + .gpio = 84, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* TS_INT_N */ + .gpio = 86, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* SENSORS_I2C_SDA */ + .gpio = 87, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* SENSORS_I2C_SCL */ + .gpio = 88, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* NC */ + .gpio = 89, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 90, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 91, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 92, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CODEC_INT2 */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CAM0_RST_N */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* BT_HOST_WAKE */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BT_DEV_WAKE */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* UIM1_DATA */ + .gpio = 97, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_CLK */ + .gpio = 98, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_RST */ + .gpio = 99, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(UIM1_DETECT) */ + .gpio = 100, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BATT_REM_ALARM */ + .gpio = 101, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* MHL_SPI_DVLD */ + .gpio = 102, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* FORCED_USB_BOOT */ + .gpio = 103, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 104, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 105, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 106, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 107, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_TX_LB4 */ + .gpio = 108, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MAIN_TERM_SW_SEL */ + .gpio = 109, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 110, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 111, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GRFC8 [WDOG_DISABLE] */ + .gpio = 112, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(BOOT_CONFIG_1) */ + .gpio = 113, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_2]) */ + .gpio = 114, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_3]) */ + .gpio = 115, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TX_GTR_THRES [BOOT_CONFIG_4] */ + .gpio = 116, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(Reserved for ANT_TUNE0) */ + .gpio = 117, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 118, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 119, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_PRX_LB3 */ + .gpio = 120, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* SW_PRX_LB41 */ + .gpio = 121, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 122, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 123, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 124, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 125, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 126, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 127, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* EXT_GPS_LNA_EN */ + .gpio = 128, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 129, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* LTE_ACTIVE */ + .gpio = 130, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* LTE_TX_COEX_WCN */ + .gpio = 131, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* WCN_TX_COEX_LTE */ + .gpio = 132, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WTR0_SSBI1_TX_GPS */ + .gpio = 133, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WTR0_SSBI2_PRX_DRX */ + .gpio = 134, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 135, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 136, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 137, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GSM_TX_PHASE_D1 */ + .gpio = 138, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* GSM_TX_PHASE_D0 */ + .gpio = 139, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_CLK */ + .gpio = 140, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_DATA */ + .gpio = 141, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_CLK */ + .gpio = 142, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_DATA */ + .gpio = 143, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HSIC_STROBE */ + .gpio = 144, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, + { /* HSIC_DATA */ + .gpio = 145, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, +}; + +void __init msm_8974_init_gpiomux(void) +{ + int rc, hw; + struct msm_gpiomux_configs base; + + base.cfg = shinano_all_configs; + base.ncfg = ARRAY_SIZE(shinano_all_configs); + + hw = get_sony_hw(); + + if (hw == HW_LEO_SAMBA) + overwrite_configs(&base, &leo_samba_gpiomux_cfgs); + + rc = sony_init_gpiomux(shinano_all_configs, + ARRAY_SIZE(shinano_all_configs)); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return; + } + + msm_gpiomux_install_nowrite(&touch_config, 1); +} diff --git a/arch/arm/mach-msm/board-sony_leo_samba-gpiomux-diff.c b/arch/arm/mach-msm/board-sony_leo_samba-gpiomux-diff.c new file mode 100644 index 00000000000..2554696a964 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_leo_samba-gpiomux-diff.c @@ -0,0 +1,94 @@ +/* arch/arm/mach-msm/board-sony_leo_samba-gpiomux-diff.c + * + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include "board-sony_leo-gpiomux-diff.h" + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting tsif = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +struct msm_gpiomux_config leo_samba_configs[] __initdata = { + { /* TUNER_RST_N */ + .gpio = 13, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* TUNER_PWR_EN */ + .gpio = 14, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* TUNER_INT */ + .gpio = 68, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* TSIF_CLK */ + .gpio = 89, + .settings = { + [GPIOMUX_ACTIVE] = &tsif, + [GPIOMUX_SUSPENDED] = &tsif, + }, + }, + { /* TSIF_EN */ + .gpio = 90, + .settings = { + [GPIOMUX_ACTIVE] = &tsif, + [GPIOMUX_SUSPENDED] = &tsif, + }, + }, + { /* TSIF_DATA */ + .gpio = 91, + .settings = { + [GPIOMUX_ACTIVE] = &tsif, + [GPIOMUX_SUSPENDED] = &tsif, + }, + }, + { /* TSIF_SYNC */ + .gpio = 92, + .settings = { + [GPIOMUX_ACTIVE] = &tsif, + [GPIOMUX_SUSPENDED] = &tsif, + }, + }, +}; + +struct msm_gpiomux_configs leo_samba_gpiomux_cfgs __initdata = { + leo_samba_configs, ARRAY_SIZE(leo_samba_configs) +}; diff --git a/arch/arm/mach-msm/board-sony_scorpion-gpiomux.c b/arch/arm/mach-msm/board-sony_scorpion-gpiomux.c new file mode 100644 index 00000000000..e4715af7993 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_scorpion-gpiomux.c @@ -0,0 +1,1116 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include "sony_gpiomux.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_4ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_4ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_up_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_FOLLOW_QCT, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting gpio_2ma_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting mhl_spi = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_tx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_rx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting cam_mclk = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting cam_i2c = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting nfc_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_clk_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_clk_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_tx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_rx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_cts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_rts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting ts_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting damp_i2s = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_pcm = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting peripheral_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sensors_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting mdp_vsync_p = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct msm_gpiomux_config bl_config __initdata = { + .gpio = 69, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_4ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_4ma_no_pull_out_low, + }, +}; + +static struct msm_gpiomux_config shinano_all_configs[] __initdata = { + { /* MHL_SPI_MOSI */ + .gpio = 0, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_MISO */ + .gpio = 1, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CS_N */ + .gpio = 2, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* UART_TX_DFMS */ + .gpio = 4, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_tx, + [GPIOMUX_SUSPENDED] = &debug_uart_tx, + }, + }, + { /* UART_RX_DTMS */ + .gpio = 5, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_rx, + [GPIOMUX_SUSPENDED] = &debug_uart_rx, + }, + }, + { /* NC */ + .gpio = 6, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 7, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_SERVICE */ + .gpio = 8, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* UIM_DETECT */ + .gpio = 9, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* MHL_SWITCH_SEL_1 */ + .gpio = 10, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_SWITCH_SEL_2 */ + .gpio = 11, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MDP_VSYNC_P */ + .gpio = 12, + .settings = { + [GPIOMUX_ACTIVE] = &mdp_vsync_p, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 13, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 14, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CAM0_MCLK0 */ + .gpio = 15, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_RST_N */ + .gpio = 16, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM1_MCLK2 */ + .gpio = 17, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CHATCAM_RESET_N */ + .gpio = 18, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM0_I2C_SDA0 */ + .gpio = 19, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM0_I2C_SCL0 */ + .gpio = 20, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SDA1 */ + .gpio = 21, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SCL1 */ + .gpio = 22, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* MHL_PWR_EN */ + .gpio = 23, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_IRQ_FELICA_INT_N */ + .gpio = 24, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PON_VOLTAGE_SEL */ + .gpio = 25, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* NC(LCD_ID) */ + .gpio = 26, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC */ + .gpio = 27, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 28, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NFC_I2C_SDA */ + .gpio = 29, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* NFC_I2C_SCL */ + .gpio = 30, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* MHL_FW_WAKE */ + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* HDMI_DDC_CLK */ + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_DDC_DATA */ + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_HOT_PLUG_DET */ + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MSM_SDC3_DATA_3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_DATA_2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_DATA_1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_DATA_0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_clk_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_clk_suspend, + }, + }, + { /* BT_UART_TX */ + .gpio = 41, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_tx, + [GPIOMUX_SUSPENDED] = &bt_uart_tx, + }, + }, + { /* BT_UART_RX */ + .gpio = 42, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rx, + [GPIOMUX_SUSPENDED] = &bt_uart_rx, + }, + }, + { /* BT_UART_CTS_N */ + .gpio = 43, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_cts, + [GPIOMUX_SUSPENDED] = &bt_uart_cts, + }, + }, + { /* BT_UART_RTS_N */ + .gpio = 44, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rts, + [GPIOMUX_SUSPENDED] = &bt_uart_rts, + }, + }, + { /* NC */ + .gpio = 45, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 46, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_I2C_SDA */ + .gpio = 47, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* TS_I2C_SCL */ + .gpio = 48, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* NC(UIM2_DATA) */ + .gpio = 49, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_CLK) */ + .gpio = 50, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_RST) */ + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_DETECT) */ + .gpio = 52, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 53, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 54, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* DEBUG_GPIO0 */ + .gpio = 55, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DEBUG_GPIO1 */ + .gpio = 56, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* FELICA_PON_OR_NFC_DWLD_EN */ + .gpio = 57, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DAMP_I2S_CLK */ + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_WS */ + .gpio = 59, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D0 */ + .gpio = 60, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D1 */ + .gpio = 61, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* SD_CARD_DET_N */ + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* CODEC_RESET_N */ + .gpio = 63, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MHL_INT */ + .gpio = 64, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* ACCEL_INT2 */ + .gpio = 65, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* GYRO_INT1 */ + .gpio = 66, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WL_HOST_WAKE */ + .gpio = 67, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 68, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SLIMBUS_CLK */ + .gpio = 70, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* SLIMBUS_DATA */ + .gpio = 71, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CODEC_INT1 */ + .gpio = 72, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* ACCEL_INT1 */ + .gpio = 73, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* NC */ + .gpio = 74, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GYRO_INT2 */ + .gpio = 75, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 76, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 77, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 78, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* BT_PCM_SCLK */ + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_SYNC */ + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DIN */ + .gpio = 81, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DOUT */ + .gpio = 82, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* PERIPHERAL_I2C_SDA */ + .gpio = 83, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* PERIPHERAL_I2C_SCL */ + .gpio = 84, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* NC(TP_RESET) */ + .gpio = 85, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, + }, + { /* TS_INT_N */ + .gpio = 86, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* SENSORS_I2C_SDA */ + .gpio = 87, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* SENSORS_I2C_SCL */ + .gpio = 88, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* NC */ + .gpio = 89, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 90, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 91, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 92, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CODEC_INT2 */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CAM0_RST_N */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* BT_HOST_WAKE */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BT_DEV_WAKE */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* UIM1_DATA */ + .gpio = 97, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_CLK */ + .gpio = 98, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_RST */ + .gpio = 99, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(UIM_HOT_SWAP) */ + .gpio = 100, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BATT_REM_ALARM */ + .gpio = 101, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* MHL_SPI_DVLD */ + .gpio = 102, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* FORCED_USB_BOOT */ + .gpio = 103, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 104, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 105, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 106, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 107, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_TX_LB4 */ + .gpio = 108, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 109, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 110, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 111, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GRFC8 [WDOG_DISABLE] */ + .gpio = 112, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(BOOT_CONFIG_1) */ + .gpio = 113, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_2]) */ + .gpio = 114, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_3]) */ + .gpio = 115, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TX_GTR_THRES [BOOT_CONFIG_4] */ + .gpio = 116, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(Reserved for ANT_TUNE0) */ + .gpio = 117, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(SW_WB_CPL) */ + .gpio = 118, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 119, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_PRX_LB3 */ + .gpio = 120, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* SW_PRX_LB41 */ + .gpio = 121, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 122, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 123, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 124, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 125, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 126, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 127, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* EXT_GPS_LNA_EN */ + .gpio = 128, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 129, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* LTE_ACTIVE */ + .gpio = 130, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* LTE_TX_COEX_WCN */ + .gpio = 131, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* WCN_TX_COEX_LTE */ + .gpio = 132, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WTR0_SSBI1_TX_GPS */ + .gpio = 133, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WTR0_SSBI2_PRX_DRX */ + .gpio = 134, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 135, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 136, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 137, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GSM_TX_PHASE_D1 */ + .gpio = 138, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* GSM_TX_PHASE_D0 */ + .gpio = 139, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_CLK */ + .gpio = 140, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_DATA */ + .gpio = 141, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_CLK */ + .gpio = 142, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_DATA */ + .gpio = 143, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(HSIC_STROBE) */ + .gpio = 144, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(HSIC_DATA) */ + .gpio = 145, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, +}; + +void __init msm_8974_init_gpiomux(void) +{ + int rc; + + rc = sony_init_gpiomux(shinano_all_configs, + ARRAY_SIZE(shinano_all_configs)); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return; + } + msm_gpiomux_install_nowrite(&bl_config, 1); +} diff --git a/arch/arm/mach-msm/board-sony_scorpion_windy-gpiomux.c b/arch/arm/mach-msm/board-sony_scorpion_windy-gpiomux.c new file mode 100644 index 00000000000..d5a755c3d09 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_scorpion_windy-gpiomux.c @@ -0,0 +1,1086 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include "sony_gpiomux.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_4ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_4ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_up_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_FOLLOW_QCT, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting gpio_2ma_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting mhl_spi = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_tx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_rx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting cam_mclk = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting cam_i2c = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting nfc_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_clk_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting msm_sdc3_clk_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_tx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_rx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_cts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_rts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting ts_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting damp_i2s = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_pcm = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting peripheral_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sensors_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting mdp_vsync_p = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct msm_gpiomux_config bl_config __initdata = { + .gpio = 69, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_4ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_4ma_no_pull_out_low, + }, +}; + +static struct msm_gpiomux_config shinano_all_configs[] __initdata = { + { /* MHL_SPI_MOSI */ + .gpio = 0, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_MISO */ + .gpio = 1, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CS_N */ + .gpio = 2, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* UART_TX_DFMS */ + .gpio = 4, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_tx, + [GPIOMUX_SUSPENDED] = &debug_uart_tx, + }, + }, + { /* UART_RX_DTMS */ + .gpio = 5, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_rx, + [GPIOMUX_SUSPENDED] = &debug_uart_rx, + }, + }, + { /* NC */ + .gpio = 6, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 7, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_SERVICE */ + .gpio = 8, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC(UIM_DETECT) */ + .gpio = 9, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* MHL_SWITCH_SEL_1 */ + .gpio = 10, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_SWITCH_SEL_2 */ + .gpio = 11, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MDP_VSYNC_P */ + .gpio = 12, + .settings = { + [GPIOMUX_ACTIVE] = &mdp_vsync_p, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 13, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 14, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CAM0_MCLK0 */ + .gpio = 15, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_RST_N */ + .gpio = 16, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM1_MCLK2 */ + .gpio = 17, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CHATCAM_RESET_N */ + .gpio = 18, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM0_I2C_SDA0 */ + .gpio = 19, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM0_I2C_SCL0 */ + .gpio = 20, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SDA1 */ + .gpio = 21, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SCL1 */ + .gpio = 22, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* MHL_PWR_EN */ + .gpio = 23, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_IRQ_FELICA_INT_N */ + .gpio = 24, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PON_VOLTAGE_SEL */ + .gpio = 25, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* NC(LCD_ID) */ + .gpio = 26, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC */ + .gpio = 27, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 28, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NFC_I2C_SDA */ + .gpio = 29, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* NFC_I2C_SCL */ + .gpio = 30, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* MHL_FW_WAKE */ + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* HDMI_DDC_CLK */ + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_DDC_DATA */ + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_HOT_PLUG_DET */ + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MSM_SDC3_DATA_3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_DATA_2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_DATA_1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_DATA_0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_suspend, + }, + }, + { /* MSM_SDC3_CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &msm_sdc3_clk_active, + [GPIOMUX_SUSPENDED] = &msm_sdc3_clk_suspend, + }, + }, + { /* BT_UART_TX */ + .gpio = 41, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_tx, + [GPIOMUX_SUSPENDED] = &bt_uart_tx, + }, + }, + { /* BT_UART_RX */ + .gpio = 42, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rx, + [GPIOMUX_SUSPENDED] = &bt_uart_rx, + }, + }, + { /* BT_UART_CTS_N */ + .gpio = 43, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_cts, + [GPIOMUX_SUSPENDED] = &bt_uart_cts, + }, + }, + { /* BT_UART_RTS_N */ + .gpio = 44, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rts, + [GPIOMUX_SUSPENDED] = &bt_uart_rts, + }, + }, + { /* NC */ + .gpio = 45, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 46, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_I2C_SDA */ + .gpio = 47, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* TS_I2C_SCL */ + .gpio = 48, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* NC(UIM2_DATA) */ + .gpio = 49, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_CLK) */ + .gpio = 50, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_RST) */ + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_DETECT) */ + .gpio = 52, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 53, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 54, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* DEBUG_GPIO0 */ + .gpio = 55, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DEBUG_GPIO1 */ + .gpio = 56, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* FELICA_PON_OR_NFC_DWLD_EN */ + .gpio = 57, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DAMP_I2S_CLK */ + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_WS */ + .gpio = 59, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D0 */ + .gpio = 60, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D1 */ + .gpio = 61, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* SD_CARD_DET_N */ + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* CODEC_RESET_N */ + .gpio = 63, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MHL_INT */ + .gpio = 64, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* ACCEL_INT2 */ + .gpio = 65, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* GYRO_INT1 */ + .gpio = 66, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WL_HOST_WAKE */ + .gpio = 67, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 68, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SLIMBUS_CLK */ + .gpio = 70, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* SLIMBUS_DATA */ + .gpio = 71, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CODEC_INT1 */ + .gpio = 72, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* ACCEL_INT1 */ + .gpio = 73, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* NC */ + .gpio = 74, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GYRO_INT2 */ + .gpio = 75, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 76, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 77, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 78, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* BT_PCM_SCLK */ + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_SYNC */ + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DIN */ + .gpio = 81, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DOUT */ + .gpio = 82, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* PERIPHERAL_I2C_SDA */ + .gpio = 83, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* PERIPHERAL_I2C_SCL */ + .gpio = 84, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* NC(TP_RESET) */ + .gpio = 85, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, + }, + { /* TS_INT_N */ + .gpio = 86, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* SENSORS_I2C_SDA */ + .gpio = 87, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* SENSORS_I2C_SCL */ + .gpio = 88, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* NC */ + .gpio = 89, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 90, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 91, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 92, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CODEC_INT2 */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CAM0_RST_N */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* BT_HOST_WAKE */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BT_DEV_WAKE */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC(UIM1_DATA) */ + .gpio = 97, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM1_CLK) */ + .gpio = 98, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM1_RST) */ + .gpio = 99, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM_HOT_SWAP) */ + .gpio = 100, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BATT_REM_ALARM */ + .gpio = 101, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* MHL_SPI_DVLD */ + .gpio = 102, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* FORCED_USB_BOOT */ + .gpio = 103, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 104, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 105, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 106, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 107, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 108, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 109, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 110, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 111, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GRFC8 [WDOG_DISABLE] */ + .gpio = 112, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(BOOT_CONFIG_1) */ + .gpio = 113, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_2]) */ + .gpio = 114, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC([BOOT_CONFIG_3]) */ + .gpio = 115, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TX_GTR_THRES [BOOT_CONFIG_4] */ + .gpio = 116, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(Reserved for ANT_TUNE0) */ + .gpio = 117, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(SW_WB_CPL) */ + .gpio = 118, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 119, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 120, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 121, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 122, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 123, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 124, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 125, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 126, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 127, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* EXT_GPS_LNA_EN */ + .gpio = 128, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 129, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* LTE_ACTIVE */ + .gpio = 130, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* LTE_TX_COEX_WCN */ + .gpio = 131, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* WCN_TX_COEX_LTE */ + .gpio = 132, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 133, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 134, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* WGR_SSBI1_TX_GPS */ + .gpio = 135, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 136, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 137, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 138, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 139, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 140, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 141, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 142, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 143, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(HSIC_STROBE) */ + .gpio = 144, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC(HSIC_DATA) */ + .gpio = 145, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, +}; + +void __init msm_8974_init_gpiomux(void) +{ + int rc; + + rc = sony_init_gpiomux(shinano_all_configs, + ARRAY_SIZE(shinano_all_configs)); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return; + } + msm_gpiomux_install_nowrite(&bl_config, 1); +} diff --git a/arch/arm/mach-msm/board-sony_shinano-gpiomux-ref.c b/arch/arm/mach-msm/board-sony_shinano-gpiomux-ref.c new file mode 100644 index 00000000000..677ed91033d --- /dev/null +++ b/arch/arm/mach-msm/board-sony_shinano-gpiomux-ref.c @@ -0,0 +1,1653 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include "sony_gpiomux.h" + +static struct gpiomux_setting __initdata **qct_sets; + +static void __init gpiomux_set_qct_configs(struct msm_gpiomux_config *configs, + unsigned nconfigs) +{ + unsigned c, s, set_slot; + + for (c = 0; c < nconfigs; ++c) { + for (s = 0; s < GPIOMUX_NSETTINGS; ++s) { + set_slot = configs[c].gpio * GPIOMUX_NSETTINGS + s; + qct_sets[set_slot] = configs[c].settings[s]; + } + } +} + +#define msm_gpiomux_install gpiomux_set_qct_configs +#define msm_gpiomux_install_nowrite gpiomux_set_qct_configs + +#define KS8851_IRQ_GPIO 94 + +#define WLAN_CLK 40 +#define WLAN_SET 39 +#define WLAN_DATA0 38 +#define WLAN_DATA1 37 +#define WLAN_DATA2 36 + +static struct gpiomux_setting ap2mdm_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting mdm2ap_status_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting mdm2ap_errfatal_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting mdm2ap_pblrdy = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + + +static struct gpiomux_setting ap2mdm_soft_reset_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting ap2mdm_wakeup = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct msm_gpiomux_config mdm_configs[] __initdata = { + /* AP2MDM_STATUS */ + { + .gpio = 105, + .settings = { + [GPIOMUX_SUSPENDED] = &ap2mdm_cfg, + } + }, + /* MDM2AP_STATUS */ + { + .gpio = 46, + .settings = { + [GPIOMUX_SUSPENDED] = &mdm2ap_status_cfg, + } + }, + /* MDM2AP_ERRFATAL */ + { + .gpio = 82, + .settings = { + [GPIOMUX_SUSPENDED] = &mdm2ap_errfatal_cfg, + } + }, + /* AP2MDM_ERRFATAL */ + { + .gpio = 106, + .settings = { + [GPIOMUX_SUSPENDED] = &ap2mdm_cfg, + } + }, + /* AP2MDM_SOFT_RESET, aka AP2MDM_PON_RESET_N */ + { + .gpio = 24, + .settings = { + [GPIOMUX_SUSPENDED] = &ap2mdm_soft_reset_cfg, + } + }, + /* AP2MDM_WAKEUP */ + { + .gpio = 104, + .settings = { + [GPIOMUX_SUSPENDED] = &ap2mdm_wakeup, + } + }, + /* MDM2AP_PBL_READY*/ + { + .gpio = 80, + .settings = { + [GPIOMUX_SUSPENDED] = &mdm2ap_pblrdy, + } + }, +}; + +static struct gpiomux_setting gpio_uart_config = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_16MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting slimbus = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_KEEPER, +}; + +#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) +static struct gpiomux_setting gpio_eth_config = { + .pull = GPIOMUX_PULL_UP, + .drv = GPIOMUX_DRV_2MA, + .func = GPIOMUX_FUNC_GPIO, +}; + +static struct gpiomux_setting gpio_spi_cs2_config = { + .func = GPIOMUX_FUNC_4, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting gpio_spi_config = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_12MA, + .pull = GPIOMUX_PULL_NONE, +}; +static struct gpiomux_setting gpio_spi_susp_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting gpio_spi_cs1_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct msm_gpiomux_config msm_eth_configs[] = { + { + .gpio = KS8851_IRQ_GPIO, + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_eth_config, + } + }, +}; +#endif + +static struct gpiomux_setting gpio_suspend_config[] = { + { + .func = GPIOMUX_FUNC_GPIO, /* IN-NP */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + }, + { + .func = GPIOMUX_FUNC_GPIO, /* O-LOW */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, + }, +}; + +static struct gpiomux_setting gpio_epm_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_epm_marker_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting wcnss_5wire_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wcnss_5wire_active_cfg = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +#if 0 /* wcnss is not used in Shinano platform */ +static struct gpiomux_setting wcnss_5gpio_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wcnss_5gpio_active_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_DOWN, +}; +#endif + +static struct gpiomux_setting ath_gpio_active_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting ath_gpio_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting gpio_i2c_config = { + .func = GPIOMUX_FUNC_3, + /* + * Please keep I2C GPIOs drive-strength at minimum (2ma). It is a + * workaround for HW issue of glitches caused by rapid GPIO current- + * change. + */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting gpio_i2c_act_config = { + .func = GPIOMUX_FUNC_3, + /* + * Please keep I2C GPIOs drive-strength at minimum (2ma). It is a + * workaround for HW issue of glitches caused by rapid GPIO current- + * change. + */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting lcd_en_act_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting lcd_en_sus_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting atmel_resout_sus_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting atmel_resout_act_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting atmel_int_act_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting atmel_int_sus_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting taiko_reset = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting taiko_int = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; +static struct gpiomux_setting hap_lvl_shft_suspended_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting hap_lvl_shft_active_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_UP, +}; +static struct msm_gpiomux_config hap_lvl_shft_config[] __initdata = { + { + .gpio = 86, + .settings = { + [GPIOMUX_SUSPENDED] = &hap_lvl_shft_suspended_config, + [GPIOMUX_ACTIVE] = &hap_lvl_shft_active_config, + }, + }, +}; + +static struct msm_gpiomux_config msm_touch_configs[] __initdata = { + { + .gpio = 60, /* TOUCH RESET */ + .settings = { + [GPIOMUX_ACTIVE] = &atmel_resout_act_cfg, + [GPIOMUX_SUSPENDED] = &atmel_resout_sus_cfg, + }, + }, + { + .gpio = 61, /* TOUCH IRQ */ + .settings = { + [GPIOMUX_ACTIVE] = &atmel_int_act_cfg, + [GPIOMUX_SUSPENDED] = &atmel_int_sus_cfg, + }, + }, + +}; + +static struct gpiomux_setting hsic_sus_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting hsic_act_cfg = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_12MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting hsic_hub_act_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting hsic_resume_act_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting hsic_resume_susp_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct msm_gpiomux_config msm_hsic_configs[] = { + { + .gpio = 144, /*HSIC_STROBE */ + .settings = { + [GPIOMUX_ACTIVE] = &hsic_act_cfg, + [GPIOMUX_SUSPENDED] = &hsic_sus_cfg, + }, + }, + { + .gpio = 145, /* HSIC_DATA */ + .settings = { + [GPIOMUX_ACTIVE] = &hsic_act_cfg, + [GPIOMUX_SUSPENDED] = &hsic_sus_cfg, + }, + }, + { + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &hsic_resume_act_cfg, + [GPIOMUX_SUSPENDED] = &hsic_resume_susp_cfg, + }, + }, +}; + +static struct msm_gpiomux_config msm_hsic_hub_configs[] = { + { + .gpio = 50, /* HSIC_HUB_INT_N */ + .settings = { + [GPIOMUX_ACTIVE] = &hsic_hub_act_cfg, + [GPIOMUX_SUSPENDED] = &hsic_sus_cfg, + }, + }, +}; + +static struct gpiomux_setting mhl_suspend_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting mhl_active_1_cfg = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting hdmi_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting hdmi_active_1_cfg = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting hdmi_active_2_cfg = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_16MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct msm_gpiomux_config msm_mhl_configs[] __initdata = { + { + /* mhl-sii8334 pwr */ + .gpio = 12, + .settings = { + [GPIOMUX_SUSPENDED] = &mhl_suspend_config, + [GPIOMUX_ACTIVE] = &mhl_active_1_cfg, + }, + }, + { + /* mhl-sii8334 intr */ + .gpio = 82, + .settings = { + [GPIOMUX_SUSPENDED] = &mhl_suspend_config, + [GPIOMUX_ACTIVE] = &mhl_active_1_cfg, + }, + }, +}; + + +static struct msm_gpiomux_config msm_hdmi_configs[] __initdata = { + { + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg, + [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg, + }, + }, + { + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg, + [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg, + }, + }, + { + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg, + [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg, + }, + }, + { + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg, + [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg, + }, + }, +}; + +static struct gpiomux_setting gpio_uart7_active_cfg = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting gpio_uart7_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct msm_gpiomux_config msm_blsp2_uart7_configs[] __initdata = { + { + .gpio = 41, /* BLSP2 UART7 TX */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_uart7_active_cfg, + [GPIOMUX_SUSPENDED] = &gpio_uart7_suspend_cfg, + }, + }, + { + .gpio = 42, /* BLSP2 UART7 RX */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_uart7_active_cfg, + [GPIOMUX_SUSPENDED] = &gpio_uart7_suspend_cfg, + }, + }, + { + .gpio = 43, /* BLSP2 UART7 CTS */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_uart7_active_cfg, + [GPIOMUX_SUSPENDED] = &gpio_uart7_suspend_cfg, + }, + }, + { + .gpio = 44, /* BLSP2 UART7 RFR */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_uart7_active_cfg, + [GPIOMUX_SUSPENDED] = &gpio_uart7_suspend_cfg, + }, + }, +}; + +static struct msm_gpiomux_config msm_rumi_blsp_configs[] __initdata = { + { + .gpio = 45, /* BLSP2 UART8 TX */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_uart_config, + }, + }, + { + .gpio = 46, /* BLSP2 UART8 RX */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_uart_config, + }, + }, +}; + +static struct msm_gpiomux_config msm_lcd_configs[] __initdata = { + { + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &lcd_en_act_cfg, + [GPIOMUX_SUSPENDED] = &lcd_en_sus_cfg, + }, + }, +}; + +static struct msm_gpiomux_config msm_epm_configs[] __initdata = { + { + .gpio = 81, /* EPM enable */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_epm_config, + }, + }, + { + .gpio = 85, /* EPM MARKER2 */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_epm_marker_config, + }, + }, + { + .gpio = 96, /* EPM MARKER1 */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_epm_marker_config, + }, + }, +}; + +static struct msm_gpiomux_config msm_blsp_configs[] __initdata = { +#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) + { + .gpio = 0, /* BLSP1 QUP SPI_DATA_MOSI */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_config, + [GPIOMUX_SUSPENDED] = &gpio_spi_susp_config, + }, + }, + { + .gpio = 1, /* BLSP1 QUP SPI_DATA_MISO */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_config, + [GPIOMUX_SUSPENDED] = &gpio_spi_susp_config, + }, + }, + { + .gpio = 3, /* BLSP1 QUP SPI_CLK */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_config, + [GPIOMUX_SUSPENDED] = &gpio_spi_susp_config, + }, + }, + { + .gpio = 9, /* BLSP1 QUP SPI_CS2A_N */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_cs2_config, + [GPIOMUX_SUSPENDED] = &gpio_spi_susp_config, + }, + }, + { + .gpio = 8, /* BLSP1 QUP SPI_CS1_N */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_cs1_config, + [GPIOMUX_SUSPENDED] = &gpio_spi_susp_config, + }, + }, +#endif + { + .gpio = 6, /* BLSP1 QUP2 I2C_DAT */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + [GPIOMUX_ACTIVE] = &gpio_i2c_act_config, + }, + }, + { + .gpio = 7, /* BLSP1 QUP2 I2C_CLK */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + [GPIOMUX_ACTIVE] = &gpio_i2c_act_config, + }, + }, + { + .gpio = 83, /* BLSP11 QUP I2C_DAT */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + }, + }, + { + .gpio = 84, /* BLSP11 QUP I2C_CLK */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + }, + }, + { + .gpio = 4, /* BLSP2 UART TX */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_uart_config, + }, + }, + { + .gpio = 5, /* BLSP2 UART RX */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_uart_config, + }, + }, + { /* NFC */ + .gpio = 29, /* BLSP1 QUP6 I2C_DAT */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + }, + }, + { /* NFC */ + .gpio = 30, /* BLSP1 QUP6 I2C_CLK */ + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + }, + }, + { + .gpio = 53, /* BLSP2 QUP4 SPI_DATA_MOSI */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_config, + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 54, /* BLSP2 QUP4 SPI_DATA_MISO */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_config, + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 56, /* BLSP2 QUP4 SPI_CLK */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_config, + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 55, /* BLSP2 QUP4 SPI_CS0_N */ + .settings = { + [GPIOMUX_ACTIVE] = &gpio_spi_config, + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, +}; + +static struct msm_gpiomux_config msm8974_slimbus_config[] __initdata = { + { + .gpio = 70, /* slimbus clk */ + .settings = { + [GPIOMUX_SUSPENDED] = &slimbus, + }, + }, + { + .gpio = 71, /* slimbus data */ + .settings = { + [GPIOMUX_SUSPENDED] = &slimbus, + }, + }, +}; + +static struct gpiomux_setting cam_settings[] = { + { + .func = GPIOMUX_FUNC_1, /*active 1*/ /* 0 */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + }, + + { + .func = GPIOMUX_FUNC_1, /*suspend*/ /* 1 */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + }, + + { + .func = GPIOMUX_FUNC_1, /*i2c suspend*/ /* 2 */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_KEEPER, + }, + + { + .func = GPIOMUX_FUNC_GPIO, /*active 0*/ /* 3 */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + }, + + { + .func = GPIOMUX_FUNC_GPIO, /*suspend 0*/ /* 4 */ + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + }, +}; + +static struct gpiomux_setting sd_card_det_active_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting sd_card_det_sleep_config = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct msm_gpiomux_config sd_card_det __initdata = { + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &sd_card_det_active_config, + [GPIOMUX_SUSPENDED] = &sd_card_det_sleep_config, + }, +}; + +static struct msm_gpiomux_config msm_sensor_configs[] __initdata = { + { + .gpio = 15, /* CAM_MCLK0 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 16, /* CAM_MCLK1 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 17, /* CAM_MCLK2 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 18, /* WEBCAM1_RESET_N / CAM_MCLK3 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &cam_settings[4], + }, + }, + { + .gpio = 19, /* CCI_I2C_SDA0 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 20, /* CCI_I2C_SCL0 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 21, /* CCI_I2C_SDA1 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 22, /* CCI_I2C_SCL1 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 23, /* FLASH_LED_EN */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 24, /* FLASH_LED_NOW */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 25, /* WEBCAM2_RESET_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 26, /* CAM_IRQ */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 27, /* OIS_SYNC */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 28, /* WEBCAM1_STANDBY */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 89, /* CAM1_STANDBY_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 90, /* CAM1_RST_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 91, /* CAM2_STANDBY_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 92, /* CAM2_RST_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, +}; + +static struct msm_gpiomux_config msm_sensor_configs_dragonboard[] __initdata = { + { + .gpio = 15, /* CAM_MCLK0 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 16, /* CAM_MCLK1 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 17, /* CAM_MCLK2 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 18, /* WEBCAM1_RESET_N / CAM_MCLK3 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &cam_settings[4], + }, + }, + { + .gpio = 19, /* CCI_I2C_SDA0 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 20, /* CCI_I2C_SCL0 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 21, /* CCI_I2C_SDA1 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 22, /* CCI_I2C_SCL1 */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[0], + }, + }, + { + .gpio = 23, /* FLASH_LED_EN */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 24, /* FLASH_LED_NOW */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 25, /* WEBCAM2_RESET_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 26, /* CAM_IRQ */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &cam_settings[1], + }, + }, + { + .gpio = 27, /* OIS_SYNC */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[0], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 28, /* WEBCAM1_STANDBY */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 89, /* CAM1_STANDBY_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 90, /* CAM1_RST_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 91, /* CAM2_STANDBY_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, + { + .gpio = 94, /* CAM2_RST_N */ + .settings = { + [GPIOMUX_ACTIVE] = &cam_settings[3], + [GPIOMUX_SUSPENDED] = &gpio_suspend_config[1], + }, + }, +}; + +static struct gpiomux_setting auxpcm_act_cfg = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_NONE, +}; + + +static struct gpiomux_setting auxpcm_sus_cfg = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +/* Primary AUXPCM port sharing GPIO lines with Primary MI2S */ +static struct msm_gpiomux_config msm8974_pri_pri_auxpcm_configs[] __initdata = { + { + .gpio = 65, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 66, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 67, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 68, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, +}; + +/* Primary AUXPCM port sharing GPIO lines with Tertiary MI2S */ +static struct msm_gpiomux_config msm8974_pri_ter_auxpcm_configs[] __initdata = { + { + .gpio = 74, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 75, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 76, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 77, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, +}; + +static struct msm_gpiomux_config msm8974_sec_auxpcm_configs[] __initdata = { + { + .gpio = 79, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 80, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 81, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, + { + .gpio = 82, + .settings = { + [GPIOMUX_SUSPENDED] = &auxpcm_sus_cfg, + [GPIOMUX_ACTIVE] = &auxpcm_act_cfg, + }, + }, +}; + +static struct msm_gpiomux_config wcnss_5wire_interface[] = { + { + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, + }, + }, + { + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, + }, + }, + { + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, + }, + }, + { + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, + }, + }, + { + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5wire_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5wire_suspend_cfg, + }, + }, +}; + +#if 0 /* wcnss is not used in Shinano platform */ +static struct msm_gpiomux_config wcnss_5gpio_interface[] = { + { + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5gpio_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5gpio_suspend_cfg, + }, + }, + { + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5gpio_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5gpio_suspend_cfg, + }, + }, + { + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5gpio_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5gpio_suspend_cfg, + }, + }, + { + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5gpio_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5gpio_suspend_cfg, + }, + }, + { + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &wcnss_5gpio_active_cfg, + [GPIOMUX_SUSPENDED] = &wcnss_5gpio_suspend_cfg, + }, + }, +}; +#endif + +static struct msm_gpiomux_config ath_gpio_configs[] = { + { + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &ath_gpio_active_cfg, + [GPIOMUX_SUSPENDED] = &ath_gpio_suspend_cfg, + }, + }, + { + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &ath_gpio_active_cfg, + [GPIOMUX_SUSPENDED] = &ath_gpio_suspend_cfg, + }, + }, +}; + +static struct msm_gpiomux_config msm_taiko_config[] __initdata = { + { + .gpio = 63, /* SYS_RST_N */ + .settings = { + [GPIOMUX_SUSPENDED] = &taiko_reset, + }, + }, + { + .gpio = 72, /* CDC_INT */ + .settings = { + [GPIOMUX_SUSPENDED] = &taiko_int, + }, + }, +}; + +static struct gpiomux_setting sdc3_clk_actv_cfg = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sdc3_cmd_data_0_3_actv_cfg = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting sdc3_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting sdc3_data_1_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct msm_gpiomux_config msm8974_sdc3_configs[] __initdata = { + { + /* DAT3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &sdc3_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc3_suspend_cfg, + }, + }, + { + /* DAT2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &sdc3_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc3_suspend_cfg, + }, + }, + { + /* DAT1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &sdc3_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc3_data_1_suspend_cfg, + }, + }, + { + /* DAT0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &sdc3_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc3_suspend_cfg, + }, + }, + { + /* CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &sdc3_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc3_suspend_cfg, + }, + }, + { + /* CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &sdc3_clk_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc3_suspend_cfg, + }, + }, +}; + +static void msm_gpiomux_sdc3_install(void) +{ + msm_gpiomux_install(msm8974_sdc3_configs, + ARRAY_SIZE(msm8974_sdc3_configs)); +} + +#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT +static struct gpiomux_setting sdc4_clk_actv_cfg = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sdc4_cmd_data_0_3_actv_cfg = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting sdc4_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, +}; + +static struct gpiomux_setting sdc4_data_1_suspend_cfg = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_8MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct msm_gpiomux_config msm8974_sdc4_configs[] __initdata = { + { + /* DAT3 */ + .gpio = 92, + .settings = { + [GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc4_suspend_cfg, + }, + }, + { + /* DAT2 */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc4_suspend_cfg, + }, + }, + { + /* DAT1 */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc4_data_1_suspend_cfg, + }, + }, + { + /* DAT0 */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc4_suspend_cfg, + }, + }, + { + /* CMD */ + .gpio = 91, + .settings = { + [GPIOMUX_ACTIVE] = &sdc4_cmd_data_0_3_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc4_suspend_cfg, + }, + }, + { + /* CLK */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &sdc4_clk_actv_cfg, + [GPIOMUX_SUSPENDED] = &sdc4_suspend_cfg, + }, + }, +}; + +static void msm_gpiomux_sdc4_install(void) +{ + msm_gpiomux_install(msm8974_sdc4_configs, + ARRAY_SIZE(msm8974_sdc4_configs)); +} +#else +static void msm_gpiomux_sdc4_install(void) {} +#endif /* CONFIG_MMC_MSM_SDC4_SUPPORT */ + +static struct msm_gpiomux_config apq8074_dragonboard_ts_config[] __initdata = { + { + /* BLSP1 QUP I2C_DATA */ + .gpio = 2, + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + }, + }, + { + /* BLSP1 QUP I2C_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_SUSPENDED] = &gpio_i2c_config, + }, + }, +}; + +void __init gpiomux_arrange_all_qct_configs(struct gpiomux_setting **settings) +{ + qct_sets = settings; + +#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) + if (!(of_board_is_dragonboard() && machine_is_apq8074())) + msm_gpiomux_install(msm_eth_configs, \ + ARRAY_SIZE(msm_eth_configs)); +#endif + msm_gpiomux_install(msm_blsp_configs, ARRAY_SIZE(msm_blsp_configs)); + msm_gpiomux_install(msm_blsp2_uart7_configs, + ARRAY_SIZE(msm_blsp2_uart7_configs)); + msm_gpiomux_install(wcnss_5wire_interface, + ARRAY_SIZE(wcnss_5wire_interface)); + if (of_board_is_liquid()) + msm_gpiomux_install_nowrite(ath_gpio_configs, + ARRAY_SIZE(ath_gpio_configs)); + msm_gpiomux_install(msm8974_slimbus_config, + ARRAY_SIZE(msm8974_slimbus_config)); + + msm_gpiomux_install(msm_touch_configs, ARRAY_SIZE(msm_touch_configs)); + msm_gpiomux_install(hap_lvl_shft_config, + ARRAY_SIZE(hap_lvl_shft_config)); + + if (of_board_is_dragonboard() && machine_is_apq8074()) + msm_gpiomux_install(msm_sensor_configs_dragonboard, \ + ARRAY_SIZE(msm_sensor_configs_dragonboard)); + else + msm_gpiomux_install(msm_sensor_configs, \ + ARRAY_SIZE(msm_sensor_configs)); + + msm_gpiomux_install(&sd_card_det, 1); + + if (machine_is_apq8074() && (of_board_is_liquid() || \ + of_board_is_dragonboard())) + msm_gpiomux_sdc3_install(); + + if (!(of_board_is_dragonboard() && machine_is_apq8074())) + msm_gpiomux_sdc4_install(); + + msm_gpiomux_install(msm_taiko_config, ARRAY_SIZE(msm_taiko_config)); + + msm_gpiomux_install(msm_hsic_configs, ARRAY_SIZE(msm_hsic_configs)); + msm_gpiomux_install(msm_hsic_hub_configs, + ARRAY_SIZE(msm_hsic_hub_configs)); + + msm_gpiomux_install(msm_hdmi_configs, ARRAY_SIZE(msm_hdmi_configs)); + if (of_board_is_fluid()) + msm_gpiomux_install(msm_mhl_configs, + ARRAY_SIZE(msm_mhl_configs)); + + if (of_board_is_liquid() || + (of_board_is_dragonboard() && machine_is_apq8074())) + msm_gpiomux_install(msm8974_pri_ter_auxpcm_configs, + ARRAY_SIZE(msm8974_pri_ter_auxpcm_configs)); + else + msm_gpiomux_install(msm8974_pri_pri_auxpcm_configs, + ARRAY_SIZE(msm8974_pri_pri_auxpcm_configs)); + + if (of_board_is_cdp()) + msm_gpiomux_install(msm8974_sec_auxpcm_configs, + ARRAY_SIZE(msm8974_sec_auxpcm_configs)); + else if (of_board_is_liquid() || of_board_is_fluid() || + of_board_is_mtp()) + msm_gpiomux_install(msm_epm_configs, + ARRAY_SIZE(msm_epm_configs)); + + msm_gpiomux_install_nowrite(msm_lcd_configs, + ARRAY_SIZE(msm_lcd_configs)); + + if (of_board_is_rumi()) + msm_gpiomux_install(msm_rumi_blsp_configs, + ARRAY_SIZE(msm_rumi_blsp_configs)); + + if (socinfo_get_platform_subtype() == PLATFORM_SUBTYPE_MDM) + msm_gpiomux_install(mdm_configs, + ARRAY_SIZE(mdm_configs)); + + if (of_board_is_dragonboard() && machine_is_apq8074()) + msm_gpiomux_install(apq8074_dragonboard_ts_config, + ARRAY_SIZE(apq8074_dragonboard_ts_config)); +} + +#if 0 /* wcnss is not used in Shinano platform */ +static void wcnss_switch_to_gpio(void) +{ + /* Switch MUX to GPIO */ + msm_gpiomux_install(wcnss_5gpio_interface, + ARRAY_SIZE(wcnss_5gpio_interface)); + + /* Ensure GPIO config */ + gpio_direction_input(WLAN_DATA2); + gpio_direction_input(WLAN_DATA1); + gpio_direction_input(WLAN_DATA0); + gpio_direction_output(WLAN_SET, 0); + gpio_direction_output(WLAN_CLK, 0); +} + +static void wcnss_switch_to_5wire(void) +{ + msm_gpiomux_install(wcnss_5wire_interface, + ARRAY_SIZE(wcnss_5wire_interface)); +} + +u32 wcnss_rf_read_reg(u32 rf_reg_addr) +{ + int count = 0; + u32 rf_cmd_and_addr = 0; + u32 rf_data_received = 0; + u32 rf_bit = 0; + + wcnss_switch_to_gpio(); + + /* Reset the signal if it is already being used. */ + gpio_set_value(WLAN_SET, 0); + gpio_set_value(WLAN_CLK, 0); + + /* We start with cmd_set high WLAN_SET = 1. */ + gpio_set_value(WLAN_SET, 1); + + gpio_direction_output(WLAN_DATA0, 1); + gpio_direction_output(WLAN_DATA1, 1); + gpio_direction_output(WLAN_DATA2, 1); + + gpio_set_value(WLAN_DATA0, 0); + gpio_set_value(WLAN_DATA1, 0); + gpio_set_value(WLAN_DATA2, 0); + + /* Prepare command and RF register address that need to sent out. + * Make sure that we send only 14 bits from LSB. + */ + rf_cmd_and_addr = (((WLAN_RF_READ_REG_CMD) | + (rf_reg_addr << WLAN_RF_REG_ADDR_START_OFFSET)) & + WLAN_RF_READ_CMD_MASK); + + for (count = 0; count < 5; count++) { + gpio_set_value(WLAN_CLK, 0); + + rf_bit = (rf_cmd_and_addr & 0x1); + gpio_set_value(WLAN_DATA0, rf_bit ? 1 : 0); + rf_cmd_and_addr = (rf_cmd_and_addr >> 1); + + rf_bit = (rf_cmd_and_addr & 0x1); + gpio_set_value(WLAN_DATA1, rf_bit ? 1 : 0); + rf_cmd_and_addr = (rf_cmd_and_addr >> 1); + + rf_bit = (rf_cmd_and_addr & 0x1); + gpio_set_value(WLAN_DATA2, rf_bit ? 1 : 0); + rf_cmd_and_addr = (rf_cmd_and_addr >> 1); + + /* Send the data out WLAN_CLK = 1 */ + gpio_set_value(WLAN_CLK, 1); + } + + /* Pull down the clock signal */ + gpio_set_value(WLAN_CLK, 0); + + /* Configure data pins to input IO pins */ + gpio_direction_input(WLAN_DATA0); + gpio_direction_input(WLAN_DATA1); + gpio_direction_input(WLAN_DATA2); + + for (count = 0; count < 2; count++) { + gpio_set_value(WLAN_CLK, 1); + gpio_set_value(WLAN_CLK, 0); + } + + rf_bit = 0; + for (count = 0; count < 6; count++) { + gpio_set_value(WLAN_CLK, 1); + gpio_set_value(WLAN_CLK, 0); + + rf_bit = gpio_get_value(WLAN_DATA0); + rf_data_received |= (rf_bit << (count * 3 + 0)); + + if (count != 5) { + rf_bit = gpio_get_value(WLAN_DATA1); + rf_data_received |= (rf_bit << (count * 3 + 1)); + + rf_bit = gpio_get_value(WLAN_DATA2); + rf_data_received |= (rf_bit << (count * 3 + 2)); + } + } + + gpio_set_value(WLAN_SET, 0); + wcnss_switch_to_5wire(); + + return rf_data_received; +} +#else +u32 wcnss_rf_read_reg(u32 rf_reg_addr) +{ + return 0; +} +#endif +#undef msm_gpiomux_install_nowrite +#undef msm_gpiomux_install diff --git a/arch/arm/mach-msm/board-sony_shinano-hw.c b/arch/arm/mach-msm/board-sony_shinano-hw.c new file mode 100644 index 00000000000..45de818ff7b --- /dev/null +++ b/arch/arm/mach-msm/board-sony_shinano-hw.c @@ -0,0 +1,72 @@ +/* arch/arm/mach-msm/board-sony_shinano-hw.c + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include "board-sony_shinano-hw.h" + +struct hw_map { + const char *space_no; + enum sony_hw hw; +}; + +static const struct hw_map sony_hw_map[] = { + { "1280-4852", HW_LEO }, + { "1280-4876", HW_LEO }, + { "1280-4918", HW_LEO }, + { "1282-0073", HW_LEO }, + { "1280-4897", HW_LEO_SAMBA }, + { "1284-1688", HW_LEO_SAMBA }, + { "1276-9754", HW_SIRIUS }, + { "1278-9570", HW_SIRIUS }, + { "1278-9584", HW_SIRIUS_SAMBA }, + { "1278-9462", HW_SIRIUS_SAMBA }, +}; + +static int _sony_hw = HW_UNKNOWN; + +int get_sony_hw(void) +{ + int ret = 0; + struct device_node *dt_root; + int i, j, count = 0; + const char *dt_space_no = NULL; + + if (_sony_hw != HW_UNKNOWN) + return _sony_hw; + + dt_root = of_find_node_by_path("/"); + count = of_property_count_strings(dt_root, "somc,space-no"); + + if (count <= 0) + return HW_UNKNOWN; + + for (i = 0; i < count; i++) { + ret = of_property_read_string_index(dt_root, + "somc,space-no", i, &dt_space_no); + if (ret < 0) + continue; + + for (j = 0; j < ARRAY_SIZE(sony_hw_map); j++) { + if (!strcmp(dt_space_no, sony_hw_map[j].space_no)) { + _sony_hw = sony_hw_map[j].hw; + break; + }; + }; + }; + + return _sony_hw; +} diff --git a/arch/arm/mach-msm/board-sony_shinano-hw.h b/arch/arm/mach-msm/board-sony_shinano-hw.h new file mode 100644 index 00000000000..4b9b92e7d8a --- /dev/null +++ b/arch/arm/mach-msm/board-sony_shinano-hw.h @@ -0,0 +1,30 @@ +/* arch/arm/mach-msm/board-sony_shinano-hw.h + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * Author: Kouhei Fujiya + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _ARCH_ARM_MACH_MSM_BOARD_SONY_SHINANO_HW_H +#define _ARCH_ARM_MACH_MSM_BOARD_SONY_SHINANO_HW_H + +enum sony_hw { + HW_UNKNOWN, + HW_LEO, + HW_LEO_SAMBA, + HW_SIRIUS, + HW_SIRIUS_SAMBA, +}; + +int get_sony_hw(void); + +#endif /* _ARCH_ARM_MACH_MSM_BOARD_SONY_SHINANO_HW_H */ diff --git a/arch/arm/mach-msm/board-sony_shinano-nfc.c b/arch/arm/mach-msm/board-sony_shinano-nfc.c new file mode 100644 index 00000000000..77973dce473 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_shinano-nfc.c @@ -0,0 +1,132 @@ +/* arch/arm/mach-msm/board-sony_shinano-nfc.c + * + * Copyright (C) 2013 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + +#define WAIT_HW_CONFIG_ENABLED 100 +#define WAIT_GPIO_TOGGLE 10 + +int board_nfc_parse_dt(struct device *dev, + struct pn547_i2c_platform_data *pdata) +{ + struct device_node *np = dev->of_node; + int ret = 0; + + pdata->dynamic_config = of_property_read_bool(np, "dynamic_config"); + if (pdata->dynamic_config) { + ret = of_get_named_gpio(np, "configure_gpio", 0); + if (ret < 0) { + dev_err(dev, "failed to get \"configure_gpio\"\n"); + goto err; + } + pdata->configure_gpio = ret; + + ret = of_get_named_gpio(np, "configure_mpp", 0); + if (ret < 0) { + dev_err(dev, "failed to get \"configure_mpp\"\n"); + goto err; + } + pdata->configure_mpp = ret; + } + +err: + return ret; +} + +int board_nfc_hw_lag_check(struct i2c_client *d, + struct pn547_i2c_platform_data *pdata) +{ + struct qpnp_pin_cfg mpp_din_config = { + .mode = QPNP_PIN_MODE_DIG_IN, + .invert = QPNP_PIN_INVERT_DISABLE, + .vin_sel = QPNP_PIN_VIN0, + .src_sel = QPNP_PIN_SEL_FUNC_CONSTANT, + .master_en = QPNP_PIN_MASTER_ENABLE, + }; + struct qpnp_pin_cfg mpp_dout_config = { + .mode = QPNP_PIN_MODE_DIG_OUT, + .output_type = QPNP_PIN_OUT_BUF_CMOS, + .invert = QPNP_PIN_INVERT_DISABLE, + .vin_sel = QPNP_PIN_VIN2, + .out_strength = QPNP_PIN_OUT_STRENGTH_HIGH, + .src_sel = QPNP_PIN_SEL_FUNC_CONSTANT, + .master_en = QPNP_PIN_MASTER_ENABLE, + }; + + int src_val, new_val, ret = 0; + dev_dbg(&d->dev, "%s: hw lag check start\n", __func__); + + ret = gpio_request(pdata->configure_mpp, "pn547_mpp"); + if (ret) { + dev_err(&d->dev, "%s: failed gpio_request(mpp) %d\n", + __func__, ret); + goto err_gpio_request_mpp; + } + ret = gpio_request(pdata->configure_gpio, "pn547_gpio"); + if (ret) { + dev_err(&d->dev, "%s: failed gpio_request(gpio) %d\n", + __func__, ret); + goto err_gpio_request_gpio; + } + + /* change mpp config */ + ret = qpnp_pin_config(pdata->configure_mpp, &mpp_din_config); + if (ret) { + dev_err(&d->dev, "%s: failed config mpp(din) %d\n", + __func__, ret); + goto err_pin_config_din; + } + + /* wait for switching mpp config */ + msleep(WAIT_HW_CONFIG_ENABLED); + + src_val = gpio_get_value_cansleep(pdata->configure_mpp); + dev_dbg(&d->dev, "%s: mpp value (src=%d)\n", __func__, src_val); + + /* toggle gpio */ + gpio_set_value_cansleep(pdata->configure_gpio, 1); + msleep(WAIT_GPIO_TOGGLE); + gpio_set_value_cansleep(pdata->configure_gpio, 0); + msleep(WAIT_GPIO_TOGGLE); + + new_val = gpio_get_value_cansleep(pdata->configure_mpp); + dev_dbg(&d->dev, "%s: mpp value (new=%d)\n", __func__, new_val); + + /* toggle gpio */ + gpio_set_value_cansleep(pdata->configure_gpio, 1); + msleep(WAIT_GPIO_TOGGLE); + gpio_set_value_cansleep(pdata->configure_gpio, 0); + msleep(WAIT_GPIO_TOGGLE); + + if (src_val != new_val) { + dev_dbg(&d->dev, "%s: no matched device\n", __func__); + ret = -ENODEV; + } else { + dev_dbg(&d->dev, "%s: matched device\n", __func__); + ret = qpnp_pin_config(pdata->configure_mpp, &mpp_dout_config); + if (ret) + dev_err(&d->dev, "%s: failed config mpp(dout) %d\n", + __func__, ret); + /* wait for switching mpp config */ + msleep(WAIT_HW_CONFIG_ENABLED); + } +err_pin_config_din: + gpio_free(pdata->configure_gpio); +err_gpio_request_gpio: + gpio_free(pdata->configure_mpp); +err_gpio_request_mpp: + dev_dbg(&d->dev, "%s: hw lag check end\n", __func__); + return ret; +} diff --git a/arch/arm/mach-msm/board-sony_shinano-wifi.c b/arch/arm/mach-msm/board-sony_shinano-wifi.c new file mode 100644 index 00000000000..64715fd5f1e --- /dev/null +++ b/arch/arm/mach-msm/board-sony_shinano-wifi.c @@ -0,0 +1,224 @@ +/* arch/arm/mach-msm/board-sony_shinano-wifi.c + * + * Copyright (C) 2013 Sony Mobile Communications AB. + * Copyright (C) 2013 LGE, Inc + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int shinano_wifi_cd; +static void (*wifi_status_cb)(int card_present, void *dev_id); +static void *wifi_status_cb_devid; +static struct regulator *wifi_batfet; +static int batfet_ena; + +#define WIFI_POWER_PMIC_GPIO 18 +#define WIFI_IRQ_GPIO 67 + +/* These definitions need to be aligned with bcmdhd */ +#define WLAN_STATIC_SCAN_BUF 5 +#define ESCAN_BUF_SIZE (64 * 1024) /* for WIPHY_ESCAN0 */ +#define PREALLOC_WLAN_SEC_NUM 4 +#define PREALLOC_WLAN_BUF_NUM 160 +#define PREALLOC_WLAN_SECTION_HEADER 24 + +#define WLAN_SECTION_SIZE_0 (PREALLOC_WLAN_BUF_NUM * 128) /* for PROT */ +#define WLAN_SECTION_SIZE_1 (PREALLOC_WLAN_BUF_NUM * 128) /* for RXBUF */ +#define WLAN_SECTION_SIZE_2 (PREALLOC_WLAN_BUF_NUM * 512) /* for DATABUF */ +#define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_BUF_NUM * 1024) /* for OSL_BUF */ + +/* These definitions are copied from bcmdhd */ +#define DHD_SKB_HDRSIZE 336 +#define DHD_SKB_1PAGE_BUFSIZE ((PAGE_SIZE * 1) - DHD_SKB_HDRSIZE) +#define DHD_SKB_2PAGE_BUFSIZE ((PAGE_SIZE * 2) - DHD_SKB_HDRSIZE) +#define DHD_SKB_4PAGE_BUFSIZE ((PAGE_SIZE * 4) - DHD_SKB_HDRSIZE) + +#define WLAN_SKB_BUF_NUM 17 /* 8 for 1PAGE, 8 for 2PAGE, 1 for 4PAGE */ + +static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM]; + +struct wlan_mem_prealloc { + void *mem_ptr; + unsigned long size; +}; + +static struct wlan_mem_prealloc wlan_mem_array[PREALLOC_WLAN_SEC_NUM] = { + { NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER) }, + { NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER) }, + { NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER) }, + { NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER) } +}; + +static void *wlan_static_scan_buf; + +static int shinano_wifi_init_mem(void) +{ + int i; + for (i = 0; i < WLAN_SKB_BUF_NUM; i++) + wlan_static_skb[i] = NULL; + + for (i = 0; i < 8; i++) { + wlan_static_skb[i] = dev_alloc_skb(DHD_SKB_1PAGE_BUFSIZE); + if (!wlan_static_skb[i]) + goto err_skb_alloc; + } + + for (; i < 16; i++) { + wlan_static_skb[i] = dev_alloc_skb(DHD_SKB_2PAGE_BUFSIZE); + if (!wlan_static_skb[i]) + goto err_skb_alloc; + } + + wlan_static_skb[i] = dev_alloc_skb(DHD_SKB_4PAGE_BUFSIZE); + if (!wlan_static_skb[i]) + goto err_skb_alloc; + + for (i = 0; i < PREALLOC_WLAN_SEC_NUM; i++) { + wlan_mem_array[i].mem_ptr = + kmalloc(wlan_mem_array[i].size, GFP_KERNEL); + if (!wlan_mem_array[i].mem_ptr) + goto err_mem_alloc; + } + + wlan_static_scan_buf = kmalloc(ESCAN_BUF_SIZE, GFP_KERNEL); + if (!wlan_static_scan_buf) + goto err_mem_alloc; + + return 0; + +err_mem_alloc: + printk(KERN_ERR "%s: failed to allocate mem_alloc\n", __func__); + for (i--; i >= 0; i--) { + kfree(wlan_mem_array[i].mem_ptr); + wlan_mem_array[i].mem_ptr = NULL; + } + + i = WLAN_SKB_BUF_NUM; +err_skb_alloc: + printk(KERN_ERR "%s: failed to allocate skb_alloc\n", __func__); + for (i--; i >= 0; i--) { + dev_kfree_skb(wlan_static_skb[i]); + wlan_static_skb[i] = NULL; + } + + return -ENOMEM; +} + +static void *shinano_wifi_mem_prealloc(int section, unsigned long size) +{ + if (section == PREALLOC_WLAN_SEC_NUM) + return wlan_static_skb; + if (section == WLAN_STATIC_SCAN_BUF) + return wlan_static_scan_buf; + + if ((section < 0) || (section > PREALLOC_WLAN_SEC_NUM)) + return NULL; + if (size > wlan_mem_array[section].size) + return NULL; + return wlan_mem_array[section].mem_ptr; +} + +int shinano_wifi_set_power(int on) +{ + int gpio = qpnp_pin_map("pm8941-gpio", WIFI_POWER_PMIC_GPIO); + if (!wifi_batfet) { + wifi_batfet = regulator_get(NULL, "batfet"); + if (IS_ERR_OR_NULL(wifi_batfet)) { + printk(KERN_ERR "unable to get batfet reg. rc=%d\n", + PTR_RET(wifi_batfet)); + wifi_batfet = NULL; + } + } + if (on) { + if (!batfet_ena && wifi_batfet) { + regulator_enable(wifi_batfet); + batfet_ena = 1; + } + } + gpio_set_value(gpio, on); + if (!on) { + if (batfet_ena && wifi_batfet) { + regulator_disable(wifi_batfet); + batfet_ena = 0; + } + } + return 0; +} + +int shinano_wifi_set_carddetect(int val) +{ + shinano_wifi_cd = val; + if (wifi_status_cb) + wifi_status_cb(val, wifi_status_cb_devid); + else + printk(KERN_WARNING "%s: Nobody to notify\n", __func__); + return 0; +} + +static struct resource shinano_wifi_resources[] = { + [0] = { + .name = "bcmdhd_wlan_irq", + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | + IORESOURCE_IRQ_SHAREABLE, + }, +}; + +struct wifi_platform_data shinano_wifi_control = { + .set_power = shinano_wifi_set_power, + .set_carddetect = shinano_wifi_set_carddetect, + .mem_prealloc = shinano_wifi_mem_prealloc, +}; + +static struct platform_device shinano_wifi = { + .name = "bcmdhd_wlan", + .id = -1, + .num_resources = ARRAY_SIZE(shinano_wifi_resources), + .resource = shinano_wifi_resources, + .dev = { + .platform_data = &shinano_wifi_control, + }, +}; + +static int __init shinano_wifi_init(void) +{ + if (shinano_wifi_init_mem()) + return -ENOMEM; + shinano_wifi.resource->start = gpio_to_irq(WIFI_IRQ_GPIO); + shinano_wifi.resource->end = gpio_to_irq(WIFI_IRQ_GPIO); + platform_device_register(&shinano_wifi); + return 0; +} + +device_initcall(shinano_wifi_init); + +int shinano_wifi_status_register( + void (*callback)(int card_present, void *dev_id), + void *dev_id) +{ + if (wifi_status_cb) + return -EAGAIN; + wifi_status_cb = callback; + wifi_status_cb_devid = dev_id; + return 0; +} + +unsigned int shinano_wifi_status(struct device *dev) +{ + return shinano_wifi_cd; +} diff --git a/arch/arm/mach-msm/board-sony_sirius-gpiomux-diff.h b/arch/arm/mach-msm/board-sony_sirius-gpiomux-diff.h new file mode 100644 index 00000000000..60c75dc1d07 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_sirius-gpiomux-diff.h @@ -0,0 +1,20 @@ +/* arch/arm/mach-msm/board-sony_sirius-gpiomux-diff.h + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _ARCH_ARM_MACH_MSM_BOARD_SONY_SIRIUS_GPIOMUX_DIFF_H +#define _ARCH_ARM_MACH_MSM_BOARD_SONY_SIRIUS_GPIOMUX_DIFF_H + +extern struct msm_gpiomux_configs sirius_samba_gpiomux_cfgs __initdata; + +#endif /* _ARCH_ARM_MACH_MSM_BOARD_SONY_SIRIUS_GPIOMUX_DIFF_H */ diff --git a/arch/arm/mach-msm/board-sony_sirius-gpiomux.c b/arch/arm/mach-msm/board-sony_sirius-gpiomux.c new file mode 100644 index 00000000000..d2d66c37d43 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_sirius-gpiomux.c @@ -0,0 +1,1120 @@ +/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. + * Copyright (C) 2013 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include "board-sony_shinano-hw.h" +#include "board-sony_sirius-gpiomux-diff.h" +#include "sony_gpiomux.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_high = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_HIGH, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_2ma_pull_up_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting gpio_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_FOLLOW_QCT, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting gpio_2ma_follow_qct = { + .func = GPIOMUX_FOLLOW_QCT, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_FOLLOW_QCT, + .dir = GPIOMUX_FOLLOW_QCT, +}; + +static struct gpiomux_setting mhl_spi = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_tx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_4MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting debug_uart_rx = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting cam_mclk = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_6MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting cam_i2c = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting nfc_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_10MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting wlan_sdio_clk_active = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_10MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting wlan_sdio_clk_suspend = { + .func = GPIOMUX_FUNC_2, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_tx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_uart_rx = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_cts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_UP, +}; + +static struct gpiomux_setting bt_uart_rts = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting ts_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting damp_i2s = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting bt_pcm = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting peripheral_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting sensors_i2c = { + .func = GPIOMUX_FUNC_3, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct gpiomux_setting hsic = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +static struct msm_gpiomux_config shinano_all_configs[] __initdata = { + { /* MHL_SPI_MOSI */ + .gpio = 0, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_MISO */ + .gpio = 1, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CS_N */ + .gpio = 2, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* MHL_SPI_CLK */ + .gpio = 3, + .settings = { + [GPIOMUX_ACTIVE] = &mhl_spi, + [GPIOMUX_SUSPENDED] = &mhl_spi, + }, + }, + { /* UART_TX_DFMS */ + .gpio = 4, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_tx, + [GPIOMUX_SUSPENDED] = &debug_uart_tx, + }, + }, + { /* UART_RX_DTMS */ + .gpio = 5, + .settings = { + [GPIOMUX_ACTIVE] = &debug_uart_rx, + [GPIOMUX_SUSPENDED] = &debug_uart_rx, + }, + }, + { /* NC */ + .gpio = 6, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 7, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_SERVICE */ + .gpio = 8, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* UIM1_DETECT */ + .gpio = 9, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* MHL_SWITCH_SEL_1 */ + .gpio = 10, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_SWITCH_SEL_2 */ + .gpio = 11, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NC */ + .gpio = 12, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 13, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 14, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CAM0_MCLK0 */ + .gpio = 15, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* MHL_RST_N */ + .gpio = 16, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM1_MCLK2 */ + .gpio = 17, + .settings = { + [GPIOMUX_ACTIVE] = &cam_mclk, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CHATCAM_RESET_N */ + .gpio = 18, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* CAM0_I2C_SDA0 */ + .gpio = 19, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM0_I2C_SCL0 */ + .gpio = 20, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SDA1 */ + .gpio = 21, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* CAM1_I2C_SCL1 */ + .gpio = 22, + .settings = { + [GPIOMUX_ACTIVE] = &cam_i2c, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* MHL_PWR_EN */ + .gpio = 23, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_IRQ_FELICA_INT_N */ + .gpio = 24, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PON_VOLTAGE_SEL */ + .gpio = 25, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* LCD_ID */ + .gpio = 26, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* NC */ + .gpio = 27, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 28, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NFC_I2C_SDA */ + .gpio = 29, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* NFC_I2C_SCL */ + .gpio = 30, + .settings = { + [GPIOMUX_ACTIVE] = &nfc_i2c, + [GPIOMUX_SUSPENDED] = &nfc_i2c, + }, + }, + { /* MHL_FW_WAKE */ + .gpio = 31, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* HDMI_DDC_CLK */ + .gpio = 32, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_DDC_DATA */ + .gpio = 33, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HDMI_HOT_PLUG_DET */ + .gpio = 34, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WLAN_SDIO_DATA_3 */ + .gpio = 35, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_2 */ + .gpio = 36, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_1 */ + .gpio = 37, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_DATA_0 */ + .gpio = 38, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CMD */ + .gpio = 39, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_suspend, + }, + }, + { /* WLAN_SDIO_CLK */ + .gpio = 40, + .settings = { + [GPIOMUX_ACTIVE] = &wlan_sdio_clk_active, + [GPIOMUX_SUSPENDED] = &wlan_sdio_clk_suspend, + }, + }, + { /* BT_UART_TX */ + .gpio = 41, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_tx, + [GPIOMUX_SUSPENDED] = &bt_uart_tx, + }, + }, + { /* BT_UART_RX */ + .gpio = 42, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rx, + [GPIOMUX_SUSPENDED] = &bt_uart_rx, + }, + }, + { /* BT_UART_CTS_N */ + .gpio = 43, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_cts, + [GPIOMUX_SUSPENDED] = &bt_uart_cts, + }, + }, + { /* BT_UART_RTS_N */ + .gpio = 44, + .settings = { + [GPIOMUX_ACTIVE] = &bt_uart_rts, + [GPIOMUX_SUSPENDED] = &bt_uart_rts, + }, + }, + { /* NC */ + .gpio = 45, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 46, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TS_I2C_SDA */ + .gpio = 47, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* TS_I2C_SCL */ + .gpio = 48, + .settings = { + [GPIOMUX_ACTIVE] = &ts_i2c, + [GPIOMUX_SUSPENDED] = &ts_i2c, + }, + }, + { /* NC(UIM2_DATA) */ + .gpio = 49, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_CLK) */ + .gpio = 50, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_RST) */ + .gpio = 51, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC(UIM2_DETECT) */ + .gpio = 52, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 53, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 54, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* DEBUG_GPIO0 */ + .gpio = 55, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DEBUG_GPIO1 */ + .gpio = 56, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* NFC_DWLD_EN */ + .gpio = 57, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* DAMP_I2S_SCLK */ + .gpio = 58, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_WS */ + .gpio = 59, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D0 */ + .gpio = 60, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* DAMP_I2S_D1 */ + .gpio = 61, + .settings = { + [GPIOMUX_ACTIVE] = &damp_i2s, + [GPIOMUX_SUSPENDED] = &damp_i2s, + }, + }, + { /* SD_CARD_DET_N */ + .gpio = 62, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* CODEC_RESET_N */ + .gpio = 63, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* MHL_INT */ + .gpio = 64, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* ACCEL_INT2 */ + .gpio = 65, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* GYRO_INT1 */ + .gpio = 66, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WL_HOST_WAKE */ + .gpio = 67, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 68, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 69, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SLIMBUS_CLK */ + .gpio = 70, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* SLIMBUS_DATA */ + .gpio = 71, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CODEC_INT1_N */ + .gpio = 72, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* ACCEL_INT1 */ + .gpio = 73, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* PROX_ALS_INT_N */ + .gpio = 74, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_up_in, + }, + }, + { /* GYRO_INT2 */ + .gpio = 75, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 76, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 77, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 78, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* BT_PCM_SCLK */ + .gpio = 79, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_SYNC */ + .gpio = 80, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DIN */ + .gpio = 81, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* BT_PCM_DOUT */ + .gpio = 82, + .settings = { + [GPIOMUX_ACTIVE] = &bt_pcm, + [GPIOMUX_SUSPENDED] = &bt_pcm, + }, + }, + { /* PERIPHERAL_I2C_SDA */ + .gpio = 83, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* PERIPHERAL_I2C_SCL */ + .gpio = 84, + .settings = { + [GPIOMUX_ACTIVE] = &peripheral_i2c, + [GPIOMUX_SUSPENDED] = &peripheral_i2c, + }, + }, + { /* TP_RESET */ + .gpio = 85, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_high, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_high, + }, + }, + { /* TS_INT_N */ + .gpio = 86, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_in, + }, + }, + { /* SENSORS_I2C_SDA */ + .gpio = 87, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* SENSORS_I2C_SCL */ + .gpio = 88, + .settings = { + [GPIOMUX_ACTIVE] = &sensors_i2c, + [GPIOMUX_SUSPENDED] = &sensors_i2c, + }, + }, + { /* NC */ + .gpio = 89, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 90, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 91, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 92, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* CODEC_INT2_N */ + .gpio = 93, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* CAM0_RST_N */ + .gpio = 94, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* BT_HOST_WAKE */ + .gpio = 95, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BT_DEV_WAKE */ + .gpio = 96, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* UIM1_DATA */ + .gpio = 97, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_CLK */ + .gpio = 98, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM1_RST */ + .gpio = 99, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* UIM_HOT_SWAP */ + .gpio = 100, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_up_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* BATT_REM_ALARM */ + .gpio = 101, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_follow_qct, + }, + }, + { /* MHL_SPI_DVLD */ + .gpio = 102, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* FORCED_USB_BOOT */ + .gpio = 103, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* NC */ + .gpio = 104, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 105, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 106, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 107, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_TX_LB4 */ + .gpio = 108, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 109, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 110, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 111, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GRFC8 [WDOG_DISABLE] */ + .gpio = 112, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC [BOOT_CONFIG_1] */ + .gpio = 113, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC [BOOT_CONFIG_2] */ + .gpio = 114, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC [BOOT_CONFIG_3] */ + .gpio = 115, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* TX_GTR_THRES [BOOT_CONFIG_4] */ + .gpio = 116, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC(Reserved for ANT_TUNE0) */ + .gpio = 117, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_WB_CPL */ + .gpio = 118, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 119, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* SW_PRX_LB3 */ + .gpio = 120, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* SW_PRX_LB41 */ + .gpio = 121, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 122, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 123, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 124, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 125, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 126, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 127, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* EXT_GPS_LNA_EN */ + .gpio = 128, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 129, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* LTE_ACTIVE */ + .gpio = 130, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* LTE_TX_COEX_WCN */ + .gpio = 131, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* WCN_TX_COEX_LTE */ + .gpio = 132, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* WTR_SSBI1_TX_GPS */ + .gpio = 133, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* WTR_SSBI2_PRX_DRX */ + .gpio = 134, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 135, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* WFR_SSBI */ + .gpio = 136, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* NC */ + .gpio = 137, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* GSM_TX_PHASE_D1 */ + .gpio = 138, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* GSM_TX_PHASE_D0 */ + .gpio = 139, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_CLK */ + .gpio = 140, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE1_DATA */ + .gpio = 141, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_CLK */ + .gpio = 142, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* RFFE2_DATA */ + .gpio = 143, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_follow_qct, + [GPIOMUX_SUSPENDED] = &gpio_2ma_follow_qct, + }, + }, + { /* HSIC_STROBE */ + .gpio = 144, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, + { /* HSIC_DATA */ + .gpio = 145, + .settings = { + [GPIOMUX_ACTIVE] = &hsic, + [GPIOMUX_SUSPENDED] = &hsic, + }, + }, +}; + +void __init msm_8974_init_gpiomux(void) +{ + int rc, hw; + struct msm_gpiomux_configs base; + + base.cfg = shinano_all_configs; + base.ncfg = ARRAY_SIZE(shinano_all_configs); + + hw = get_sony_hw(); + + if (hw == HW_SIRIUS_SAMBA) + overwrite_configs(&base, &sirius_samba_gpiomux_cfgs); + + rc = sony_init_gpiomux(shinano_all_configs, + ARRAY_SIZE(shinano_all_configs)); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return; + } +} diff --git a/arch/arm/mach-msm/board-sony_sirius_samba-gpiomux-diff.c b/arch/arm/mach-msm/board-sony_sirius_samba-gpiomux-diff.c new file mode 100644 index 00000000000..a5758c09a78 --- /dev/null +++ b/arch/arm/mach-msm/board-sony_sirius_samba-gpiomux-diff.c @@ -0,0 +1,106 @@ +/* arch/arm/mach-msm/board-sony_sirius_samba-gpiomux-diff.c + * + * Copyright (C) 2014 Sony Mobile Communications Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include "board-sony_sirius-gpiomux-diff.h" + +static struct gpiomux_setting unused_gpio = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_no_pull_out_low = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, + .dir = GPIOMUX_OUT_LOW, +}; + +static struct gpiomux_setting gpio_2ma_pull_down_in = { + .func = GPIOMUX_FUNC_GPIO, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_DOWN, + .dir = GPIOMUX_IN, +}; + +static struct gpiomux_setting tsif = { + .func = GPIOMUX_FUNC_1, + .drv = GPIOMUX_DRV_2MA, + .pull = GPIOMUX_PULL_NONE, +}; + +struct msm_gpiomux_config sirius_samba_configs[] __initdata = { + { /* TUNER_RST_N */ + .gpio = 13, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* TUNER_PWR_EN */ + .gpio = 14, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_no_pull_out_low, + [GPIOMUX_SUSPENDED] = &gpio_2ma_no_pull_out_low, + }, + }, + { /* TUNER_INT */ + .gpio = 68, + .settings = { + [GPIOMUX_ACTIVE] = &gpio_2ma_pull_down_in, + [GPIOMUX_SUSPENDED] = &gpio_2ma_pull_down_in, + }, + }, + { /* TSIF_CLK */ + .gpio = 89, + .settings = { + [GPIOMUX_ACTIVE] = &tsif, + [GPIOMUX_SUSPENDED] = &tsif, + }, + }, + { /* TSIF_EN */ + .gpio = 90, + .settings = { + [GPIOMUX_ACTIVE] = &tsif, + [GPIOMUX_SUSPENDED] = &tsif, + }, + }, + { /* TSIF_DATA */ + .gpio = 91, + .settings = { + [GPIOMUX_ACTIVE] = &tsif, + [GPIOMUX_SUSPENDED] = &tsif, + }, + }, + { /* NC */ + .gpio = 108, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 121, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, + { /* NC */ + .gpio = 136, + .settings = { [GPIOMUX_SUSPENDED] = &unused_gpio, }, + }, +}; + +struct msm_gpiomux_configs sirius_samba_gpiomux_cfgs __initdata = { + sirius_samba_configs, ARRAY_SIZE(sirius_samba_configs) +}; diff --git a/arch/arm/mach-msm/clock-gcc-8974.c b/arch/arm/mach-msm/clock-gcc-8974.c old mode 100644 new mode 100755 index 9e104ba3398..d65dbd8dc3b --- a/arch/arm/mach-msm/clock-gcc-8974.c +++ b/arch/arm/mach-msm/clock-gcc-8974.c @@ -1136,6 +1136,7 @@ static struct clk_freq_tbl ftbl_gcc_sdcc1_apps_clk_ac[] = { * 2) SDCC[2-4] on MSM8974Pro AC */ static struct clk_freq_tbl ftbl_gcc_sdcc1_4_apps_clk[] = { +#ifndef CONFIG_MMC_SDHCI_MIMO F( 144000, cxo, 16, 3, 25), F( 400000, cxo, 12, 1, 4), F( 20000000, gpll0, 15, 1, 2), @@ -1144,6 +1145,17 @@ static struct clk_freq_tbl ftbl_gcc_sdcc1_4_apps_clk[] = { F(100000000, gpll0, 6, 0, 0), F(200000000, gpll0, 3, 0, 0), F_END +#else + F( 144000, cxo, 16, 3, 25), + F( 400000, cxo, 12, 1, 4), + F( 20000000, gpll0, 15, 1, 2), + F( 25000000, gpll0, 12, 1, 2), + F( 40000000, gpll0, 15, 0, 0), + F( 50000000, gpll0, 12, 0, 0), + F(100000000, gpll0, 6, 0, 0), + F(200000000, gpll0, 3, 0, 0), + F_END +#endif }; static struct rcg_clk sdcc1_apps_clk_src = { @@ -2378,7 +2390,9 @@ static struct clk_lookup msm_clocks_gcc_8974[] = { CLK_LOOKUP_OF("dma_bam_pclk", gcc_bam_dma_ahb_clk, "msm_sps"), CLK_LOOKUP_OF("iface_clk", gcc_blsp1_ahb_clk, "f991f000.serial"), CLK_LOOKUP_OF("iface_clk", gcc_blsp1_ahb_clk, "f9924000.i2c"), + CLK_LOOKUP_OF("iface_clk", gcc_blsp1_ahb_clk, "f9926000.i2c"), CLK_LOOKUP_OF("iface_clk", gcc_blsp1_ahb_clk, "f991e000.serial"), + CLK_LOOKUP_OF("iface_clk", gcc_blsp1_ahb_clk, "f9922000.serial"), CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup1_i2c_apps_clk, "f9923000.i2c"), CLK_LOOKUP_OF("iface_clk", gcc_blsp1_ahb_clk, "f9923000.i2c"), CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup2_i2c_apps_clk, "f9924000.i2c"), @@ -2387,7 +2401,7 @@ static struct clk_lookup msm_clocks_gcc_8974[] = { CLK_LOOKUP_OF("iface_clk", gcc_blsp1_ahb_clk, "f9923000.spi"), CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup3_i2c_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup3_spi_apps_clk, ""), - CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup4_i2c_apps_clk, ""), + CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup4_i2c_apps_clk, "f9926000.i2c"), CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup4_spi_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup5_i2c_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp1_qup5_spi_apps_clk, ""), @@ -2398,15 +2412,18 @@ static struct clk_lookup msm_clocks_gcc_8974[] = { CLK_LOOKUP_OF("core_clk", gcc_blsp1_uart3_apps_clk, "f991f000.serial"), CLK_LOOKUP_OF("core_clk", gcc_blsp1_uart4_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp1_uart5_apps_clk, ""), - CLK_LOOKUP_OF("core_clk", gcc_blsp1_uart6_apps_clk, ""), + CLK_LOOKUP_OF("core_clk", gcc_blsp1_uart6_apps_clk, "f9922000.serial"), + CLK_LOOKUP_OF("iface_clk", gcc_blsp2_ahb_clk, "f9964000.i2c"), CLK_LOOKUP_OF("iface_clk", gcc_blsp2_ahb_clk, "f9967000.i2c"), CLK_LOOKUP_OF("iface_clk", gcc_blsp2_ahb_clk, "f9966000.spi"), + CLK_LOOKUP_OF("iface_clk", gcc_blsp2_ahb_clk, "f9960000.serial"), CLK_LOOKUP_OF("iface_clk", gcc_blsp2_ahb_clk, "f995e000.serial"), CLK_LOOKUP_OF("iface_clk", gcc_blsp2_ahb_clk, "f995d000.uart"), + CLK_LOOKUP_OF("iface_clk", gcc_blsp2_ahb_clk, "f9968000.i2c"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup1_i2c_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup1_spi_apps_clk, ""), - CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup2_i2c_apps_clk, ""), + CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup2_i2c_apps_clk, "f9964000.i2c"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup2_spi_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup3_i2c_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup3_spi_apps_clk, ""), @@ -2414,12 +2431,12 @@ static struct clk_lookup msm_clocks_gcc_8974[] = { CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup5_i2c_apps_clk, "f9967000.i2c"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup4_spi_apps_clk, "f9966000.spi"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup5_spi_apps_clk, ""), - CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup6_i2c_apps_clk, ""), + CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup6_i2c_apps_clk, "f9968000.i2c"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_qup6_spi_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp2_uart1_apps_clk, "f995d000.uart"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_uart2_apps_clk, "f995e000.serial"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_uart3_apps_clk, ""), - CLK_LOOKUP_OF("core_clk", gcc_blsp2_uart4_apps_clk, ""), + CLK_LOOKUP_OF("core_clk", gcc_blsp2_uart4_apps_clk, "f9960000.serial"), CLK_LOOKUP_OF("core_clk", gcc_blsp2_uart5_apps_clk, ""), CLK_LOOKUP_OF("core_clk", gcc_blsp2_uart6_apps_clk, ""), diff --git a/arch/arm/mach-msm/clock-mdss-8974.c b/arch/arm/mach-msm/clock-mdss-8974.c index 89b03b46a56..f5f77639852 100644 --- a/arch/arm/mach-msm/clock-mdss-8974.c +++ b/arch/arm/mach-msm/clock-mdss-8974.c @@ -663,7 +663,7 @@ static int hdmi_vco_set_rate(struct clk *c, unsigned long rate) REG_W(0xDB, hdmi_phy_base + HDMI_PHY_ANA_CFG0); REG_W(0x43, hdmi_phy_base + HDMI_PHY_ANA_CFG1); REG_W(0x02, hdmi_phy_base + HDMI_PHY_ANA_CFG2); - REG_W(0x00, hdmi_phy_base + HDMI_PHY_ANA_CFG3); + REG_W(0xFF, hdmi_phy_base + HDMI_PHY_ANA_CFG3); REG_W(0x04, hdmi_phy_pll_base + HDMI_UNI_PLL_VREG_CFG); REG_W(0xD0, hdmi_phy_base + HDMI_PHY_DCC_CFG0); REG_W(0x1A, hdmi_phy_base + HDMI_PHY_DCC_CFG1); diff --git a/arch/arm/mach-msm/clock-rpm-8974.c b/arch/arm/mach-msm/clock-rpm-8974.c index e9192809aff..15502253dce 100644 --- a/arch/arm/mach-msm/clock-rpm-8974.c +++ b/arch/arm/mach-msm/clock-rpm-8974.c @@ -158,11 +158,14 @@ static struct clk_lookup msm_clocks_rpm_8974[] = { CLK_LOOKUP_OF("xo", cxo_mmss, "fd8c0000.qcom,mmsscc"), CLK_LOOKUP_OF("mmssnoc_ahb", mmssnoc_ahb_clk, "fd8c0000.qcom,mmsscc"), + CLK_LOOKUP_OF("", cxo_d1, "f9967000.i2c"), CLK_LOOKUP_OF("xo", cxo_otg_clk, "msm_otg"), CLK_LOOKUP_OF("xo", cxo_pil_lpass_clk, "fe200000.qcom,lpass"), CLK_LOOKUP_OF("xo", cxo_pil_mss_clk, "fc880000.qcom,mss"), CLK_LOOKUP_OF("xo", cxo_wlan_clk, "fb000000.qcom,wcnss-wlan"), CLK_LOOKUP_OF("rf_clk", cxo_a2, "fb000000.qcom,wcnss-wlan"), + CLK_LOOKUP_OF("nfc_clk", cxo_a2_pin, "6-0028"), + CLK_LOOKUP_OF("felica_clk", cxo_a2_pin, "6-0029"), CLK_LOOKUP_OF("xo", cxo_pil_pronto_clk, "fb21b000.qcom,pronto"), CLK_LOOKUP_OF("xo", cxo_dwc3_clk, "msm_dwc3"), CLK_LOOKUP_OF("xo", cxo_ehci_host_clk, "msm_ehci_host"), diff --git a/arch/arm/mach-msm/include/mach/bcm4339_bt_lpm.h b/arch/arm/mach-msm/include/mach/bcm4339_bt_lpm.h new file mode 100644 index 00000000000..a27672934d3 --- /dev/null +++ b/arch/arm/mach-msm/include/mach/bcm4339_bt_lpm.h @@ -0,0 +1,31 @@ +/* + * Bluetooth Broadcomm and low power control via GPIO + * + * Copyright (C) 2011 Samsung, Inc. + * Copyright (C) 2011 Google, Inc. + * Copyright (C) 2013 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_BCM4339_BT_LPM_H +#define __ASM_ARCH_BCM4339_BT_LPM_H + +#include + +extern void bcm_bt_lpm_exit_lpm_locked(struct uart_port *uport); + +#endif /* __ASM_ARCH_BCM4339_BT_LPM_H */ diff --git a/arch/arm/mach-msm/include/mach/board-nfc.h b/arch/arm/mach-msm/include/mach/board-nfc.h new file mode 100644 index 00000000000..2000a59bc84 --- /dev/null +++ b/arch/arm/mach-msm/include/mach/board-nfc.h @@ -0,0 +1,23 @@ +/* arch/arm/mach-msm/include/mach/board-nfc.h + * + * Copyright (C) 2013 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + */ + +#ifndef __ASM_ARCH_MSM_BOARD_NFC_H +#define __ASM_ARCH_MSM_BOARD_NFC_H + +#include +#include +#include + +int board_nfc_parse_dt(struct device *dev, + struct pn547_i2c_platform_data *pdata); +int board_nfc_hw_lag_check(struct i2c_client *d, + struct pn547_i2c_platform_data *pdata); + +#endif diff --git a/arch/arm/mach-msm/include/mach/board-sony_shinano-wifi.h b/arch/arm/mach-msm/include/mach/board-sony_shinano-wifi.h new file mode 100644 index 00000000000..2d05ab67918 --- /dev/null +++ b/arch/arm/mach-msm/include/mach/board-sony_shinano-wifi.h @@ -0,0 +1,18 @@ +/* arch/arm/mach-msm/board-sony_shinano-wifi.h + * + * Copyright (C) 2013 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + */ + +#ifndef __ARCH_ARM_MACH_MSM_BOARD_SONY_SHINANO_WIFI_H +#define __ARCH_ARM_MACH_MSM_BOARD_SONY_SHINANO_WIFI_H + +extern int shinano_wifi_status_register( + void (*callback)(int card_present, void *dev_id), void *dev_id); +extern unsigned int shinano_wifi_status(struct device *dev); + +#endif diff --git a/arch/arm/mach-msm/krait-regulator-pmic.c b/arch/arm/mach-msm/krait-regulator-pmic.c index cedf4ad37e7..3ecd2049831 100644 --- a/arch/arm/mach-msm/krait-regulator-pmic.c +++ b/arch/arm/mach-msm/krait-regulator-pmic.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2013, The Linux Foundation. All rights reserved. +/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -59,7 +59,8 @@ #define REG_GANG_CTL2 0xC1 #define GANG_EN_BIT BIT(7) -#define REG_PWM_CL 0x60 +#define REG_PWM_CL 0x60 +#define REG_SEC_ACCESS 0xD0 struct krait_vreg_pmic_chip { struct spmi_device *spmi; @@ -106,11 +107,21 @@ static int read_byte(struct spmi_device *spmi, u16 addr, u8 *val) return 0; } -static int write_byte(struct spmi_device *spmi, u16 addr, u8 *val) +static int write_secure_byte(struct spmi_device *spmi, u16 base, + u16 addr, u8 *val) { int rc; + u8 sec_val = 0xA5; - rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, addr, val, 1); + rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, + base + REG_SEC_ACCESS, &sec_val, 1); + if (rc) { + pr_err("SPMI write failed [%d,0x%04x] val = 0x%02x rc=%d\n", + spmi->sid, base + REG_SEC_ACCESS, sec_val, rc); + return rc; + } + rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, + base + addr, val, 1); if (rc) { pr_err("SPMI write failed [%d,0x%04x] val = 0x%02x rc=%d\n", spmi->sid, addr, *val, rc); @@ -144,7 +155,7 @@ static bool v_overshoot_fixed(void) bool krait_pmic_is_ready(void) { if (the_chip == NULL) { - pr_debug("kait_regulator_pmic not ready yet\n"); + pr_debug("krait_regulator_pmic not ready yet\n"); return false; } return true; @@ -166,7 +177,7 @@ int krait_pmic_post_pfm_entry(void) int rc; if (the_chip == NULL) { - pr_debug("kait_regulator_pmic not ready yet\n"); + pr_debug("krait_regulator_pmic not ready yet\n"); return -ENXIO; } @@ -174,8 +185,8 @@ int krait_pmic_post_pfm_entry(void) return 0; setpoint = (I_PFM_MA - IOFFSET_MA) / ISTEP_MA; - rc = write_byte(the_chip->spmi, - the_chip->ps_base + REG_PWM_CL, &setpoint); + rc = write_secure_byte(the_chip->spmi, + the_chip->ps_base, REG_PWM_CL, &setpoint); pr_debug("wrote 0x%02x->[%d 0x%04x] rc = %d\n", setpoint, the_chip->spmi->sid, the_chip->ps_base + REG_PWM_CL, rc); @@ -197,7 +208,7 @@ int krait_pmic_post_pwm_entry(void) int rc; if (the_chip == NULL) { - pr_debug("kait_regulator_pmic not ready yet\n"); + pr_debug("krait_regulator_pmic not ready yet\n"); return -ENXIO; } @@ -207,8 +218,8 @@ int krait_pmic_post_pwm_entry(void) udelay(50); setpoint = (I_PWM_MA - IOFFSET_MA) / ISTEP_MA; - rc = write_byte(the_chip->spmi, - the_chip->ps_base + REG_PWM_CL, &setpoint); + rc = write_secure_byte(the_chip->spmi, + the_chip->ps_base, REG_PWM_CL, &setpoint); pr_debug("wrote 0x%02x->[%d 0x%04x] rc = %d\n", setpoint, the_chip->spmi->sid, the_chip->ps_base + REG_PWM_CL, rc); diff --git a/arch/arm/mach-msm/restart.c b/arch/arm/mach-msm/restart.c index 5751daeaf76..b57704c276f 100644 --- a/arch/arm/mach-msm/restart.c +++ b/arch/arm/mach-msm/restart.c @@ -71,7 +71,7 @@ static void *emergency_dload_mode_addr; /* Download mode master kill-switch */ static int dload_set(const char *val, struct kernel_param *kp); -static int download_mode = 1; +static int download_mode; module_param_call(download_mode, dload_set, param_get_int, &download_mode, 0644); static int panic_prep_restart(struct notifier_block *this, @@ -96,11 +96,6 @@ static void set_dload_mode(int on) } } -static bool get_dload_mode(void) -{ - return dload_mode_enabled; -} - static void enable_emergency_dload_mode(void) { if (emergency_dload_mode_addr) { @@ -221,11 +216,7 @@ static void msm_restart_prepare(const char *cmd) pm8xxx_reset_pwr_off(1); - /* Hard reset the PMIC unless memory contents must be maintained. */ - if (get_dload_mode() || (cmd != NULL && cmd[0] != '\0')) - qpnp_pon_system_pwr_off(PON_POWER_OFF_WARM_RESET); - else - qpnp_pon_system_pwr_off(PON_POWER_OFF_HARD_RESET); + qpnp_pon_system_pwr_off(PON_POWER_OFF_WARM_RESET); if (cmd != NULL) { if (!strncmp(cmd, "bootloader", 10)) { @@ -234,6 +225,8 @@ static void msm_restart_prepare(const char *cmd) __raw_writel(0x77665502, restart_reason); } else if (!strcmp(cmd, "rtc")) { __raw_writel(0x77665503, restart_reason); + } else if (!strncmp(cmd, "s1bootloader", 12)) { + __raw_writel(0x6f656d53, restart_reason); } else if (!strncmp(cmd, "oem-", 4)) { unsigned long code; code = simple_strtoul(cmd + 4, NULL, 16) & 0xff; @@ -264,6 +257,19 @@ void msm_restart(char mode, const char *cmd) printk(KERN_ERR "Restarting has failed\n"); } +static int msm_reboot_call(struct notifier_block *this, + unsigned long code, void *_cmd) +{ + if (code == SYS_DOWN) + disable_nonboot_cpus(); + + return NOTIFY_DONE; +} + +static struct notifier_block msm_reboot_notifier = { + .notifier_call = msm_reboot_call, +}; + static int __init msm_restart_init(void) { struct device_node *np; @@ -299,6 +305,7 @@ static int __init msm_restart_init(void) set_dload_mode(download_mode); #endif + register_reboot_notifier(&msm_reboot_notifier); msm_tmr0_base = msm_timer_get_timer0_base(); np = of_find_compatible_node(NULL, NULL, "qcom,msm-imem-restart_reason"); if (!np) { diff --git a/arch/arm/mach-msm/restart.c.rej b/arch/arm/mach-msm/restart.c.rej new file mode 100644 index 00000000000..80c35f29299 --- /dev/null +++ b/arch/arm/mach-msm/restart.c.rej @@ -0,0 +1,34 @@ +--- arch/arm/mach-msm/restart.c ++++ arch/arm/mach-msm/restart.c +@@ -216,11 +211,7 @@ + + pm8xxx_reset_pwr_off(1); + +- /* Hard reset the PMIC unless memory contents must be maintained. */ +- if (get_dload_mode() || (cmd != NULL && cmd[0] != '\0') || in_panic) +- qpnp_pon_system_pwr_off(PON_POWER_OFF_WARM_RESET); +- else +- qpnp_pon_system_pwr_off(PON_POWER_OFF_HARD_RESET); ++ qpnp_pon_system_pwr_off(PON_POWER_OFF_WARM_RESET); + + if (cmd != NULL) { + if (!strncmp(cmd, "bootloader", 10)) { +@@ -248,11 +241,14 @@ + } else { + __raw_writel(0x77665501, restart_reason); + } +- } else if (in_panic == 1) { +- __raw_writel(0x77665505, restart_reason); +- qpnp_pon_store_extra_reset_info(RESET_EXTRA_PANIC_REASON, 1); + } else { +- __raw_writel(0x77665501, restart_reason); ++ _raw_writel(0x776655AA, restart_reason); ++ if (in_panic == 1) { ++ __raw_writel(0x77665505, restart_reason); ++ qpnp_pon_store_extra_reset_info(RESET_EXTRA_PANIC_REASON, 1); ++ } else { ++ __raw_writel(0x77665501, restart_reason); ++ } + } + + flush_cache_all(); diff --git a/arch/arm/mach-msm/sony_gpiomux.c b/arch/arm/mach-msm/sony_gpiomux.c new file mode 100644 index 00000000000..5b20ca3357b --- /dev/null +++ b/arch/arm/mach-msm/sony_gpiomux.c @@ -0,0 +1,148 @@ +/* arch/arm/mach-msm/sony_gpiomux.c + * + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include "sony_gpiomux.h" + +static struct gpiomux_setting __initdata **merge_set; +static struct gpiomux_setting __initdata **qct_sets; +static struct msm_gpiomux_config __initdata *base_configs; + +void __init overwrite_configs(struct msm_gpiomux_configs *base, + struct msm_gpiomux_configs *specific) +{ + unsigned i, j; + struct msm_gpiomux_config *b_cfg = base->cfg; + struct msm_gpiomux_config *s_cfg = specific->cfg; + + for (i = 0; i < specific->ncfg; i++) { + for (j = 0; j < base->ncfg; j++) { + if (s_cfg[i].gpio == b_cfg[j].gpio) { + b_cfg[j].settings[GPIOMUX_ACTIVE] = + s_cfg[i].settings[GPIOMUX_ACTIVE]; + b_cfg[j].settings[GPIOMUX_SUSPENDED] = + s_cfg[i].settings[GPIOMUX_SUSPENDED]; + } + } + } +} + +static void __init gpiomux_merge_setting(unsigned idx, unsigned which) +{ + struct gpiomux_setting *pset = base_configs[idx].settings[which]; + unsigned set_slot = base_configs[idx].gpio + * GPIOMUX_NSETTINGS + which; + + if (!pset) + return; + + if ((pset->func == GPIOMUX_FOLLOW_QCT) && + (pset->drv == GPIOMUX_FOLLOW_QCT) && + (pset->pull == GPIOMUX_FOLLOW_QCT) && + (pset->dir == GPIOMUX_FOLLOW_QCT)) { + base_configs[idx].settings[which] = qct_sets[set_slot]; + } else if ((pset->func == GPIOMUX_FOLLOW_QCT) || + (pset->drv == GPIOMUX_FOLLOW_QCT) || + (pset->pull == GPIOMUX_FOLLOW_QCT) || + (pset->dir == GPIOMUX_FOLLOW_QCT)) { + if (!qct_sets[set_slot]) { + base_configs[idx].settings[which] = NULL; + return; + } + + merge_set[set_slot] = kzalloc(sizeof(struct gpiomux_setting), + GFP_KERNEL); + if (!merge_set[set_slot]) { + pr_err("%s: GPIO_%d merge failure\n", __func__, + base_configs[idx].gpio); + return; + } + + *merge_set[set_slot] = *pset; + + if (pset->func == GPIOMUX_FOLLOW_QCT) + merge_set[set_slot]->func = qct_sets[set_slot]->func; + if (pset->drv == GPIOMUX_FOLLOW_QCT) + merge_set[set_slot]->drv = qct_sets[set_slot]->drv; + if (pset->pull == GPIOMUX_FOLLOW_QCT) + merge_set[set_slot]->pull = qct_sets[set_slot]->pull; + if (pset->dir == GPIOMUX_FOLLOW_QCT) + merge_set[set_slot]->dir = qct_sets[set_slot]->dir; + + base_configs[idx].settings[which] = merge_set[set_slot]; + } +} + +int __init sony_init_gpiomux(struct msm_gpiomux_config *configs, + unsigned nconfigs) +{ + int rc; + unsigned int ngpio, ngpio_settings, i, c, s; + struct device_node *of_gpio_node; + + rc = msm_gpiomux_init_dt(); + if (rc) { + pr_err("%s failed %d\n", __func__, rc); + return rc; + } + + of_gpio_node = of_find_compatible_node(NULL, NULL, "qcom,msm-gpio"); + if (!of_gpio_node) { + pr_err("%s: Failed to find qcom,msm-gpio node\n", __func__); + return -ENODEV; + } + + rc = of_property_read_u32(of_gpio_node, "ngpio", &ngpio); + if (rc) { + pr_err("%s: Failed to find ngpio property in msm-gpio device " \ + "node %d\n", __func__, rc); + return rc; + } + + ngpio_settings = ngpio * GPIOMUX_NSETTINGS; + + merge_set = kzalloc(sizeof(struct gpiomux_setting *) * ngpio_settings, + GFP_KERNEL); + if (!merge_set) { + pr_err("%s: kzalloc failed for merge config\n", __func__); + return -ENOMEM; + } + + qct_sets = kzalloc(sizeof(struct gpiomux_setting *) * ngpio_settings, + GFP_KERNEL); + if (!qct_sets) { + kfree(merge_set); + pr_err("%s: kzalloc failed for reference config\n", __func__); + return -ENOMEM; + } + + base_configs = configs; + + /* Set reference configuration */ + gpiomux_arrange_all_qct_configs(qct_sets); + + for (c = 0; c < nconfigs; ++c) { + for (s = 0; s < GPIOMUX_NSETTINGS; ++s) + gpiomux_merge_setting(c, s); + } + + /* Install product-all merged configuration */ + msm_gpiomux_install(configs, nconfigs); + + for (i = 0; i < ngpio_settings; ++i) + kfree(merge_set[i]); + + kfree(merge_set); + kfree(qct_sets); + + return 0; +} diff --git a/arch/arm/mach-msm/sony_gpiomux.h b/arch/arm/mach-msm/sony_gpiomux.h new file mode 100644 index 00000000000..4e163747394 --- /dev/null +++ b/arch/arm/mach-msm/sony_gpiomux.h @@ -0,0 +1,25 @@ +/* arch/arm/mach-msm/sony_gpiomux.h + * + * Copyright (C) 2014 Sony Mobile Communications AB. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + */ + +#ifndef __SONY_GPIOMUX_H +#define __SONY_GPIOMUX_H + +#include +#include + +#define GPIOMUX_FOLLOW_QCT INT_MAX + +void __init overwrite_configs(struct msm_gpiomux_configs *base, + struct msm_gpiomux_configs *specific); +void __init gpiomux_arrange_all_qct_configs(struct gpiomux_setting **settings); +int __init sony_init_gpiomux(struct msm_gpiomux_config *configs, + unsigned nconfigs); + +#endif /* __SONY_GPIOMUX_H */ diff --git a/drivers/soc/qcom/watchdog_v2.c b/drivers/soc/qcom/watchdog_v2.c index 3a771283cdc..2d4d0fa1ba8 100644 --- a/drivers/soc/qcom/watchdog_v2.c +++ b/drivers/soc/qcom/watchdog_v2.c @@ -301,6 +301,29 @@ static void pet_watchdog_work(struct work_struct *work) &wdog_dd->dogwork_struct, delay_time); } +static struct device *dev; +static int wdog_init_done; + +void touch_nmi_watchdog(void) +{ + unsigned long long ns; + unsigned long delay_time; + struct msm_watchdog_data *wdog_dd = + (struct msm_watchdog_data *)dev_get_drvdata(dev); + + if (!wdog_dd || !wdog_init_done) + return; + + delay_time = msecs_to_jiffies(wdog_dd->pet_time); + + ns = sched_clock() - wdog_dd->last_pet; + if (nsecs_to_jiffies(ns) > delay_time) + pet_watchdog(wdog_dd); + + touch_softlockup_watchdog(); +} +EXPORT_SYMBOL(touch_nmi_watchdog); + static int msm_watchdog_remove(struct platform_device *pdev) { struct wdog_disable_work_data work_data; @@ -458,6 +481,8 @@ static void init_watchdog_work(struct work_struct *work) dev_err(wdog_dd->dev, "cannot create sysfs attribute\n"); if (wdog_dd->irq_ppi) enable_percpu_irq(wdog_dd->bark_irq, 0); + dev = wdog_dd->dev; + wdog_init_done = 1; dev_info(wdog_dd->dev, "MSM Watchdog Initialized\n"); return; } diff --git a/include/linux/platform_data/msm_serial_hs.h b/include/linux/platform_data/msm_serial_hs.h index cb5d5483e0e..ea064d802dd 100644 --- a/include/linux/platform_data/msm_serial_hs.h +++ b/include/linux/platform_data/msm_serial_hs.h @@ -49,6 +49,7 @@ struct msm_serial_hs_platform_data { unsigned bam_tx_ep_pipe_index; unsigned bam_rx_ep_pipe_index; bool no_suspend_delay; + void (*exit_lpm_cb)(struct uart_port *); }; /* return true when tx is empty */