7575#define  MAX14001_REG_WEN_WRITE_ENABLE 	0x294
7676#define  MAX14001_REG_WEN_WRITE_DISABLE 	0x0
7777
78- enum  max14001_chips  {
78+ enum  max14001_chip_model  {
7979	max14001 ,
8080	max14002 ,
8181};
8282
83+ struct  max14001_chip_info  {
84+ 	const  char  * name ;
85+ 	/* TODO: Add more information */ 
86+ };
87+ 
88+ static  struct  max14001_chip_info  max14001_chip_info_tbl [] =  {
89+ 	[max14001 ] =  {
90+ 		.name  =  "max14001" ,
91+ 	},
92+ 	[max14002 ] =  {
93+ 		.name  =  "max14002" ,
94+ 	},
95+ };
96+ 
8397struct  max14001_state  {
8498	struct  spi_device  * spi ;
99+ 	const  struct  max14001_chip_info  * chip_info ;
85100};
86101
87102static  int  max14001_spi_read (struct  max14001_state  * st , u16  reg , u16  * val )
88103{
89- 	u16  tx  =  0 ;
90- 	u16  rx  =  0 ;
91- 	u16  reversed  =  0 ;
92- 	int  ret  =  0 ;
104+ 	u16  tx , rx , reversed ;
105+ 	int  ret ;
93106
94- 	pr_err ( "[Log Debug] max14001_spi_read : reg: %x, val: %x\n"reg , * val );
107+ 	dev_info ( & st -> spi -> dev ,  "%s : reg: %x, val: %x\n",  __func__ , reg , * val );
95108
96109	tx  |= FIELD_PREP (MAX14001_MASK_ADDR , reg );
97110	tx  |= FIELD_PREP (MAX14001_MASK_WR , MAX14001_REG_READ );
@@ -101,37 +114,34 @@ static int max14001_spi_read(struct max14001_state *st, u16 reg, u16 *val)
101114	if  (ret  <  0 )
102115		return  ret ;
103116
117+ 	/* TODO: Validate this line in the hw, could be le16_to_cpu */ 
104118	reversed  =  bitrev16 (be16_to_cpu (rx ));
105- 	* val  =  MAX14001_MASK_ADDR & reversed ;
119+ 	* val  =  FIELD_GET ( MAX14001_MASK_ADDR ,  reversed ) ;
106120
107121	return  ret ;
108122}
109123
110124static  int  max14001_spi_write (struct  max14001_state  * st , u16  reg , u16  val )
111125{
112- 	u16  tx  =  0 ;
126+ 	struct  spi_transfer  xfer ;
127+ 	int  ret ;
128+ 	u16  tx , reversed ;
113129	u16  msg  =  0 ;
114- 	u16  reversed  =  0 ;
115- 	int  ret  =  0 ;
116- 
117- 	pr_err ("[Log Debug] max14001_spi_write: reg: %x, val: %x\n" , reg , val );
118130
119- 	struct  spi_transfer  xfer  =  {
120- 		.tx_buf  =  NULL ,
121- 		.len  =  0 ,
122- 	};
131+ 	dev_info (& st -> spi -> dev , "%s: reg: %x, val: %x\n" , __func__ , reg , val );
123132
124133	msg  |= FIELD_PREP (MAX14001_MASK_ADDR , reg );
125134	msg  |= FIELD_PREP (MAX14001_MASK_WR , MAX14001_REG_WRITE );
126135	msg  |= FIELD_PREP (MAX14001_MASK_DATA , val );
127136
128137	reversed  =  bitrev16 (msg );
138+ 	/* TODO: Validate this line in the hw, could be put_unaligned_le16 */ 
129139	put_unaligned_be16 (reversed , & tx );
130140
131141	xfer .tx_buf  =  & tx ;
132142	xfer .len  =  sizeof (tx );
133143
134- 	pr_err ( "[Log Debug] max14001_spi_write : msg: %x, tx: %x\n"msg , tx );
144+ 	dev_info ( & st -> spi -> dev ,  "%s : msg: %x, tx: %x\n",  __func__ , msg , tx );
135145
136146	ret  =  spi_sync_transfer (st -> spi , & xfer , 1 );
137147	if  (ret  <  0 )
@@ -140,6 +150,28 @@ static int max14001_spi_write(struct max14001_state *st, u16 reg, u16 val)
140150	return  ret ;
141151}
142152
153+ static  int  max14001_spi_write_single_reg (struct  max14001_state  * st , u16  reg , u16  val )
154+ {
155+ 	int  ret ;
156+ 
157+ 	//Enable register write 
158+ 	ret  =  max14001_spi_write (st , MAX14001_REG_WEN , MAX14001_REG_WEN_WRITE_ENABLE );
159+ 	if  (ret  <  0 )
160+ 		return  ret ;
161+ 
162+ 	//Write data into register 
163+ 	ret  =  max14001_spi_write (st , reg , val );
164+ 	if  (ret  <  0 )
165+ 		return  ret ;
166+ 
167+ 	//Disable register write 
168+ 	ret  =  max14001_spi_write (st , MAX14001_REG_WEN , MAX14001_REG_WEN_WRITE_DISABLE );
169+ 	if  (ret  <  0 )
170+ 		return  ret ;
171+ 
172+ 	return  ret ;
173+ }
174+ 
143175static  int  max14001_read_raw (struct  iio_dev  * indio_dev ,
144176				struct  iio_chan_spec  const  * chan ,
145177				int  * val , int  * val2 , long  mask )
@@ -148,16 +180,17 @@ static int max14001_read_raw(struct iio_dev *indio_dev,
148180
149181	switch  (mask ) {
150182	case  IIO_CHAN_INFO_RAW :
151- 		pr_err ( "[Log Debug] max14001_read_raw : IIO_CHAN_INFO_RAW\n"
183+ 		dev_info ( & st -> spi -> dev ,  "%s : IIO_CHAN_INFO_RAW\n",  __func__ );
152184		return  IIO_VAL_INT ;
153185	case  IIO_CHAN_INFO_SCALE :
154- 		pr_err ( "[Log Debug] max14001_read_raw : IIO_CHAN_INFO_SCALE\n"
186+ 		dev_info ( & st -> spi -> dev ,  "%s : IIO_CHAN_INFO_SCALE\n",  __func__ );
155187		return  IIO_VAL_INT ;
156188	}
157189
158190	return  - EINVAL ;
159191}
160192
193+ /* TODO: Check if this method is nedeed */ 
161194static  int  max14001_write_raw (struct  iio_dev  * indio_dev ,
162195				struct  iio_chan_spec  const  * chan ,
163196				int  val , int  val2 , long  mask )
@@ -166,7 +199,7 @@ static int max14001_write_raw(struct iio_dev *indio_dev,
166199
167200	switch  (mask ) {
168201	case  IIO_CHAN_INFO_RAW :
169- 		pr_err ( "[Log Debug] max14001_write_raw : IIO_CHAN_INFO_RAW\n"
202+ 		dev_info ( & st -> spi -> dev ,  "%s : IIO_CHAN_INFO_RAW\n",  __func__ );
170203		return  0 ;
171204	}
172205
@@ -183,7 +216,6 @@ static const struct iio_chan_spec max14001_channel_voltage[] = {
183216		.type  =  IIO_VOLTAGE ,
184217		.indexed  =  1 ,
185218		.channel  =  0 ,
186- 		.output  =  0 ,
187219		.info_mask_separate  =  BIT (IIO_CHAN_INFO_RAW ) |
188220					  BIT (IIO_CHAN_INFO_SCALE ),
189221	}
@@ -194,32 +226,38 @@ static const struct iio_chan_spec max14001_channel_current[] = {
194226		.type  =  IIO_CURRENT ,
195227		.indexed  =  1 ,
196228		.channel  =  0 ,
197- 		.output  =  0 ,
198229		.info_mask_separate  =  BIT (IIO_CHAN_INFO_RAW ) |
199230					  BIT (IIO_CHAN_INFO_SCALE ),
200231	}
201232};
202233
203234static  int  max14001_probe (struct  spi_device  * spi )
204235{
205- 	pr_err ( "[Log Debug] max14001_probe\n" ) ;
206- 
236+ 	const   struct   max14001_chip_info   * info ;
237+ 	 struct   device   * dev   =   & spi -> dev ; 
207238	struct  max14001_state  * st ;
208239	struct  iio_dev  * indio_dev ;
209240	bool  current_channel  =  false;
210241	int  ret ;
211242
243+ 	info  =  spi_get_device_match_data (spi );
244+ 	if  (!dev )
245+ 		return  dev_err_probe (dev , - ENODEV , "Failed to get match data\n" );
246+ 
212247	indio_dev  =  devm_iio_device_alloc (& spi -> dev , sizeof (* st ));
213248	if  (!indio_dev )
214249		return  - ENOMEM ;
215250
216251	st  =  iio_priv (indio_dev );
217252	st -> spi  =  spi ;
253+ 	st -> chip_info  =  info ;
218254
219- 	indio_dev -> name  =  "max14001" ;  //spi_get_device_id(spi) ->name;
255+ 	indio_dev -> name  =  st -> chip_info -> name ;
220256	indio_dev -> modes  =  INDIO_DIRECT_MODE ;
221257	indio_dev -> info  =  & max14001_info ;
222258
259+ 	dev_info (& st -> spi -> dev , "%s: probe\n" , __func__ );
260+ 
223261	for_each_available_child_of_node_scoped (spi -> dev .of_node , child ) {
224262		current_channel  =  of_property_read_bool (child , "current-channel" );
225263		if  (current_channel )
@@ -234,21 +272,21 @@ static int max14001_probe(struct spi_device *spi)
234272		indio_dev -> num_channels  =  ARRAY_SIZE (max14001_channel_voltage );
235273	}
236274
237- 	//Enable register write 
238- 	max14001_spi_write (st , MAX14001_REG_WEN , MAX14001_REG_WEN_WRITE_ENABLE );
239275	return  devm_iio_device_register (& spi -> dev , indio_dev );
240276}
241277
242278static  const  struct  spi_device_id  max14001_id_table [] =  {
243- 	{ "max14001" , max14001  },
244- 	{ "max14002" , max14002  },
279+ 	{ "max14001" , ( kernel_ulong_t ) & max14001_chip_info_tbl [ max14001 ]  },
280+ 	{ "max14002" , ( kernel_ulong_t ) & max14001_chip_info_tbl [ max14002 ]  },
245281	{}
246282};
247283MODULE_DEVICE_TABLE (spi , max14001_id_table );
248284
249285static  const  struct  of_device_id  max14001_of_match [] =  {
250- 	{ .compatible  =  "adi,max14001"  },
251- 	{ .compatible  =  "adi,max14002"  },
286+ 	{ .compatible  =  "adi,max14001" ,
287+ 	  .data  =  & max14001_chip_info_tbl [max14001 ], },
288+ 	{ .compatible  =  "adi,max14002" ,
289+ 	  .data  =  & max14001_chip_info_tbl [max14002 ], },
252290	{}
253291};
254292MODULE_DEVICE_TABLE (of , max14001_of_match );
@@ -265,4 +303,4 @@ module_spi_driver(max14001_driver);
265303
266304MODULE_AUTHOR (
"Marilene Andrade Garcia <[email protected] >" );
267305MODULE_DESCRIPTION ("Analog Devices MAX14001/MAX14002 ADCs driver" );
268- MODULE_LICENSE ("GPL v2" );
306+ MODULE_LICENSE ("GPL v2" );
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