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arm: dts: Add device tree for ADAQ7769-1 on ZedBoard
Enables using the ADAQ7769-1 device on ZedBoard with FMC connector. Signed-off-by: Jonathan Santos <[email protected]>
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices ADAQ7769-1
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* https://wiki.analog.com/resources/eval/user-guides/ad7768-1
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*
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* hdl_project: <ad77681evb/zed>
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* board_revision: <B>
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*
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* Copyright (C) 2024 Analog Devices Inc.
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*/
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/dts-v1/;
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#include "zynq-zed.dtsi"
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#include "zynq-zed-adv7511.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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vref: regulator-vref {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <4096000>;
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regulator-max-microvolt = <4096000>;
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regulator-always-on;
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};
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clocks {
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ad7768_1_mclk: clock@0 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <16384000>;
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};
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};
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};
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&fpga_axi {
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rx_dma: rx-dmac@0x44a30000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x44a30000 0x1000>;
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#dma-cells = <1>;
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interrupt-parent = <&intc>;
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interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 16>;
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adi,channels {
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#size-cells = <0>;
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#address-cells = <1>;
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dma-channel@0 {
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reg = <0>;
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adi,source-bus-width = <32>;
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adi,source-bus-type = <1>;
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adi,destination-bus-width = <64>;
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adi,destination-bus-type = <0>;
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};
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};
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};
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spi_clock: spieng-axi-clkgen@44a70000 {
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compatible = "adi,axi-clkgen-2.00.a";
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reg = <0x44a70000 0x10000>;
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#clock-cells = <0>;
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clocks = <&clkc 15>, <&clkc 16>;
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clock-names = "s_axi_aclk", "clkin1";
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};
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axi_spi_engine_0: spi@0x44a00000 {
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compatible = "adi-ex,axi-spi-engine-1.00.a";
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reg = <0x44a00000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15 &spi_clock>;
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clock-names = "s_axi_aclk", "spi_clk";
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num-cs = <1>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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adaq7769_1: adc@0 {
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compatible = "adi,adaq7769-1";
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reg = <0>;
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spi-max-frequency = <40000000>;
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spi-cpol;
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spi-cpha;
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vref-supply = <&vref>;
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adi,sync-in-gpios = <&gpio0 92 GPIO_ACTIVE_LOW>;
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adi,aaf-gain = <143>;
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reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
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clocks = <&ad7768_1_mclk>;
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clock-names = "mclk";
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dmas = <&rx_dma 0>;
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dma-names = "rx";
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#io-channel-cells = <1>;
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};
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};
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};

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