projects/fmcomms8: Add VADJ value

Signed-off-by: Elena-Hadarau_adi <[email protected]>

Author: hadarauelena

projects/fmcomms8/README.md

@@ -3,6 +3,7 @@
 - Evaluation board product page: [EVAL-AD-FMCOMMS8-EBZ](https://www.analog.com/eval-ad-fmcomms8-ebz)
 - System documentation: https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms8-ebz/quick-start-guide
 - HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/fmcomms8/index.html
+- Evaluation board VADJ: 1.8V
 
 ## Supported parts
 
@@ -12,4 +13,4 @@
 
 ## Building the project
 
-Please enter the folder for the FPGA carrier you want to use and read the README.md.
+Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/fmcomms8/a10soc/README.md

@@ -1,10 +1,14 @@
+<!-- no_build_example, no_no_os -->
+
 # FMCOMMS8/A10SOC HDL Project
 
+- VADJ with which it was tested in hardware: 1.8V
+
 ## Building the project
 
 ```
 cd projects/fmcomms8/a10soc
 make
 ```
 
-Corresponding device trees: [socfpga_arria10_socdk_fmcomms8.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_fmcomms8.dts)
+Corresponding device tree: [socfpga_arria10_socdk_fmcomms8.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_fmcomms8.dts)

projects/fmcomms8/zcu102/README.md

@@ -1,5 +1,9 @@
+<!-- no_no_os -->
+
 # FMCOMMS8/ZCU102 HDL Project
 
+- VADJ with which it was tested in hardware: 1.8V
+
 ## Building the project
 
 ```
@@ -9,10 +13,30 @@ make
 
 All of the RX/TX link modes can be found in the [ADRV9009 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADRV9009.pdf). We offer support for only a few of them.
 
+If other configurations are desired, then the parameters from the HDL project (see below) need to be changed, as well as the Linux/no-OS project configurations.
+
 The overwritable parameters from the environment:
 
 - [RX/TX/RX_OS]_JESD_M - [RX/TX/RX_OS] number of converters per link
 - [RX/TX/RX_OS]_JESD_L - [RX/TX/RX_OS] number of lanes per link
 - [RX/TX/RX_OS]_JESD_S - [RX/TX/RX_OS] number of samples per converter per frame
 
-Corresponding device tree: [zynqmp-zcu102-rev10-adrv9009-fmcomms8-jesd204-fsm.dts](https://github.com/analogdevicesinc/linux/tree/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009-fmcomms8-jesd204-fsm.dts)
+### Example configurations
+
+#### Default configuration
+
+The following command is equivalent to running `make` only:
+
+```
+make RX_JESD_M=8 \
+RX_JESD_L=4 \
+RX_JESD_S=1 \
+TX_JESD_M=8 \
+TX_JESD_L=8 \
+TX_JESD_S=1 \
+RX_OS_JESD_M=4 \
+RX_OS_JESD_L=4 \
+RX_OS_JESD_S=1
+```
+
+Corresponding device tree: [zynqmp-zcu102-rev10-adrv9009-fmcomms8-jesd204-fsm.dts](https://github.com/analogdevicesinc/linux/tree/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009-fmcomms8-jesd204-fsm.dts)