Updates

Author: dan-zilla

README.md

@@ -1,2 +1,8 @@
 # NI-RRAM-Python
 NI RRAM programming in Python
+
+## Conda environment
+Install: jupyter and pylint
+
+## Pip environment
+Install: hightime, numpy, nitclk, nifgen, nidcpower, nidaqmx

dll/niHSDIO_64.dll

@@ -6,10 +6,13 @@
 import nidcpower
 import nifgen
 import numpy as np
-from ni_hsdio import NIHSDIO
+from nihsdio import NIHSDIO, NIHSDIOException
 
+
+# Warnings become errors
 warnings.filterwarnings("error")
 
+
 def accurate_delay(delay):
     """Function to provide accurate time delay"""
     _ = time.perf_counter() + delay
@@ -38,8 +41,8 @@ def __init__(self, chip, settings="settings.json"):
         # TODO: initialize logger
 
         # Store/initialize parameters
-        self.chip = chip
         self.settings = settings
+        self.settings["chip"] = chip
         self.addr = 0
         self.prof = {"READs": 0, "SETs": 0, "RESETs": 0}
 
@@ -49,21 +52,22 @@ def __init__(self, chip, settings="settings.json"):
         # Initialize NI-DAQmx driver for READ voltage
         self.read_chan = nidaqmx.Task()
         self.read_chan.ai_channels.add_ai_voltage_chan(settings["DAQmx"]["chanMap"]["read_ai"])
-        self.read_chan.timing.cfg_samp_clk_timing(settings["READ"]["read_clk_rate"])
+        read_rate, spc = settings["READ"]["read_rate"], settings["READ"]["n_samples"]
+        self.read_chan.timing.cfg_samp_clk_timing(read_rate, samps_per_chan=spc)
 
         # Initialize NI-DAQmx driver for WL voltages
         self.wl_ext_chans = []
         for chan in settings["DAQmx"]["chanMap"]["wl_ext"]:
             task = nidaqmx.Task()
             task.ao_channels.add_ao_voltage_chan(chan)
-            task.timing.cfg_samp_clk_timing(settings["samp_clk_rate"])
-            task.start()
+            task.timing.cfg_samp_clk_timing(settings["samp_clk_rate"], samps_per_chan=2)
             self.wl_ext_chans.append(task)
 
         # Initialize NI-DCPower driver for BL voltages
         self.bl_ext_chans = []
         for chan in settings["DCPower"]["chans"]:
             sess = nidcpower.Session(settings["DCPower"]["deviceID"], chan)
+            # sess.current_limit = 1 # requires aux power input
             sess.voltage_level = 0
             sess.commit()
             sess.initiate()
@@ -76,7 +80,8 @@ def __init__(self, chip, settings="settings.json"):
         self.sl_ext_chan.initiate()
 
         # Set address to 0
-        self.set_address(0)
+        self.set_addr(0)
+
 
     def read(self):
         """Perform a READ operation. Returns tuple with (res, cond, meas_i, meas_v)"""
@@ -95,7 +100,10 @@ def read(self):
         accurate_delay(self.settings["READ"]["settling_time"])
 
         # Measure
+        self.read_chan.start()
         meas_v = np.mean(self.read_chan.read(self.settings["READ"]["n_samples"]))
+        self.read_chan.wait_until_done()
+        self.read_chan.stop()
         meas_i = meas_v/self.settings["READ"]["shunt_res_value"]
         res = np.abs(self.settings["READ"]["VBL"]/meas_i - self.settings["READ"]["shunt_res_value"])
         cond = 1/res
@@ -112,8 +120,80 @@ def read(self):
         # Return measurement tuple
         return res, cond, meas_i, meas_v
 
-    def set_pulse(self, vwl=None, vbl=None, pw=None):
-        
+    def form_pulse(self, vwl=None, vbl=None, pulse_width=None):
+        """Perform a FORM operation."""
+        # Get parameters
+        vwl = self.settings["FORM"]["VWL"] if vwl is None else vwl
+        vbl = self.settings["FORM"]["VBL"] if vbl is None else vbl
+        pulse_width = self.settings["FORM"]["PW"] if pulse_width is None else pulse_width
+
+        # Operation is equivalent to SET but with different parameters
+        self.set_pulse(vwl, vbl, pulse_width)
+
+    def set_pulse(self, vwl=None, vbl=None, pulse_width=None):
+        """Perform a SET operation."""
+        # Get parameters
+        vwl = self.settings["SET"]["VWL"] if vwl is None else vwl
+        vbl = self.settings["SET"]["VBL"] if vbl is None else vbl
+        pulse_width = self.settings["SET"]["PW"] if pulse_width is None else pulse_width
+
+        # Increment the number of SETs
+        self.prof["SETs"] += 1
+
+        # Address decoder enable
+        self.decoder_enable()
+
+        # Set voltages
+        self.set_vsl(0)
+        self.set_vbl(vbl)
+
+        # Settling time for VBL
+        accurate_delay(self.settings["SET"]["settling_time"])
+
+        # Pulse VWL
+        self.pulse_vwl(vwl, pulse_width)
+
+        # Turn off VBL
+        self.set_vbl(0)
+
+        # Settling time for VBL
+        accurate_delay(self.settings["SET"]["settling_time"])
+
+        # Address decoder disable
+        self.decoder_disable()
+
+    def reset_pulse(self, vwl=None, vsl=None, pulse_width=None):
+        """Perform a RESET operation."""
+        # Get parameters
+        vwl = self.settings["RESET"]["VWL"] if vwl is None else vwl
+        vsl = self.settings["RESET"]["VSL"] if vsl is None else vsl
+        pulse_width = self.settings["RESET"]["PW"] if pulse_width is None else pulse_width
+
+        # Increment the number of SETs
+        self.prof["RESETs"] += 1
+
+        # Address decoder enable
+        self.decoder_enable()
+
+        # Set voltages
+        self.set_vbl(0)
+        self.set_vsl(vsl)
+
+        # Settling time for VSL
+        accurate_delay(self.settings["RESET"]["settling_time"])
+
+        # Pulse VWL
+        self.pulse_vwl(vwl, pulse_width)
+
+        # Turn off VSL
+        self.set_vsl(0)
+
+        # Settling time for VSL
+        accurate_delay(self.settings["RESET"]["settling_time"])
+
+        # Address decoder disable
+        self.decoder_disable()
+
 
     def set_vsl(self, voltage):
         """Set VSL using NI-FGen driver"""
@@ -128,10 +208,12 @@ def set_vbl(self, voltage):
         inactive_bl = self.bl_ext_chans[1-active_bl_chan]
 
         # Set voltages and commit
-        active_bl.voltage_level = voltage
-        active_bl.commit()
         inactive_bl.voltage_level = 0
         inactive_bl.commit()
+        active_bl.voltage_level = voltage
+        active_bl.commit()
+        inactive_bl.wait_for_event(nidcpower.Event.SOURCE_COMPLETE)
+        active_bl.wait_for_event(nidcpower.Event.SOURCE_COMPLETE)
 
     def set_vwl(self, voltage):
         """Set (active) VWL using NI-DAQmx driver (inactive disabled)"""
@@ -141,21 +223,35 @@ def set_vwl(self, voltage):
         active_wl = self.wl_ext_chans[active_wl_dev]
         inactive_wl = self.wl_ext_chans[1-active_wl_dev]
 
-        # Write
-        active_wl.write([(1-active_wl_chan)*voltage, active_wl_chan*voltage], auto_start=True)
-        inactive_wl.write([0,0], auto_start=True)
+        # Write voltage to hold
+        signal = [[(1-active_wl_chan)*voltage]*2, [active_wl_chan*voltage]*2]
+        inactive_wl.write([[0,0],[0,0]], auto_start=True)
+        inactive_wl.wait_until_done()
+        inactive_wl.stop()
+        active_wl.write(signal, auto_start=True)
+        active_wl.wait_until_done()
+        active_wl.stop()
+
 
-    def pulse_vwl(self, voltage, pw):
+    def pulse_vwl(self, voltage, pulse_width):
         """Pulse (active) VWL using NI-DAQmx driver (inactive disabled)"""
         # Select 8th and 9th bit to get the channel and the driver card, respectively
         active_wl_chan = (self.addr >> 8) & 0b1
         active_wl_dev = (self.addr >> 9) & 0b1
         active_wl = self.wl_ext_chans[active_wl_dev]
         inactive_wl = self.wl_ext_chans[1-active_wl_dev]
 
-        # Write
-        active_wl.write([(1-active_wl_chan)*voltage, active_wl_chan*voltage], auto_start=True)
-        inactive_wl.write([0,0], auto_start=True)
+        # Configure pulse width
+        active_wl.timing.cfg_samp_clk_timing(1/pulse_width, samps_per_chan=2)
+
+        # Write pulse
+        signal = [[(1-active_wl_chan)*voltage, 0], [active_wl_chan*voltage, 0]]
+        inactive_wl.write([[0,0],[0,0]], auto_start=True)
+        inactive_wl.wait_until_done()
+        inactive_wl.stop()
+        active_wl.write(signal, auto_start=True)
+        active_wl.wait_until_done()
+        active_wl.stop()
 
     def decoder_enable(self):
         """Enable decoding circuitry using digital signals"""
@@ -169,7 +265,7 @@ def decoder_disable(self):
         self.hsdio.write_data_across_chans("sl_dec_en", 0b0)
         self.hsdio.write_data_across_chans("wl_clk", 0b0)
 
-    def set_address(self, addr):
+    def set_addr(self, addr):
         """Set the address and hold briefly"""
         # Update address
         self.addr = addr
@@ -211,10 +307,13 @@ def close(self):
         # Give some time to shutdown
         time.sleep(1)
 
+    def __del__(self):
+        # Try to close session on deletion
+        try:
+            self.close()
+        except NIHSDIOException:
+            pass
+
 if __name__=="__main__":
     # Basic test
     nirram = NIRRAM("Chip9")
-    for address in range(2000):
-        nirram.set_address(address)
-        if address % 100 == 0:
-            print((address, nirram.read()),)

ni_rram.py

@@ -26,7 +26,7 @@ def __init__(self, deviceID, chanMap=None, channelList="", logicFamily=NIHSDIO_V
         self.chan_map = chanMap if chanMap is not None else {}
 
         # Create driver and VI session
-        self.driver = CDLL("lib/niHSDIO_64.dll")
+        self.driver = CDLL("dll/niHSDIO_64.dll")
         self.sess = c_uint(0)
 
         # Initialize generation session

ni_hsdio.py renamed to nihsdio.py

@@ -0,0 +1,4 @@
+nidaqmx
+nifgen
+nidcpower
+numpy

requirements.txt

@@ -28,21 +28,36 @@
     },
 
     "READ": {
-        "read_clk_rate": 500000,
-        "n_samples": 100,
+        "read_rate": 1000000,
+        "n_samples": 1000,
         "shunt_res_value": 560,
         "VWL": 2.5,
         "VBL": 0.2,
-        "settling_time": 1.5e-3
+        "settling_time": 2e-3
     },
 
     "SET": {
-        "VWL": 2.5,
-        "VBL": 2.5,
-        "settling_time": 1.5e-3
+        "VWL": 1.8,
+        "VBL": 3,
+        "PW": 10e-6,
+        "settling_time": 1e-3
+    },
+
+    "FORM": {
+        "VWL": 1.4,
+        "VBL": 3,
+        "PW": 10e-6,
+        "settling_time": 1e-3
+    },
+
+    "RESET": {
+        "VWL": 3,
+        "VSL": 3,
+        "PW": 40e-6,
+        "settling_time": 1e-3
     },
 
-    "addr_hold_time": 5e-4,
+    "addr_hold_time": 1e-3,
     "samp_clk_rate": 1000000,
 
     "log_file": "TODO"

settings.json

@@ -0,0 +1,7 @@
+from ni_rram import NIRRAM
+from time import sleep
+nisys = NIRRAM("Chip_9")
+nisys.set_addr(348)
+print(nisys.read())
+nisys.set_pulse()
+print(nisys.read())