From 6c91a35e9d803d23cb58dcc8b1538253e543ee70 Mon Sep 17 00:00:00 2001
From: Tudor Andrei Dicu <69104075+tact1m4n3@users.noreply.github.com>
Date: Thu, 23 Jan 2025 19:24:14 +0200
Subject: [PATCH] rp2xxx: enable all riscv features (#358)

---
 port/raspberrypi/rp2xxx/build.zig                 | 7 +++----
 port/raspberrypi/rp2xxx/src/hal/clocks/common.zig | 4 ----
 port/raspberrypi/rp2xxx/src/hal/image_def.zig     | 2 +-
 3 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/port/raspberrypi/rp2xxx/build.zig b/port/raspberrypi/rp2xxx/build.zig
index 402e2728..936a6100 100644
--- a/port/raspberrypi/rp2xxx/build.zig
+++ b/port/raspberrypi/rp2xxx/build.zig
@@ -82,16 +82,15 @@ pub fn init(dep: *std.Build.Dependency) Self {
             .cpu = std.Target.Query{
                 .cpu_arch = .riscv32,
                 .cpu_model = .{ .explicit = &std.Target.riscv.cpu.generic_rv32 },
-                // the commented ones are in the datasheet but for some reason they break the code
                 .cpu_features_add = std.Target.riscv.featureSet(&.{
-                    // std.Target.riscv.Feature.c,
                     std.Target.riscv.Feature.a,
                     std.Target.riscv.Feature.m,
+                    std.Target.riscv.Feature.c,
                     std.Target.riscv.Feature.zba,
                     std.Target.riscv.Feature.zbb,
                     std.Target.riscv.Feature.zbs,
-                    // std.Target.riscv.Feature.zcb,
-                    // std.Target.riscv.Feature.zcmp,
+                    std.Target.riscv.Feature.zcb,
+                    std.Target.riscv.Feature.zcmp,
                     std.Target.riscv.Feature.zbkb,
                     std.Target.riscv.Feature.zifencei,
                 }),
diff --git a/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig b/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig
index 81b66590..8a217e7d 100644
--- a/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/clocks/common.zig
@@ -256,13 +256,9 @@ fn busy_wait_at_least(delay_cycles: u32) void {
             \\bcs 1b
             ,
             .riscv =>
-            \\.option push
-            \\.option norvc
-            \\.p2align 2
             \\1:
             \\addi %[cycles], %[cycles], -2
             \\bgez %[cycles], 1b
-            \\.option pop
             ,
         }
         : [cycles] "+r" (_cycles),
diff --git a/port/raspberrypi/rp2xxx/src/hal/image_def.zig b/port/raspberrypi/rp2xxx/src/hal/image_def.zig
index edb7a933..5538b3d0 100644
--- a/port/raspberrypi/rp2xxx/src/hal/image_def.zig
+++ b/port/raspberrypi/rp2xxx/src/hal/image_def.zig
@@ -13,7 +13,7 @@ const Cpu = enum(u3) {
     riscv = 1,
 };
 
-const security: Security = if (@hasDecl(app, "image_def_security")) app.image_def_security else .non_secure;
+const security: Security = if (@hasDecl(app, "image_def_security")) app.image_def_security else .secure;
 const cpu: Cpu = std.meta.stringToEnum(Cpu, @tagName(arch)).?;
 
 const image_def = init();