'sta' command with standard cell (liberty) mapping

[tcal-x]

Hello,
Inspired by the other discussion on sta, I tried it with a design mapped to standard cells. At the end of my Yosys script, after mapping is complete and it has written out the mapped Verilog, I added:

read_liberty -lib -ignore_miss_func sky130_fd_sc_hd__ff_100C_1v95.lib
sta

but I get

13. Executing Liberty frontend.
Imported 428 cell types from liberty file.

14. Executing STA pass (static timing analysis).
ERROR: Module `sky130_fd_sc_hd__clkinv_1' is used with parameters but is not parametric!

which is puzzling since the instantiation in the netlist has no parameters,

  sky130_fd_sc_hd__clkinv_1 _35_ (
    .A(rst),
    .Y(_09_)
  );

and if I edit the netlist to remove the instance, then another instance is flagged with the same message.

If sta simply hasn't been updated to work with a Liberty library, that's understandable. I think it'd be a useful (and straightforward?) enhancement.

[Ravenslofty]

It's not so much that sta "hasn't" been updated to work with a Liberty library, it's that it "can't", at least not easily.

The sta timing model is simplistic - a fixed delay from input to output - based on Verilog specify blocks. This is a reasonably good (if not perfect) approximation from a synthesis point of view on FPGAs.

ASIC timing models are very different; one needs to calculate delay based on resistance and capacitance networks, and Liberty files themselves will provide this information as large multi-dimensional lookup tables that plot e.g. output slew rate against input capacitance.

Would it be possible to add a timing model into Yosys that could calculate all this information? Yeah, probably, but I think it would be easier to write a whole new pass than try to adapt sta for this.

[tcal-x]

Thanks for the reply @Ravenslofty! I was naively thinking that the Liberty file just had a fixed delay for each stdcell, so doing a topological traversal to calculate the ASAP time for each cell would be straightforward (since you were already parsing the Liberty file!). But now I realize that the timing model is much more involved than that. And yes, I'm using opensta now.