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| 1 | + |
| 2 | +/******************************************************************* |
| 3 | +* |
| 4 | +* CAUTION: This file is automatically generated by HSI. |
| 5 | +* Version: |
| 6 | +* DO NOT EDIT. |
| 7 | +* |
| 8 | +* Copyright (C) 2010-2020 Xilinx, Inc. All Rights Reserved. |
| 9 | +* SPDX-License-Identifier: MIT |
| 10 | +* |
| 11 | +* Description: Driver configuration |
| 12 | +* |
| 13 | +*******************************************************************/ |
| 14 | + |
| 15 | +#include "xparameters.h" |
| 16 | +#include "xiomodule.h" |
| 17 | + |
| 18 | + |
| 19 | + |
| 20 | +/* |
| 21 | +* The configuration table for devices |
| 22 | +*/ |
| 23 | + |
| 24 | +XIOModule_Config XIOModule_ConfigTable[] = |
| 25 | +{ |
| 26 | + { |
| 27 | + XPAR_PSV_PSM_IOMODULE_0_DEVICE_ID, |
| 28 | + XPAR_PSV_PSM_IOMODULE_0_BASEADDR, |
| 29 | + XPAR_PSV_PSM_IOMODULE_0_IO_BASEADDR, |
| 30 | + XPAR_PSV_PSM_IOMODULE_0_INTC_HAS_FAST, |
| 31 | + XPAR_PSV_PSM_IOMODULE_0_INTC_BASE_VECTORS, |
| 32 | + XPAR_PSV_PSM_IOMODULE_0_INTC_ADDR_WIDTH , |
| 33 | + ((XPAR_PSV_PSM_IOMODULE_0_INTC_LEVEL_EDGE << 16) | 0x7FF), |
| 34 | + XIN_SVC_SGL_ISR_OPTION, |
| 35 | + XPAR_PSV_PSM_IOMODULE_0_FREQ, |
| 36 | + XPAR_PSV_PSM_IOMODULE_0_UART_BAUDRATE, |
| 37 | + { |
| 38 | + XPAR_PSV_PSM_IOMODULE_0_USE_PIT1, |
| 39 | + XPAR_PSV_PSM_IOMODULE_0_USE_PIT2, |
| 40 | + XPAR_PSV_PSM_IOMODULE_0_USE_PIT3, |
| 41 | + XPAR_PSV_PSM_IOMODULE_0_USE_PIT4, |
| 42 | + }, |
| 43 | + { |
| 44 | + XPAR_PSV_PSM_IOMODULE_0_PIT1_SIZE, |
| 45 | + XPAR_PSV_PSM_IOMODULE_0_PIT2_SIZE, |
| 46 | + XPAR_PSV_PSM_IOMODULE_0_PIT3_SIZE, |
| 47 | + XPAR_PSV_PSM_IOMODULE_0_PIT4_SIZE, |
| 48 | + }, |
| 49 | + { |
| 50 | + XPAR_PSV_PSM_IOMODULE_0_PIT1_EXPIRED_MASK, |
| 51 | + XPAR_PSV_PSM_IOMODULE_0_PIT2_EXPIRED_MASK, |
| 52 | + XPAR_PSV_PSM_IOMODULE_0_PIT3_EXPIRED_MASK, |
| 53 | + XPAR_PSV_PSM_IOMODULE_0_PIT4_EXPIRED_MASK, |
| 54 | + }, |
| 55 | + { |
| 56 | + XPAR_PSV_PSM_IOMODULE_0_PIT1_PRESCALER, |
| 57 | + XPAR_PSV_PSM_IOMODULE_0_PIT2_PRESCALER, |
| 58 | + XPAR_PSV_PSM_IOMODULE_0_PIT3_PRESCALER, |
| 59 | + XPAR_PSV_PSM_IOMODULE_0_PIT4_PRESCALER, |
| 60 | + }, |
| 61 | + { |
| 62 | + XPAR_PSV_PSM_IOMODULE_0_PIT1_READABLE, |
| 63 | + XPAR_PSV_PSM_IOMODULE_0_PIT2_READABLE, |
| 64 | + XPAR_PSV_PSM_IOMODULE_0_PIT3_READABLE, |
| 65 | + XPAR_PSV_PSM_IOMODULE_0_PIT4_READABLE, |
| 66 | + }, |
| 67 | + { |
| 68 | + XPAR_PSV_PSM_IOMODULE_0_GPO1_INIT, |
| 69 | + XPAR_PSV_PSM_IOMODULE_0_GPO2_INIT, |
| 70 | + XPAR_PSV_PSM_IOMODULE_0_GPO3_INIT, |
| 71 | + XPAR_PSV_PSM_IOMODULE_0_GPO4_INIT, |
| 72 | + }, |
| 73 | + { |
| 74 | + } |
| 75 | + |
| 76 | + } |
| 77 | +}; |
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