UUID Validation and Timing Violation Issues with Vivado 2023.2.1

[Max-Huang14]

Description:

I encountered two separate issues while using the repository with Vivado 2023.2.1 and a trial ML Enterprise license:

1. UUID Validation Error:
   During the build process, the partition_metadata_gen_script.py script raises a ValueError due to a mismatch between the provided UUID and the UUID in the PDI.

2. Timing Violation with Pre-Built Platforms:
   Attempting to build the design with the pre-built platforms results in a timing violation (hold violation) during the bitstream generation phase, causing the build to fail.

Issue 1: UUID Validation Error

Steps to Reproduce:

1. Clone the repository emb_plus_vitis_platforms.
   *Use Vivado 2023.2.1 with a trial ML Enterprise license.
2. Run the following command:

cd emb_plus_vitis_platforms/emb_plus_ve2302/
make platform PFM=ve2302_pcie_qdma

3. Observe the error:

Attention! 00000000000000000000000079DB078F != 0000000000000000000000000257cf57
Traceback (most recent call last):
  File "/home/max/workspace/Edge+/emb_plus_vitis_platforms/emb_plus_ve2302/platforms/vivado/ve2302_pcie_qdma/scripts/partition_metadata_gen_script.py", line 549, in <module>
    raise ValueError("Validation UUID and PDI UUID do not match!")
ValueError: Validation UUID and PDI UUID do not match!

Expected Behavior:

The UUID validation should succeed, or there should be clearer instructions for setting up or generating the correct UUID for the PDI.

Issue 2: Timing Violation with Pre-Built Platforms

Steps to Reproduce:

1. Clone the repository emb_plus_vitis_platforms.
   *Use Vivado 2023.2.1 with a trial ML Enterprise license.
2. Follow README and run command:

tar -xf xilinx_ve2302_pcie_qdma_<*>.tar.gz
cp xilinx_ve2302_pcie_qdma_202320_1/ emb_plus_vitis_platforms/emb_plus_ve2302/platforms/ -rf
cd emb_plus_vitis_platforms/emb_plus_ve2302/
make platform PFM=ve2302_pcie_qdma overlay OVERLAY=filter2d_pl

3. Observe the following error during bitstream generation:

[15:45:17] Starting bitstream generation..
[15:45:17] Phase 13 Post-Route Event Processing
[15:46:07] Run vpl: Step impl: Failed
[15:46:07] Run vpl: FINISHED. Run Status: impl ERROR

===>The following messages were generated while  Compiling (bitstream) accelerator binary: filter2d_pl Log file: /home/max/workspace/Edge+/emb_plus_vitis_platforms/emb_plus_ve2302/overlays/examples/filter2d_pl/_x/link/vivado/vpl/prj/prj.runs/impl_1/runme.log  :
ERROR: [VPL 101-2] design did not meet timing - hold violation
ERROR: [VPL 101-3] sourcing script /home/max/workspace/Edge+/emb_plus_vitis_platforms/emb_plus_ve2302/overlays/examples/filter2d_pl/_x/link/vivado/vpl/scripts/impl_1/_full_write_device_image_pre.tcl failed

Expected Behavior:

The design should meet timing requirements and successfully complete the build process.

Environment:

• Vivado version: 2023.2.1 / 2023.2.2
• License: Trial ML Enterprise
• Operating System: [Ubuntu 20.04]

Additional Notes:

• For the UUID validation issue, I have tried changing the UUID in the Makefile, but it does not affect the UUID of the output PDI. It is unclear whether the mismatch is due to a problem in the PDI generation, script configuration, or something else.
• For the timing violation issue, I used the provided pre-built platforms and followed the documented build steps. I also tried changing the defaultFreqHz=299996999 in kernel.cfg in filter2d_pl to 30000000 (30Mhz), but I still got the same result. Any suggestions or fixes for meeting timing constraints would be greatly appreciated.

[jue-s]

Thanks for the detailed reporting.

For the UUID issue, please refer to https://gitenterprise.xilinx.com/emb-plus/emb_plus_vitis_platforms#uuid-information
for timing issue, please use 2023.2, not 2023.2.1 or 2023.2.2. only 2023.2 is supported.

[Max-Huang14]

Thank you for the detailed response.

We attempted to use Vivado 2023.2 as recommended. However, when using the free trial enterprise license, we encountered licensing issues during the build process—both for building the platform and when attempting to use the pre-built platform to build overlays.

The error encountered when building platform:

INFO: [Common 17-1381] The checkpoint '/home/max/workspace/Edge+/emb_plus_vitis_platforms/emb_plus_ve2302/platforms/vivado/ve2302_pcie_qdma/project/ve2302_pcie_qdma.runs/impl_1/ve2302_pcie_qdma_wrapper_routed_bb.dcp' has been generated.
write_checkpoint: Time (s): cpu = 00:00:31 ; elapsed = 00:00:15 . Memory (MB): peak = 7686.805 ; gain = 0.000 ; free physical = 17127 ; free virtual = 131137
ERROR: [Common 17-69] Command failed: Your license for device 'xcve2302' is setup for evaluation or trial purposes only. Device image creation is disabled for this license. Please run the Vivado License Manager for assistance in determining which features and devices are licensed for your system.


INFO: [Common 17-206] Exiting Vivado at Wed Dec  4 19:26:56 2024...
[Wed Dec  4 19:27:01 2024] impl_1 finished
ERROR: [Vivado 12-13638] Failed runs(s) : 'impl_1'
wait_on_runs: Time (s): cpu = 00:34:57 ; elapsed = 00:30:45 . Memory (MB): peak = 5497.535 ; gain = 0.000 ; free physical = 22724 ; free virtual = 136722
ERROR: [Common 17-39] 'wait_on_runs' failed due to earlier errors.

    while executing
"wait_on_run impl_1"
    (file "scripts/main.tcl" line 115)
INFO: [Common 17-206] Exiting Vivado at Wed Dec  4 19:27:01 2024...
make[2]: *** [Makefile:56: project/ve2302_pcie_qdma.xsa] Error 1

The error encountered when building overlay filter2d_pl with pre-built platform:

===>The following messages were generated while  Compiling (bitstream) accelerator binary: filter2d_pl Log file: /home/max/workspace/Edge+/emb_plus_vitis_platforms/emb_plus_ve2302/overlays/examples/filter2d_pl/_x/link/vivado/vpl/prj/prj.runs/impl_1/runme.log  :
ERROR: [VPL 17-69] Command failed: Your license for device 'xcve2302' is setup for evaluation or trial purposes only. Device image creation is disabled for this license. Please run the Vivado License Manager for assistance in determining which features and devices are licensed for your system.

---

Is there any way to work around this issue using a trial license, or are there additional steps we need to follow to make the build process work for this configuration?

Looking forward to your guidance.

[jue-s]

hi, Versal devices are only supported with the licenses version of Vivado. You can see this list here: https://docs.amd.com/r/2024.2-English/ug973-vivado-release-notes-install-license/Supported-Devices

may I ask which company you are working with? You will need to check in with your FAE to adjust your license.

[Max-Huang14]

Thank you for your reply, and apologies for the delayed response. We have made some attempts to solve the issue of UUID and license.

1. Regarding the VE2302 Early Access License:

We have reached out to the FAE to purchase a license for the Vivado Enterprise version. However, they mentioned that we would still need the VE2302 Early Access license. Could you confirm if this is correct?

2. UUID Mismatch Issue:

While we wait for the license, or if we later need to use a higher version (like 2024.2) of Vivado, the UUID mismatch issue may still occur. Is there any recommended solution or workaround for ensuring UUID consistency across processes?

Upgrading Firmware and BIN File Generation:

If upgrading the firmware is a viable solution, and according to the original manufacturer's instructions, completing the process requires both PDI and BIN files. . However, while we can use higher Vivado to build platform and generate the PDI file, we are uncertain about how to obtain the required BIN file. Could you provide guidance or point us to documentation on generating BIN files for the

Thank you for your assistance.

[jue-s]

hi @Max-Huang14
for #1 - I am afraid that the FAE probably knows more than I do on licensing requirements, i would defer to their information. (I am blissfully on internal tool branches
for #2 - you will need to generate the platform, and then generate the overlay against that platform - as indicated in https://gitenterprise.xilinx.com/emb-plus/emb_plus_vitis_platforms#generating-platform-and-overlay-from-source . Then i would expect the UUID to match
for #3 - usually there's a doc i can link you to, but google is being weird today and i cant seem to find that content. but you would use bootgen (included in vivado/vitis installation) with a .bif file, which takes a few artifacts including PDI file to generate a boot.bin. bootgen info:
https://docs.amd.com/r/en-US/ug1283-bootgen-user-guide

here's an example bit file i used to generate my boot.bin for emb+:
all:
{
image
{
{ type = bootimage, file = ve2302_pcie_qdma_base.pdi }
}
image
{
name=default_subsys, id=0x1c000000
{ load = 0x1000, file = system.dtb }
{ core = a72-0, exception_level = el-3, trustzone, file = bl31.elf }
{ core = a72-0, exception_level = el-2, load=0x8000000, file = u-boot-emb-plus-ve2302-2024.01-xilinx-v2024.2+git-r0.elf }
}
}

system.dtb was generated from the vivado .xsa file, using https://xilinx.github.io/kria-apps-docs/creating_applications/2022.1/build/html/docs/dtsi_dtbo_generation.html#generate-dtsi-from-xsa-using-dtg method. you will need to modify a few of the device tree nodes as Vivado project doesnt know everything. or you can just use existing device trees for emb+

i think the bl31.elf is just a generic one for versal, u-boot is generated out of yocto for emb+

[910560]

@jue-s

Hi, I am working on Edge+ from the scratch.

After building the xsa from the emb_plus_vitis_platforms, would like to know more in details about how to generate the ospi image.
Can u elaborate more on the steps how you make the ospi image?

Thanks

[jue-s]

I havent tried this myself, but i think you can build the images in yocto

MACHINE= emb-plus-ve2302 bitbake xilinx-bootbin

the layer can be found here:
https://github.com/Xilinx/meta-embedded-plus
i see 2023.2 and 2024.2 release

if you havent used yocto before, this has the steps to get yocto setup: https://xilinx.github.io/kria-apps-docs/yocto/build/html/docs/yocto_kria_support.html#build-host-requirements

[910560]

@jue-s

Hi, thanks for your hints and I was able to compile and flash the bin into the embedded+ platform with xbutil able to detect

however, the xbutil complains "Platform path not availabe" when i tried to validate the platform with newly generated verify.xclbin

any idea what platform path is the referring to? and where i can provide that to the xbutil to run

Thanks

[Max-Huang14]

Hi @910560 ,

Thank you for sharing your experience and insights. I was wondering if the image you generated was based on a custom platform? If so, could you kindly share how you achieved this?

In my case, I generated custom platforms by forcibly upgrading the tools in this repository to version 2024.2. However, I encountered issues where images created from these custom platforms fail to boot, while those generated from the default platform work without any problems.

Any advice or tips on resolving this would be greatly appreciated!

Thank you

[910560]

@Max-Huang14

Hi, we tackle the problem in different approach.
I keep everything in 2023.2 and start from there while u try to upgrade to 2024.2

[jue-s]

@Max-Huang14 - thanks for the update. that sounds like a good way to go as this was the reply from our engineer:
It is probably a UUID mismatch issue, though I don’t know how he got past that in the hardware platform phase.