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Squashed 'sparse' changes from 79b3894..ab20487 (#943)
ab20487 Merge pull request #138 from yuanqian/search_path 1358fa4 update search_path 5780908 Merge pull request #137 from liyuanz/next 07d754b update 2203846 Merge pull request #136 from liyuanz/next f20edae update Co-authored-by: sdausr <[email protected]>
1 parent f058c6e commit 38939d4

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17 files changed

+118
-31
lines changed

17 files changed

+118
-31
lines changed

‎sparse/L1/meta/api.json

+14-7
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,8 @@
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"cscmv.hpp"
1515
],
1616
"search_paths": [
17-
"L1/include/hw/xf_sparse"
17+
"L1/include/hw/xf_sparse",
18+
"../blas/L1/include/hw"
1819
],
1920
"instance": "function",
2021
"parameters": [
@@ -87,7 +88,8 @@
8788
"cscmv.hpp"
8889
],
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"search_paths": [
90-
"L1/include/hw/xf_sparse"
91+
"L1/include/hw/xf_sparse",
92+
"../blas/L1/include/hw"
9193
],
9294
"instance": "function",
9395
"parameters": [
@@ -165,7 +167,8 @@
165167
"cscmv.hpp"
166168
],
167169
"search_paths": [
168-
"L1/include/hw/xf_sparse"
170+
"L1/include/hw/xf_sparse",
171+
"../blas/L1/include/hw"
169172
],
170173
"instance": "function",
171174
"parameters": [
@@ -228,7 +231,8 @@
228231
"cscmv.hpp"
229232
],
230233
"search_paths": [
231-
"L1/include/hw/xf_sparse"
234+
"L1/include/hw/xf_sparse",
235+
"../blas/L1/include/hw"
232236
],
233237
"instance": "function",
234238
"parameters": [
@@ -316,7 +320,8 @@
316320
"moverL1.hpp"
317321
],
318322
"search_paths": [
319-
"L1/include/hw/xf_sparse"
323+
"L1/include/hw/xf_sparse",
324+
"../blas/L1/include/hw"
320325
],
321326
"instance": "function",
322327
"parameters": [
@@ -384,7 +389,8 @@
384389
"moverL1.hpp"
385390
],
386391
"search_paths": [
387-
"L1/include/hw/xf_sparse"
392+
"L1/include/hw/xf_sparse",
393+
"../blas/L1/include/hw"
388394
],
389395
"instance": "function",
390396
"parameters": [
@@ -442,7 +448,8 @@
442448
"moverL1.hpp"
443449
],
444450
"search_paths": [
445-
"L1/include/hw/xf_sparse"
451+
"L1/include/hw/xf_sparse",
452+
"../blas/L1/include/hw"
446453
],
447454
"instance": "function",
448455
"parameters": [

‎sparse/L1/tests/hw/cscRow/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/cscRow/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "cscRow_test.prj"
2027
set SOLN "sol"

‎sparse/L1/tests/hw/dispCol/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/dispCol/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "dispCol_test.prj"
2027
set SOLN "sol"

‎sparse/L1/tests/hw/dispColVec/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/dispColVec/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "dispColVec_test.prj"
2027
set SOLN "sol"

‎sparse/L1/tests/hw/dispNnzCol/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/dispNnzCol/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "dispNnzCol_test.prj"
2027
set SOLN "sol"

‎sparse/L1/tests/hw/rowAcc/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/rowAcc/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "rowAcc_test.prj"
2027
set SOLN "sol"

‎sparse/L1/tests/hw/rowAgg/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/rowAgg/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "rowAgg_test.prj"
2027
set SOLN "sol"

‎sparse/L1/tests/hw/xBarCol/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/xBarCol/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "xBarCol_test.prj"
2027
set SOLN "sol"

‎sparse/L1/tests/hw/xBarRow/Makefile

+5-2
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,8 @@ export CUR_DIR := $(patsubst %/,%,$(dir $(MK_PATH)))
4747
export XF_PROJ_ROOT ?= $(shell bash -c 'export MK_PATH=$(MK_PATH); echo $${MK_PATH%/L1/*}')
4848

4949
# setting default value
50-
PLATFORM ?= xilinx_u200_gen3x16_xdma_2_202110_1
50+
PLATFORM ?= xilinx_u280_gen3x16_xdma_1_202211_1
51+
5152
export PATH := $(XILINX_VIVADO)/bin:$(PATH)
5253
WORK_DIR ?= hls
5354
TARGET ?= csim
@@ -165,8 +166,10 @@ with open('$(CONFIG_FILE)', 'w') as f:
165166
endef
166167
export CONFIG_GEN_PY
167168

169+
VITIS_PYTHON3 = LD_LIBRARY_PATH=$(XILINX_VITIS)/tps/lnx64/python-3.8.3/lib $(XILINX_VITIS)/tps/lnx64/python-3.8.3/bin/python3
170+
168171
$(CONFIG_FILE): $(CONFIG_TMPL)
169-
@echo "$${CONFIG_GEN_PY}" | python3
172+
@echo "$${CONFIG_GEN_PY}" | (${VITIS_PYTHON3})
170173

171174
all: check_vivado check_part $(CONFIG_FILE)
172175
ifneq ($(TARGET_REL), csim)

‎sparse/L1/tests/hw/xBarRow/run_hls.tcl

+8-1
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,14 @@
1414
# limitations under the License.
1515
# vitis hls makefile-generator v2.0.0
1616

17-
source settings.tcl
17+
set CSIM 1
18+
set CSYNTH 1
19+
set COSIM 1
20+
set VIVADO_SYN 1
21+
set VIVADO_IMPL 1
22+
set CUR_DIR [pwd]
23+
set XF_PROJ_ROOT $CUR_DIR/../../../..
24+
set XPART xcu280-fsvh2892-2L-e
1825

1926
set PROJ "xBarRow_test.prj"
2027
set SOLN "sol"

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