Pin remap after hardware mux reorg for out nibble

Author: psychogenic

src/ttboard/__init__.py

@@ -6,4 +6,4 @@
 @author: Pat Deegan
 @copyright: Copyright (C) 2024 Pat Deegan, https://psychogenic.com
 '''
-VERSION='0.9.2'
+VERSION='0.9.4'

src/ttboard/demoboard.py

@@ -155,7 +155,8 @@ def project_nrst(self):
             
             @see: reset_project()
         '''
-        return self.pins.nproject_rst
+        return self.pins.nprojectrst
+    
 
     def reset_project(self, putInReset:bool):
         '''

src/ttboard/pins/gpio_map.py

@@ -18,15 +18,15 @@ class GPIOMap:
         myrawpin = machine.Pin(GPIOMap.OUT4, machine.Pin.OUT)
         
         The only caveat is that some of these are duplexed through 
-        the MUX, and named accordingly (e.g. SDI_OUT0)
+        the MUX, and named accordingly (e.g. nCRST_OUT2)
     '''
     RP_PROJCLK = 0
     HK_CSB = 1
     HK_SCK = 2
-    SDI_OUT0 = 3
-    SDO_OUT1 = 4
-    nPROJECT_RST = 5
-    CTRL_ENA = 6
+    SDI_nPROJECT_RST = 3 # SDI_OUT0 = 3
+    HK_SDO = 4 #  SDO_OUT1 = 4
+    OUT0 = 5 # nPROJECT_RST = 5
+    CTRL_ENA_OUT1 = 6 # CTRL_ENA = 6
     nCRST_OUT2 = 7
     CINC_OUT3 = 8
     IN0 = 9
@@ -54,8 +54,8 @@ class GPIOMap:
     @classmethod
     def muxed_pairs(cls):
         mpairnames = [
-            'sdi_out0',
-            'sdo_out1',
+            'sdi_nprojectrst',
+            'cena_out1',
             'ncrst_out2',
             'cinc_out3'
         ]
@@ -70,14 +70,17 @@ def muxed_pairs(cls):
     def muxed_pinmode_map(cls, rpmode:int):
 
         pinModeMap = {
-            'out0': Pin.IN,
-            'out1': Pin.IN,
-            'out2': Pin.IN,
-            'out3': Pin.IN,
+            'nprojectrst': Pin.OUT,
             'sdi': Pin.OUT,
-            'sdo': Pin.IN,
+            'cena': Pin.OUT, 
+            'out1': Pin.IN,
+            
             'ncrst': Pin.OUT,
+            'out2': Pin.IN,
+            
+            
             'cinc': Pin.OUT,
+            'out3': Pin.IN
             }
         if rpmode == RPModeDEVELOPMENT.STANDALONE:
             for k in pinModeMap.keys():
@@ -92,25 +95,32 @@ def always_outputs(cls):
         return [
             # 'nproject_rst',
             # 'rp_projclk', -- don't do this during "safe" operation
-            'ctrl_ena'
+            #'ctrl_ena'
         ]
 
     @classmethod
     def default_pull(cls, pin):
-        if pin in ["nproject_rst", "ctrl_ena"]:
-            return Pin.PULL_UP
+        # both of these now go through MUX and 
+        # must therefore rely on external/physical
+        # pull-ups.  the nProject reset has PU in 
+        # switch debounce, cena... may be a problem 
+        # (seems it has a pull down on board?)
+        #if pin in ["nproject_rst", "ctrl_ena"]:
+        #    return Pin.PULL_UP
         return Pin.PULL_DOWN
 
     @classmethod 
     def all(cls):
+        # mods made to MUX between TT03p5 proto and 
+        # CM assembly run, noted here with comments for now
         retDict = {
             "rp_projclk": cls.RP_PROJCLK,
             "hk_csb": cls.HK_CSB,
             "hk_sck": cls.HK_SCK,
-            "sdi_out0": cls.SDI_OUT0,
-            "sdo_out1": cls.SDO_OUT1,
-            "nproject_rst": cls.nPROJECT_RST,
-            "ctrl_ena": cls.CTRL_ENA,
+            "sdi_nprojectrst": cls.SDI_nPROJECT_RST, # "sdi_out0": cls.SDI_OUT0,
+            "hk_sdo": cls.HK_SDO, # "sdo_out1": cls.SDO_OUT1,
+            "out0": cls.OUT0,
+            "cena_out1": cls.CTRL_ENA_OUT1, # "ctrl_ena": cls.CTRL_ENA,
             "ncrst_out2": cls.nCRST_OUT2,
             "cinc_out3": cls.CINC_OUT3,
             "in0": cls.IN0,

src/ttboard/pins/pins.py

@@ -299,7 +299,8 @@ def begin_standalone(self):
 
     def project_clk_nrst_driven_by_RP2040(self, rpControlled:bool):
 
-        for pname in ['nproject_rst', 'rp_projclk']:
+        # for pname in ['nprojectrst', 'rp_projclk']:
+        for pname in ['rp_projclk']:
             p = getattr(self, pname)
             if rpControlled:
                 p.mode = Pin.OUT
@@ -315,6 +316,8 @@ def _begin_muxPins(self):
         muxedPins = GPIOMap.muxed_pairs()
         modeMap = GPIOMap.muxed_pinmode_map(self.mode)
         for pname, muxPair in muxedPins.items():
+            print("********************************")
+            print (muxPair)
             mp = MuxedPin(pname, self.muxCtrl, 
                           getattr(self, pname),
                           MuxedPinInfo(muxPair[0],
@@ -334,6 +337,18 @@ def _begin_muxPins(self):
     def project_clk(self):
         return self.rp_projclk
 
+    @property 
+    def nproject_rst(self):
+        # had to munge the name because nproject_rst
+        # is now in hardware MUX group, alias
+        # allows use of old name with_underscore
+        return self.nprojectrst
+    
+    @property 
+    def ctrl_ena(self):
+        # had to munge name, now going through hw mux
+        return self.cena
+    
     def _dumpPin(self, p:StandardPin):
         print(f'  {p.name} {p.mode_str} {p()}') 
     def dump(self):

src/ttboard/project_mux.py

@@ -74,7 +74,7 @@ def reset(self):
         log.debug('Resetting project mux')
         self.p.cinc(0)
         self.p.ncrst(0)
-        self.p.ctrl_ena(0)
+        self.p.cena(0)
         time.sleep_ms(10)
         self.p.ncrst(1)
         time.sleep_ms(10)
@@ -108,7 +108,7 @@ def reset_and_clock_mux(self, count:int):
             self.p.cinc(0)
             time.sleep_ms(1)
 
-        self.p.ctrl_ena(1)
+        self.p.cena(1)
         self.p.muxCtrl.mode_project_IO() 
 
     @property