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[bsp][renesas]add EK-RA2A1 support #10610 
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‎.github/ALL_BSP_COMPILE.json

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"renesas/rzt2m_rsk",
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"renesas/rzn2l_rsk",
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"renesas/rzn2l_etherkit",
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"renesas/ra2a1-ek",
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"frdm-k64f",
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"xplorer4330/M4"
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]
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]
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}
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]
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}
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}

‎bsp/renesas/libraries/HAL_Drivers/config/drv_config.h

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* Date Author Notes
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* 2021-07-29 KyleChan first version
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* 2022-12-7 Vandoul ADD ra4m2
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* 2025-08-17 CYFS ADD ra2a1
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*/
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#ifndef __DRV_CONFIG_H__
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#endif
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#endif /* SOC_SERIES_R7FA6E2 */
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#if defined(SOC_SERIES_R7FA2A1)
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#include "ra2a1/uart_config.h"
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#ifdef BSP_USING_ADC
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#include "ra2a1/adc_config.h"
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#endif
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#ifdef BSP_USING_DAC
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#include "ra2a1/dac_config.h"
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#endif
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#ifdef BSP_USING_PWM
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#include "ra2a1/pwm_config.h"
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#endif
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#ifdef BSP_USING_TIM
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#include "ra2a1/timer_config.h"
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#endif
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#ifdef BSP_USING_CAN
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#include "ra2a1/can_config.h"
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#endif
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#endif /* SOC_SERIES_R7FA2A1 */
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#ifdef __cplusplus
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}
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#endif

‎bsp/renesas/libraries/HAL_Drivers/config/ra2a1/adc_config.h

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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-08-17 CYFS first version
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*/
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#ifndef __ADC_CONFIG_H__
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#define __ADC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct rt_adc_dev
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{
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_adc_map
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{
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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‎bsp/renesas/libraries/HAL_Drivers/config/ra2a1/can_config.h

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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-08-17 CYFS first version
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*/
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#ifndef __CAN_CONFIG_H__
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#define __CAN_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_CAN0)
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#ifndef CAN0_CONFIG
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#define CAN0_CONFIG \
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{ \
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.name = "can0", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \
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.p_api_ctrl = &g_can0_ctrl, \
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.p_cfg = &g_can0_cfg, \
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}
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#endif /* CAN0_CONFIG */
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#endif /* BSP_USING_CAN0 */
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#if defined(BSP_USING_CAN1)
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#ifndef CAN1_CONFIG
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#define CAN1_CONFIG \
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{ \
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.name = "can1", \
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.num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \
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.p_api_ctrl = &g_can1_ctrl, \
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.p_cfg = &g_can1_cfg, \
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}
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#endif /* CAN1_CONFIG */
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#endif /* BSP_USING_CAN1 */
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#ifdef __cplusplus
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}
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#endif
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#endif

‎bsp/renesas/libraries/HAL_Drivers/config/ra2a1/dac_config.h

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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-08-17 CYFS first version
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*/
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#ifndef __DAC_CONFIG_H__
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#define __DAC_CONFIG_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_DAC
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struct ra_dac_map
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{
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char name;
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const struct st_dac_cfg *g_cfg;
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const struct st_dac_instance_ctrl *g_ctrl;
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};
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struct ra_dac_dev
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{
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rt_dac_device_t ra_dac_device_t;
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struct ra_dac_map *ra_dac_map_dev;
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};
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#endif
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#endif
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#ifdef __cplusplus
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}
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#endif
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‎bsp/renesas/libraries/HAL_Drivers/config/ra2a1/pwm_config.h

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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-08-17 CYFS first version
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*/
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#ifndef __PWM_CONFIG_H__
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#define __PWM_CONFIG_H__
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#include <rtthread.h>
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#include <drv_config.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum
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{
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#ifdef BSP_USING_PWM0
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BSP_PWM0_INDEX,
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#endif
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#ifdef BSP_USING_PWM1
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BSP_PWM1_INDEX,
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#endif
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#ifdef BSP_USING_PWM2
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BSP_PWM2_INDEX,
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#endif
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#ifdef BSP_USING_PWM3
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BSP_PWM3_INDEX,
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#endif
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#ifdef BSP_USING_PWM4
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BSP_PWM4_INDEX,
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#endif
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#ifdef BSP_USING_PWM5
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BSP_PWM5_INDEX,
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#endif
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#ifdef BSP_USING_PWM6
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BSP_PWM6_INDEX,
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#endif
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#ifdef BSP_USING_PWM7
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BSP_PWM7_INDEX,
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#endif
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#ifdef BSP_USING_PWM8
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BSP_PWM8_INDEX,
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#endif
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#ifdef BSP_USING_PWM9
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BSP_PWM9_INDEX,
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#endif
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BSP_PWMS_NUM
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};
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#define PWM_DRV_INITIALIZER(num) \
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{ \
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.name = "pwm"#num , \
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.g_cfg = &g_timer##num##_cfg, \
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.g_ctrl = &g_timer##num##_ctrl, \
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.g_timer = &g_timer##num, \
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PWM_CONFIG_H__ */

‎bsp/renesas/libraries/HAL_Drivers/config/ra2a1/uart_config.h

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/*
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* Copyright (c) 2006-2025, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-08-17 CYFS first version
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*/
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#ifndef __UART_CONFIG_H__
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#define __UART_CONFIG_H__
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#include <rtthread.h>
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#include "hal_data.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(BSP_USING_UART0)
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#ifndef UART0_CONFIG
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#define UART0_CONFIG \
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{ \
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.name = "uart0", \
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.p_api_ctrl = &g_uart0_ctrl, \
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.p_cfg = &g_uart0_cfg, \
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}
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#endif /* UART0_CONFIG */
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#endif /* BSP_USING_UART0 */
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#if defined(BSP_USING_UART1)
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#ifndef UART1_CONFIG
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#define UART1_CONFIG \
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{ \
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.name = "uart1", \
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.p_api_ctrl = &g_uart1_ctrl, \
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.p_cfg = &g_uart1_cfg, \
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}
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#endif /* UART1_CONFIG */
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#endif /* BSP_USING_UART1 */
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#if defined(BSP_USING_UART9)
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#ifndef UART9_CONFIG
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#define UART9_CONFIG \
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{ \
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.name = "uart9", \
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.p_api_ctrl = &g_uart9_ctrl, \
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.p_cfg = &g_uart9_cfg, \
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}
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#endif /* UART9_CONFIG */
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#endif /* BSP_USING_UART9 */
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#ifdef __cplusplus
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}
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#endif
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#endif

‎bsp/renesas/libraries/Kconfig

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bool
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select ARCH_ARM_CORTEX_M33
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select SOC_FAMILY_RENESAS_RA
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default n
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config SOC_SERIES_R7FA2A1
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bool
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select ARCH_ARM_CORTEX_M23
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select SOC_FAMILY_RENESAS_RA
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default n

‎bsp/renesas/ra2a1-ek/.api_xml

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<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
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<ddscApi/>

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