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LoongArch: Add asm modifiers to the LSX and LASX directives in the doc.
gcc/ChangeLog: * doc/extend.texi:Add modifiers to the vector of asm in the doc. * doc/md.texi:Refine the description of the modifier 'f' in the doc.
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gcc/doc/extend.texi

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@@ -12116,10 +12116,57 @@ The list below describes the supported modifiers and their effects for LoongArch
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@item @code{d} @tab Same as @code{c}.
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@item @code{i} @tab Print the character ''@code{i}'' if the operand is not a register.
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@item @code{m} @tab Same as @code{c}, but the printed value is @code{operand - 1}.
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@item @code{u} @tab Print a LASX register.
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@item @code{w} @tab Print a LSX register.
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@item @code{X} @tab Print a constant integer operand in hexadecimal.
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@item @code{z} @tab Print the operand in its unmodified form, followed by a comma.
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@end multitable
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References to input and output operands in the assembler template of extended
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asm statements can use modifiers to affect the way the operands are formatted
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in the code output to the assembler. For example, the following code uses the
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'w' modifier for LoongArch:
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@example
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test-asm.c:
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#include <lsxintrin.h>
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__m128i foo (void)
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@{
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__m128i a,b,c;
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__asm__ ("vadd.d %w0,%w1,%w2\n\t"
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:"=f" (c)
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:"f" (a),"f" (b));
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return c;
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@}
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@end example
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@noindent
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The compile command for the test case is as follows:
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@example
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gcc test-asm.c -mlsx -S -o test-asm.s
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@end example
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@noindent
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The assembly statement produces the following assembly code:
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@example
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vadd.d $vr0,$vr0,$vr1
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@end example
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This is a 128-bit vector addition instruction, @code{c} (referred to in the
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template string as %0) is the output, and @code{a} (%1) and @code{b} (%2) are
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the inputs. @code{__m128i} is a vector data type defined in the file
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@code{lsxintrin.h} (@xref{LoongArch SX Vector Intrinsics}). The symbol '=f'
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represents a constraint using a floating-point register as an output type, and
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the 'f' in the input operand represents a constraint using a floating-point
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register operand, which can refer to the definition of a constraint
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(@xref{Constraints}) in gcc.
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@anchor{riscvOperandmodifiers}
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@subsubsection RISC-V Operand Modifiers
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gcc/doc/md.texi

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@@ -2881,7 +2881,7 @@ $r1h
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@item LoongArch---@file{config/loongarch/constraints.md}
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@table @code
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@item f
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A floating-point register (if available).
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A floating-point or vector register (if available).
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@item k
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A memory operand whose address is formed by a base register and
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(optionally scaled) index register.

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