Skip to content

Commit 41667d5

Browse files
committed
ast_code_genertor supports signed input and output
1 parent 0f947a3 commit 41667d5

File tree

2 files changed

+2
-1
lines changed

2 files changed

+2
-1
lines changed

pyverilog/ast_code_generator/codegen.py

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -358,6 +358,7 @@ def visit_Ioport(self, node):
358358
'second' : '' if node.second is None else node.second.__class__.__name__.lower(),
359359
'name' : escape(node.first.name),
360360
'width' : '' if node.first.width is None else self.visit(node.first.width),
361+
'signed' : node.first.signed or (node.second is not None and node.second.signed)
361362
}
362363
rslt = template.render(template_dict)
363364
return rslt
Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
{{ first }} {% if second != '' %}{{ second }} {% endif %}{% if width != '' %}{{ width }} {% endif %}{{ name }}
1+
{{ first }} {% if second != '' %}{{ second }} {% endif %}{% if signed %}signed {% endif %}{% if width != '' %}{{ width }} {% endif %}{{ name }}

0 commit comments

Comments
 (0)