Description
Overview Description:
Is there any kind of guarantee about the synchronization among the depth/ir/colour frames when using SyncMultiFrameListener
?
I looked at the implementation of bool SyncMultiFrameListener::onNewFrame(Frame::Type type, Frame *frame)
and there seems to be no guarantee.
The only thing that the listener seems to guarantee is that all subscribed frame types are present. It doesn't seem to care if one frame type is lagging behind another.
For instance, I modified Protonect so it prints out the rgb->timestamp - depth->timestamp
on every frame, and I find that the difference is always 179 or 180 so far, which means 17.9 or 18.0 ms. This is a bit worrying because at 30 fps, the time interval of each frame is only 33.3 ms; 17.9 ms is more than half of that. Do we know how the Kinect device sequences/muxes depth and colour frames? Could we be collecting the depth and colour frames in the wrong order? If I remember correctly, the official Kinect for Windows v2 SDK seems to have some synchronization guarantee when using it's MultiSourceFrameReader. If a depth or colour frame is dropped, the MultiSourceFrameReference will leave it out instead of giving you the last available frame, although I don't know how the official SDK associates the colour frame with the correct depth frame.
I have also looked at the sequence numbers of the frames. There seems to be always a difference between the depth packet's sequence number and the colour packet's sequence number, but the difference is a bit random between initializations of the Kinect device, so I don't think we can reliably use it to associate depth frames with colour frames.
You can also imagine the following sequence of packets, where:
C
= received colour packetc
= skipped colour packetD
= received depth/ir packetd
= skipped depth/ir packet
DCdCDCDcDCDcdcdcdcdcdC
With the current libfreenect2 implementation, it seems like the CDCD
after the initial DCd
would be treated as synchronized frames even though the depth frame is actually lagging behind the colour frame. The mis-ordering could go on for a very long time until a c
frame is skipped. The sequence of DcdcdcdcdcdC
at the end is also bad because the D
and the C
are in fact separated by many dropped c
and d
frames, but they would still be treated as synchronized frames.
Version, Platform, and Hardware Bug Found:
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git log -1 --oneline
83f88b4c09f0b00724ae65785abcd4f3eeb79f93
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uname -a
Linux KNPC0116 4.4.0-36-generic #55~14.04.1-Ubuntu SMP Fri Aug 12 11:49:30 UTC 2016 x86_64 x86_64 x86_64 GNU/Linux
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lsusb -t
/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/6p, 5000M |__ Port 2: Dev 10, If 0, Class=Hub, Driver=hub/1p, 5000M |__ Port 1: Dev 11, If 0, Class=Vendor Specific Class, Driver=usbfs, 5000M |__ Port 1: Dev 11, If 1, Class=Vendor Specific Class, Driver=usbfs, 5000M |__ Port 1: Dev 11, If 2, Class=Audio, Driver=snd-usb-audio, 5000M |__ Port 1: Dev 11, If 3, Class=Audio, Driver=snd-usb-audio, 5000M /: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/14p, 480M |__ Port 4: Dev 2, If 0, Class=Wireless, Driver=btusb, 12M |__ Port 4: Dev 2, If 1, Class=Wireless, Driver=btusb, 12M |__ Port 9: Dev 13, If 0, Class=Hub, Driver=hub/1p, 480M /: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/3p, 480M |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/8p, 480M /: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=ehci-pci/3p, 480M |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/6p, 480M
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lspci -nn
00:00.0 Host bridge [0600]: Intel Corporation 4th Gen Core Processor DRAM Controller [8086:0c00] (rev 06) 00:02.0 VGA compatible controller [0300]: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor Integrated Graphics Controller [8086:0412] (rev 06) 00:03.0 Audio device [0403]: Intel Corporation Xeon E3-1200 v3/4th Gen Core Processor HD Audio Controller [8086:0c0c] (rev 06) 00:14.0 USB controller [0c03]: Intel Corporation 8 Series/C220 Series Chipset Family USB xHCI [8086:8c31] (rev 04) 00:16.0 Communication controller [0780]: Intel Corporation 8 Series/C220 Series Chipset Family MEI Controller #1 [8086:8c3a] (rev 04) 00:16.3 Serial controller [0700]: Intel Corporation 8 Series/C220 Series Chipset Family KT Controller [8086:8c3d] (rev 04) 00:19.0 Ethernet controller [0200]: Intel Corporation Ethernet Connection I217-LM [8086:153a] (rev 04) 00:1a.0 USB controller [0c03]: Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #2 [8086:8c2d] (rev 04) 00:1b.0 Audio device [0403]: Intel Corporation 8 Series/C220 Series Chipset High Definition Audio Controller [8086:8c20] (rev 04) 00:1c.0 PCI bridge [0604]: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #1 [8086:8c10] (rev d4) 00:1c.2 PCI bridge [0604]: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #3 [8086:8c14] (rev d4) 00:1d.0 USB controller [0c03]: Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #1 [8086:8c26] (rev 04) 00:1f.0 ISA bridge [0601]: Intel Corporation Q85 Express LPC Controller [8086:8c4c] (rev 04) 00:1f.2 SATA controller [0106]: Intel Corporation 8 Series/C220 Series Chipset Family 6-port SATA Controller 1 [AHCI mode] [8086:8c02] (rev 04) 00:1f.3 SMBus [0c05]: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller [8086:8c22] (rev 04) 06:00.0 Network controller [0280]: Intel Corporation Wireless 7260 [8086:08b1] (rev 6b)