readme.txt

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POWERLINK Framemanipulator (FM)
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(C) Bernecker + Rainer, B & R Strasse 1, 5142 Eggelsberg, Austria
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Additional hardware for openCONFORMANCE tests

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Contents
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- FM IP-core
  - With update from active-hdl project via "update_ip-core.bat"
- FM C-Sources
- User-Documentation
- Active-hdl project for developement
- Examples with the B&R CNDK
  - BeMicro Direct-IO with Quartus II v10.1 SP1 and SOPC-Builder
  - TERASIC_DE2-115 Direct-IO with Quartus II v11.1 SP2 and Qsys


Requirements
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- Altera FPGA board with a PL-Slave design

- For the CNDK examples:
  - Industrial Ethernet Board BeMicro RTE
  - Or TERASIC_DE2-115 INK Board

- Altera Quartus II v10.1 SP1 (or v11.1 SP2) (Web Edition is also possible)
  and Altera Nios II Embedded Design Suite v10.1 SP1 (or v11.1 SP2)
  (http://www.altera.com/support/software/download/nios2/dnl-nios2.jsp)

- Experiences with this development environment are required


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