Fix check target in Makefile

njanin · njanin · commit d6b6c83c28b4 · 2022-11-13T23:32:48.000+01:00
diff --git a/Makefile b/Makefile
@@ -9,7 +9,7 @@ OBJ = spstring.o demo.o
 demo: $(OBJ)
 	$(CC) -o $@ $^ $(CFLAGS)
 
-check:
+check: demo
 	./demo
 
 clean:
