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jigneshmoradiya1jigneshmoradiya1
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[THREADX] Fixed MISRA-C required rule violations
MH3-111065
1 parent 154cf4a commit 8aef1c4

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16 files changed

+128
-31
lines changed

16 files changed

+128
-31
lines changed

‎threadx/config/arch/arm/devices_arm926/src/sam9x_tx_timer.c.ftl

+17-1
Original file line numberDiff line numberDiff line change
@@ -54,15 +54,31 @@
5454
// Section: Timer routine implemenation
5555
// *****************************************************************************
5656
// *****************************************************************************
57+
/* MISRAC 2012 deviation block start */
58+
/* MISRA C-2012 Rule 21.2 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_21_2_DR_1 */
59+
/* MISRA C-2012 Rule 8.6 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_8_6_DR_1 */
60+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
61+
#pragma GCC diagnostic push
62+
#pragma GCC diagnostic ignored "-Wunknown-pragmas"
63+
#pragma coverity compliance block \
64+
(deviate:1 "MISRA C-2012 Rule 21.2" "H3_MISRAC_2012_R_21_2_DR_1")\
65+
(deviate:1 "MISRA C-2012 Rule 8.6" "H3_MISRAC_2012_R_8_6_DR_1")
66+
</#if>
5767
extern void _tx_timer_interrupt(void);
68+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
69+
#pragma coverity compliance end_block "MISRA C-2012 Rule 8.6"
70+
#pragma coverity compliance end_block "MISRA C-2012 Rule 21.2"
71+
#pragma GCC diagnostic pop
72+
</#if>
73+
/* MISRAC 2012 deviation block end */
5874

5975
static void threadx_tick_handler(uintptr_t context)
6076
{
6177
/* Call ThreadX timer interrupt processing. */
6278
_tx_timer_interrupt();
6379
}
6480

65-
void threadx_timer_intialize()
81+
void threadx_timer_intialize(void)
6682
{
6783
${PIT64B_INST_NAME}_TimerCallbackSet(threadx_tick_handler, 0);
6884
${PIT64B_INST_NAME}_TimerStart();

‎threadx/config/arch/arm/devices_arm926/src/sam9x_tx_timer.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@
5252
// DOM-IGNORE-END
5353

5454
// *****************************************************************************
55-
void threadx_timer_intialize();
55+
void threadx_timer_intialize(void);
5656

5757
// DOM-IGNORE-BEGIN
5858
#ifdef __cplusplus // Provide C++ Compatibility

‎threadx/config/arch/arm/devices_cortex_a5/src/sama5d2_tx_timer.c ‎threadx/config/arch/arm/devices_cortex_a5/src/sama5d2_tx_timer.c.ftl

+18-1
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,26 @@
4848
/* This section lists the other files that are included in this file.
4949
*/
5050
#include "definitions.h"
51+
#include "interrupts.h"
5152

5253
// *****************************************************************************
54+
/* MISRAC 2012 deviation block start */
55+
/* MISRA C-2012 Rule 21.2 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_21_2_DR_1 */
56+
/* MISRA C-2012 Rule 8.6 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_8_6_DR_1 */
57+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
58+
#pragma GCC diagnostic push
59+
#pragma GCC diagnostic ignored "-Wunknown-pragmas"
60+
#pragma coverity compliance block \
61+
(deviate:1 "MISRA C-2012 Rule 21.2" "H3_MISRAC_2012_R_21_2_DR_1")\
62+
(deviate:1 "MISRA C-2012 Rule 8.6" "H3_MISRAC_2012_R_8_6_DR_1")
63+
</#if>
5364
extern void _tx_timer_interrupt(void);
65+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
66+
#pragma coverity compliance end_block "MISRA C-2012 Rule 8.6"
67+
#pragma coverity compliance end_block "MISRA C-2012 Rule 21.2"
68+
#pragma GCC diagnostic pop
69+
</#if>
70+
/* MISRAC 2012 deviation block end */
5471

5572
// *****************************************************************************
5673
// *****************************************************************************
@@ -94,7 +111,7 @@ void Threadx_Tick_Handler(void)
94111

95112
interruptStatus = PIT_REGS->PIT_SR;
96113

97-
if (interruptStatus)
114+
if (interruptStatus != 0U)
98115
{
99116
volatile uint32_t reg = PIT_REGS->PIT_PIVR;
100117
(void)reg;

‎threadx/config/arch/arm/devices_cortex_a5/src/xc32/tx_port.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -282,7 +282,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture);
282282
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
283283

284284
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
285-
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
285+
#define TX_RESTORE (void)_tx_thread_interrupt_restore(interrupt_save);
286286

287287
#else
288288

‎threadx/config/arch/arm/devices_cortex_a5/threadx_config.py

+2-2
Original file line numberDiff line numberDiff line change
@@ -136,12 +136,12 @@ def updateIncludePath(symbol, event):
136136
threadxXc32PortASMsource.setEnabled(Database.getSymbolValue("core", "COMPILER_CHOICE") == 0)
137137

138138
threadxTimerSource = thirdPartyThreadX.createFileSymbol("THREADX_TX_TIMER", None)
139-
threadxTimerSource.setSourcePath("threadx/config/arch/arm/devices_cortex_a5/src/sama5d2_tx_timer.c")
139+
threadxTimerSource.setSourcePath("threadx/config/arch/arm/devices_cortex_a5/src/sama5d2_tx_timer.c.ftl")
140140
threadxTimerSource.setOutputName("sama5d2_tx_timer.c")
141141
threadxTimerSource.setDestPath("threadx_config/")
142142
threadxTimerSource.setProjectPath("config/" + configName + "/threadx_config/")
143143
threadxTimerSource.setType("SOURCE")
144-
threadxTimerSource.setMarkup(False)
144+
threadxTimerSource.setMarkup(True)
145145

146146
threadxIntHandleFile = thirdPartyThreadX.createFileSymbol("THREADX_INT_HANDLER", None)
147147
threadxIntHandleFile.setType("STRING")

‎threadx/config/arch/arm/devices_cortex_a7/src/sama7_tx_timer.c.ftl

+18-1
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,26 @@
4848
/* This section lists the other files that are included in this file.
4949
*/
5050
#include "definitions.h"
51+
#include "interrupts.h"
5152

5253
// *****************************************************************************
54+
/* MISRAC 2012 deviation block start */
55+
/* MISRA C-2012 Rule 21.2 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_21_2_DR_1 */
56+
/* MISRA C-2012 Rule 8.6 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_8_6_DR_1 */
57+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
58+
#pragma GCC diagnostic push
59+
#pragma GCC diagnostic ignored "-Wunknown-pragmas"
60+
#pragma coverity compliance block \
61+
(deviate:1 "MISRA C-2012 Rule 21.2" "H3_MISRAC_2012_R_21_2_DR_1")\
62+
(deviate:1 "MISRA C-2012 Rule 8.6" "H3_MISRAC_2012_R_8_6_DR_1")
63+
</#if>
5364
extern void _tx_timer_interrupt(void);
65+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
66+
#pragma coverity compliance end_block "MISRA C-2012 Rule 8.6"
67+
#pragma coverity compliance end_block "MISRA C-2012 Rule 21.2"
68+
#pragma GCC diagnostic pop
69+
</#if>
70+
/* MISRAC 2012 deviation block end */
5471

5572
// *****************************************************************************
5673
// *****************************************************************************
@@ -88,5 +105,5 @@ void Threadx_Tick_Handler(void)
88105
_tx_timer_interrupt();
89106

90107
currentCompVal = PL1_GetPhysicalCompareValue();
91-
PL1_SetPhysicalCompareValue(currentCompVal + (GENERIC_TIMER_CounterFrequencyGet() / ${THREADX_TICK_RATE_HZ}));
108+
PL1_SetPhysicalCompareValue(currentCompVal + ((uint64_t)GENERIC_TIMER_CounterFrequencyGet() / ${THREADX_TICK_RATE_HZ}U));
92109
}

‎threadx/config/arch/arm/devices_cortex_a7/src/xc32/tx_port.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -282,7 +282,7 @@ unsigned int _tx_thread_interrupt_restore(UINT old_posture);
282282
#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
283283

284284
#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
285-
#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
285+
#define TX_RESTORE (void)_tx_thread_interrupt_restore(interrupt_save);
286286

287287
#else
288288

‎threadx/config/arch/arm/devices_cortex_m23/src/interrupt_handlers_decls.h.ftl

+15-1
Original file line numberDiff line numberDiff line change
@@ -1 +1,15 @@
1-
void PendSV_Handler ( void );
1+
/* MISRAC 2012 deviation block start */
2+
/* MISRA C-2012 Rule 21.2 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_21_2_DR_1 */
3+
/* MISRA C-2012 Rule 8.6 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_8_6_DR_1 */
4+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
5+
#pragma GCC diagnostic push
6+
#pragma GCC diagnostic ignored "-Wunknown-pragmas"
7+
#pragma coverity compliance block \
8+
(deviate:1 "MISRA C-2012 Rule 8.6" "H3_MISRAC_2012_R_8_6_DR_1")
9+
</#if>
10+
void PendSV_Handler ( void );
11+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
12+
#pragma coverity compliance end_block "MISRA C-2012 Rule 8.6"
13+
#pragma GCC diagnostic pop
14+
</#if>
15+
/* MISRAC 2012 deviation block end */

‎threadx/config/arch/arm/devices_cortex_m33/src/interrupt_handlers_decls.h.ftl

+15-1
Original file line numberDiff line numberDiff line change
@@ -1 +1,15 @@
1-
void PendSV_Handler ( void );
1+
/* MISRAC 2012 deviation block start */
2+
/* MISRA C-2012 Rule 21.2 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_21_2_DR_1 */
3+
/* MISRA C-2012 Rule 8.6 deviated 1 times. Deviation record ID - H3_MISRAC_2012_R_8_6_DR_1 */
4+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
5+
#pragma GCC diagnostic push
6+
#pragma GCC diagnostic ignored "-Wunknown-pragmas"
7+
#pragma coverity compliance block \
8+
(deviate:1 "MISRA C-2012 Rule 8.6" "H3_MISRAC_2012_R_8_6_DR_1")
9+
</#if>
10+
void PendSV_Handler ( void );
11+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
12+
#pragma coverity compliance end_block "MISRA C-2012 Rule 8.6"
13+
#pragma GCC diagnostic pop
14+
</#if>
15+
/* MISRAC 2012 deviation block end */

‎threadx/config/arch/mips/devices_pic32mk/src/inc/tx_port.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ unsigned int _tx_thread_interrupt_control(uns
235235
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
236236
#else
237237

238-
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save = 0;
238+
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save = 0;
239239

240240
#define TX_DISABLE interrupt_save = __builtin_disable_interrupts();
241241

‎threadx/config/arch/mips/devices_pic32mx/src/inc/tx_port.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -232,7 +232,7 @@ unsigned int _tx_thread_interrupt_control(uns
232232
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
233233
#else
234234

235-
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save = 0;
235+
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save = 0;
236236

237237
#define TX_DISABLE interrupt_save = __builtin_disable_interrupts();
238238

‎threadx/config/arch/mips/devices_pic32mz/src/inc/tx_port.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ unsigned int _tx_thread_interrupt_control(uns
235235
#define TX_RESTORE _tx_thread_interrupt_control(interrupt_save);
236236
#else
237237

238-
#define TX_INTERRUPT_SAVE_AREA register int interrupt_save = 0;
238+
#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save = 0;
239239

240240
#define TX_DISABLE interrupt_save = __builtin_disable_interrupts();
241241

‎threadx/config/arch/mips/templates/tmr1/tx_tmr1.c.ftl

+1-1
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@
5353
#include "peripheral/evic/plib_evic.h"
5454
#include "tx_api.h"
5555

56-
extern void _tx_timer_interrupt( void );
56+
void TIMER_1_Handler (void);
5757

5858
void __ISR(_TIMER_1_VECTOR, ipl1SAVEALL) TIMER_1_Handler (void)
5959
{

‎threadx/templates/system/create_tasks.c.ftl

+8-6
Original file line numberDiff line numberDiff line change
@@ -24,15 +24,16 @@
2424
-->
2525
<#if HarmonyCore?? >
2626
<#lt> /* Allocate the stack for _APP_IDLE_Tasks threads */
27-
<#lt> tx_byte_allocate(&byte_pool_0,
27+
<#lt> (void)tx_byte_allocate(&byte_pool_0,
2828
<#lt> (VOID **) &lAPP_IDLE_Task_Stk_Ptr,
2929
<#lt> TX_MINIMUM_STACK,
3030
<#lt> TX_NO_WAIT
3131
<#lt> );
3232

33+
<#lt> CHAR idle_task[] = "APP_IDLE_Tasks";
3334
<#lt> /* create the _APP_IDLE_Tasks thread */
34-
<#lt> tx_thread_create(&lAPP_IDLE_Task_TCB,
35-
<#lt> "APP_IDLE_Tasks",
35+
<#lt> (void)tx_thread_create(&lAPP_IDLE_Task_TCB,
36+
<#lt> idle_task,
3637
<#lt> lAPP_IDLE_Tasks,
3738
<#lt> 1,
3839
<#lt> lAPP_IDLE_Task_Stk_Ptr,
@@ -52,15 +53,16 @@
5253
<#assign GEN_APP_RTOS_TASK_PRIO = GEN_APP_RTOS_TASK_PRIO_STR?eval>
5354
<#if HarmonyCore.SELECT_RTOS == "ThreadX">
5455
<#lt> /* Allocate the stack for l${GEN_APP_TASK_NAME?upper_case} threads */
55-
<#lt> tx_byte_allocate(&byte_pool_0,
56+
<#lt> (void)tx_byte_allocate(&byte_pool_0,
5657
<#lt> (VOID **) &l${GEN_APP_TASK_NAME?upper_case}_Task_Stk_Ptr,
5758
<#lt> ${GEN_APP_RTOS_TASK_SIZE},
5859
<#lt> TX_NO_WAIT
5960
<#lt> );
6061

62+
<#lt> CHAR ${GEN_APP_TASK_NAME?lower_case}_task[] = "${GEN_APP_TASK_NAME?upper_case}_Tasks";
6163
<#lt> /* create the l${GEN_APP_TASK_NAME?upper_case} thread */
62-
<#lt> tx_thread_create(&l${GEN_APP_TASK_NAME?upper_case}_Task_TCB,
63-
<#lt> "${GEN_APP_TASK_NAME?upper_case}_Tasks",
64+
<#lt> (void)tx_thread_create(&l${GEN_APP_TASK_NAME?upper_case}_Task_TCB,
65+
<#lt> ${GEN_APP_TASK_NAME?lower_case}_task,
6466
<#lt> l${GEN_APP_TASK_NAME?upper_case}_Tasks,
6567
<#lt> ${i},
6668
<#lt> l${GEN_APP_TASK_NAME?upper_case}_Task_Stk_Ptr,

‎threadx/templates/system/tasks_macros.c.ftl

+7-7
Original file line numberDiff line numberDiff line change
@@ -23,12 +23,12 @@
2323
*******************************************************************************/
2424
-->
2525
<#if HarmonyCore?? >
26-
<#lt>TX_THREAD lAPP_IDLE_Task_TCB;
27-
<#lt>uint8_t* lAPP_IDLE_Task_Stk_Ptr;
26+
<#lt>static TX_THREAD lAPP_IDLE_Task_TCB;
27+
<#lt>static uint8_t* lAPP_IDLE_Task_Stk_Ptr;
2828

2929
<#lt>static void lAPP_IDLE_Tasks( ULONG thread_input )
3030
<#lt>{
31-
<#lt> while(1)
31+
<#lt> while(true)
3232
<#lt> {
3333
<#lt> /* IDLE Task will be executed if there are not tasks in ready state */
3434

@@ -39,8 +39,8 @@
3939
<#assign GEN_APP_TASK_NAME_STR = "HarmonyCore.GEN_APP_TASK_NAME_" + i>
4040
<#assign GEN_APP_TASK_NAME = GEN_APP_TASK_NAME_STR?eval>
4141
<#if HarmonyCore.SELECT_RTOS == "ThreadX">
42-
<#lt>TX_THREAD l${GEN_APP_TASK_NAME?upper_case}_Task_TCB;
43-
<#lt>uint8_t* l${GEN_APP_TASK_NAME?upper_case}_Task_Stk_Ptr;
42+
<#lt>static TX_THREAD l${GEN_APP_TASK_NAME?upper_case}_Task_TCB;
43+
<#lt>static uint8_t* l${GEN_APP_TASK_NAME?upper_case}_Task_Stk_Ptr;
4444

4545
</#if>
4646
</#list>
@@ -55,11 +55,11 @@
5555
<#if HarmonyCore.SELECT_RTOS == "ThreadX">
5656
<#lt>static void l${GEN_APP_TASK_NAME?upper_case}_Tasks( ULONG thread_input )
5757
<#lt>{
58-
<#lt> while(1)
58+
<#lt> while(true)
5959
<#lt> {
6060
<#lt> ${GEN_APP_TASK_NAME?upper_case}_Tasks();
6161
<#if GEN_APP_RTOS_TASK_USE_DELAY == true>
62-
<#lt> tx_thread_sleep((ULONG)(${GEN_APP_RTOS_TASK_DELAY} / (TX_TICK_PERIOD_MS)));
62+
<#lt> (void)tx_thread_sleep((${GEN_APP_RTOS_TASK_DELAY}U / (TX_TICK_PERIOD_MS)));
6363
</#if>
6464
<#lt> }
6565
<#lt>}

‎threadx/templates/tx_user.h.ftl

+21-4
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,12 @@
1+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
2+
#ifndef TX_USER_H
3+
#define TX_USER_H
4+
5+
#pragma GCC diagnostic push
6+
#pragma GCC diagnostic ignored "-Wunknown-pragmas"
7+
#pragma coverity compliance block fp "MISRA C-2012 Rule 3.1" "H3_MISRAC_2012_R_3_1_DR_3"
8+
9+
</#if>
110
/***************************************************************************
211
* Copyright (c) 2024 Microsoft Corporation
312
*
@@ -7,6 +16,12 @@
716
*
817
* SPDX-License-Identifier: MIT
918
**************************************************************************/
19+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION>
20+
21+
#pragma coverity compliance end_block "MISRA C-2012 Rule 3.1"
22+
#pragma GCC diagnostic pop
23+
24+
</#if>
1025

1126

1227
/**************************************************************************/
@@ -68,8 +83,10 @@
6883
/* */
6984
/**************************************************************************/
7085

86+
<#if core.COVERITY_SUPPRESS_DEVIATION?? && core.COVERITY_SUPPRESS_DEVIATION == false>
7187
#ifndef TX_USER_H
7288
#define TX_USER_H
89+
</#if>
7390

7491

7592
/* Define various build options for the ThreadX port. The application should either make changes
@@ -115,11 +132,11 @@
115132
#define TX_THREAD_USER_EXTENSION ????
116133
*/
117134

118-
#define TX_CPU_CLOCK_HZ ${THREADX_CPU_CLOCK_HZ}
119-
#define TX_TICK_RATE_HZ ${THREADX_TICK_RATE_HZ}
120-
#define TX_TICK_PERIOD_MS (1000 / TX_TICK_RATE_HZ)
135+
#define TX_CPU_CLOCK_HZ ${THREADX_CPU_CLOCK_HZ}U
136+
#define TX_TICK_RATE_HZ ${THREADX_TICK_RATE_HZ}U
137+
#define TX_TICK_PERIOD_MS (1000U / TX_TICK_RATE_HZ)
121138
<#if core.CoreArchitecture != "MIPS" && core.CoreArchitecture != "CORTEX-A" && (core.CoreArchitecture?matches("ARM926.*") == false)>
122-
#define TX_SYSTICK_CYCLES ((TX_CPU_CLOCK_HZ / TX_TICK_RATE_HZ) -1)
139+
#define TX_SYSTICK_CYCLES ((TX_CPU_CLOCK_HZ / TX_TICK_RATE_HZ) -1U)
123140
</#if>
124141
#define TX_TIMER_TICKS_PER_SECOND ((ULONG) ${THREADX_TICK_RATE_HZ})
125142

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